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Correct the cvt.tst test case on Itanium.

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* lib/jit_ia64-cpu.c: Correct wrong mapping of 2 instructions
	in "M-, stop, M-, stop" translation, that was ignoring the
	last stop (implemented as a nop I- stop).

	* lib/jit_ia64-fpu.c: Properly implement fnorm.s and fnorm.d,
	as well as the proper integer to float or double conversion.
This commit is contained in:
pcpa 2013-04-27 17:16:01 -03:00
parent f52b976390
commit 119ea1e97d
3 changed files with 29 additions and 5 deletions
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9
ChangeLog
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@ -1,3 +1,12 @@
2013-04-27 Paulo Andrade <pcpa@gnu.org>
* lib/jit_ia64-cpu.c: Correct wrong mapping of 2 instructions
in "M-, stop, M-, stop" translation, that was ignoring the
last stop (implemented as a nop I- stop).
* lib/jit_ia64-fpu.c: Properly implement fnorm.s and fnorm.d,
as well as the proper integer to float or double conversion.
2013-04-27 Paulo Andrade <pcpa@gnu.org> 2013-04-27 Paulo Andrade <pcpa@gnu.org>
* lib/jit_ia64-cpu.c: Correct bogus implementation of ldr_T * lib/jit_ia64-cpu.c: Correct bogus implementation of ldr_T

2
lib/jit_ia64-cpu.c
View file

@ -1937,7 +1937,7 @@ _flush(jit_state_t *_jit)
s0 = ii(0); s1 = ii(1); s2 = nop_i; s0 = ii(0); s1 = ii(1); s2 = nop_i;
break; break;
case MsMs: case MsMs:
n = 2; tm = TM_MsM_I_; n = 2; tm = TM_MsM_Is;
s0 = ii(0); s1 = ii(1); s2 = nop_i; s0 = ii(0); s1 = ii(1); s2 = nop_i;
break; break;
case MsM_I_: case MsM_I_:

23
lib/jit_ia64-fpu.c
View file

@ -153,7 +153,7 @@ static void F16_(jit_state_t*,jit_word_t,
#define FCVT_FX_TRUNC(f1,f2) F10(0,SF_S0,0x1a,f2,f1) #define FCVT_FX_TRUNC(f1,f2) F10(0,SF_S0,0x1a,f2,f1)
#define FCVT_FXU_TRUNC(f1,f2) F10(0,SF_S0,0x1b,f2,f1) #define FCVT_FXU_TRUNC(f1,f2) F10(0,SF_S0,0x1b,f2,f1)
/* fcvt.xf */ /* fcvt.xf */
#define FCVT_XF(f1,f2) F11(0x1c,f1,f2) #define FCVT_XF(f1,f2) F11(0x1c,f2,f1)
/* fcvt.fxuf */ /* fcvt.fxuf */
#define FCVT_XUF(f1,f3) FMA(f1,f3,1,0) #define FCVT_XUF(f1,f3) FMA(f1,f3,1,0)
/* fma */ /* fma */
@ -199,6 +199,8 @@ static void F16_(jit_state_t*,jit_word_t,
#define FNMPY(f1,f3,f4) FNMA(f1,f3,f4,0) #define FNMPY(f1,f3,f4) FNMA(f1,f3,f4,0)
/* fnorm */ /* fnorm */
#define FNORM(f1,f3) FMA(f1,f3,1,0) #define FNORM(f1,f3) FMA(f1,f3,1,0)
#define FNORM_S(f1,f3) FMA_S(f1,f3,1,0)
#define FNORM_D(f1,f3) FMA_D(f1,f3,1,0)
/* for */ /* for */
#define FOR(f1,f2,f3) F9(0,0x2e,f3,f2,f1) #define FOR(f1,f2,f3) F9(0,0x2e,f3,f2,f1)
/* fpabs */ /* fpabs */
@ -440,9 +442,10 @@ static void _movi_d_w(jit_state_t*,jit_int32_t,jit_word_t);
static void _sqrtr_f(jit_state_t*,jit_int32_t,jit_int32_t); static void _sqrtr_f(jit_state_t*,jit_int32_t,jit_int32_t);
#define sqrtr_d(r0,r1) _sqrtr_d(_jit,r0,r1) #define sqrtr_d(r0,r1) _sqrtr_d(_jit,r0,r1)
static void _sqrtr_d(jit_state_t*,jit_int32_t,jit_int32_t); static void _sqrtr_d(jit_state_t*,jit_int32_t,jit_int32_t);
#define extr_f_d(r0,r1) /*FNORM(r0,r1)*/ #define extr_f_d(r0,r1) FNORM_D(r0,r1)
#define extr_d_f(r0,r1) /*FNORM(r0,r1)*/ #define extr_d_f(r0,r1) FNORM_S(r0,r1)
#define extr_f(r0,r1) extr_d(r0,r1) #define extr_f(r0,r1) _extr_f(_jit,r0,r1)
static void _extr_f(jit_state_t*,jit_int32_t,jit_int32_t);
#define extr_d(r0,r1) _extr_d(_jit,r0,r1) #define extr_d(r0,r1) _extr_d(_jit,r0,r1)
static void _extr_d(jit_state_t*,jit_int32_t,jit_int32_t); static void _extr_d(jit_state_t*,jit_int32_t,jit_int32_t);
#define truncr_f_i(r0,r1) truncr_d_l(r0,r1) #define truncr_f_i(r0,r1) truncr_d_l(r0,r1)
@ -1108,6 +1111,17 @@ _divr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
jit_unget_reg(t0); jit_unget_reg(t0);
} }
static void
_extr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
{
jit_int32_t reg;
reg = jit_get_reg(jit_class_fpr);
SETF_SIG(rn(reg), r1);
FCVT_XF(r0, rn(reg));
FNORM_S(r0, r0);
jit_unget_reg(reg);
}
static void static void
_extr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1) _extr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
{ {
@ -1115,6 +1129,7 @@ _extr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
reg = jit_get_reg(jit_class_fpr); reg = jit_get_reg(jit_class_fpr);
SETF_SIG(rn(reg), r1); SETF_SIG(rn(reg), r1);
FCVT_XF(r0, rn(reg)); FCVT_XF(r0, rn(reg));
FNORM_D(r0, r0);
jit_unget_reg(reg); jit_unget_reg(reg);
} }