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checkin rewrite of i386 assembler
2006-11-20 Paolo Bonzini <bonzini@gnu.org>
* lightning/i386/asm-i386.h: Check in rewrite from aranym.
* lightning/i386/asm-32.h: Adjust.
* lightning/i386/asm-64.h: Adjust.
* lightning/i386/fp-32.h: Adjust.
* lightning/i386/core-32.h: Adjust. Add jit_{ld,ldx,st,stx}i*.
* lightning/i386/core-64.h: Adjust. Add jit_{ld,ldx,st,stx}i*.
* lightning/i386/core-i386.h: Adjust. Remove these patterns.
git-archimport-id: bonzini@gnu.org--2004b/lightning--stable--1.2--patch-43
This commit is contained in:
Paolo Bonzini
parent
76e49b1bcc
commit
2534af6d2d
10 changed files with 1477 additions and 1269 deletions
3
AUTHORS
3
AUTHORS
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@ -1,5 +1,6 @@
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Paolo Bonzini <bonzini@gnu.org>
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i386 and PPC assemblers by Ian Piumarta <piumarta@inria.fr>
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PPC assembler by Ian Piumarta <piumarta@inria.fr>
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i386 assembler by Ian Piumarta <piumarta@inria.fr> and Milan Jurik
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x86-64 backend by Matthew Flatt <mflatt@cs.utah.edu>
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Major PPC contributions by Laurent Michel <ldm@thorgal.homelinux.org>
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Major SPARC contributions by Ludovic Courtes <ludo@chbouib.org>
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11
ChangeLog
11
ChangeLog
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@ -1,3 +1,14 @@
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2006-11-20 Paolo Bonzini <bonzini@gnu.org>
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* lightning/i386/asm-i386.h: Check in rewrite from aranym.
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* lightning/i386/asm-32.h: Adjust.
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* lightning/i386/asm-64.h: Adjust.
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* lightning/i386/fp-32.h: Adjust.
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* lightning/i386/core-32.h: Adjust. Add jit_{ld,ldx,st,stx}i*.
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* lightning/i386/core-64.h: Adjust. Add jit_{ld,ldx,st,stx}i*.
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* lightning/i386/core-i386.h: Adjust. Remove these patterns.
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2006-11-20 Paolo Bonzini <bonzini@gnu.org>
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* lightning/i386/asm-i386.h: Merge 64-bit cleanliness changes from mzscheme.
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@ -34,6 +34,8 @@
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#ifndef __lightning_asm_h
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#define __lightning_asm_h
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#ifndef LIGHTNING_DEBUG
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/* OPCODE + i = immediate operand
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* + r = register operand
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* + m = memory operand (disp,base,index,scale)
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@ -42,20 +44,31 @@
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#include "asm-i386.h"
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#ifndef LIGHTNING_DEBUG
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#define _rA(R) _r4(R)
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#define _r_D( R, D ) (_Mrm(_b00,_rN(R),_b101 ) ,_jit_I((long)(D)))
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/* Use RIP-addressing in 64-bit mode, if possible */
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#define _r_X( R, D,B,I,S,O) (_r0P(I) ? (_r0P(B) ? _r_D (R,D ) : \
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(_rsp12P(B) ? _r_DBIS(R,D,_ESP,_ESP,1) : \
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_r_DB (R,D, B ))) : \
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(_r0P(B) ? _r_4IS (R,D, I,S) : \
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(!_rspP(I) ? _r_DBIS(R,D, B, I,S) : \
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JITFAIL("illegal index register: %esp"))))
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#define _m32only(X) (X)
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#define _m64only(X) JITFAIL("invalid instruction in 32-bit mode")
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#define _m64(X) ((void)0)
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#define CALLm(D,B,I,S) ((_r0P(B) && _r0P(I)) ? _O_D32 (0xe8 ,(long)(D) ) : \
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JITFAIL("illegal mode in direct jump"))
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#define CALLsr(R) CALLLsr(R)
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#define JMPsr(R) JMPLsr(R)
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#define JCCim(CC,D,B,I,S) ((_r0P(B) && _r0P(I)) ? _OO_D32 (0x0f80|(CC) ,(long)(D) ) : \
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JITFAIL("illegal mode in conditional jump"))
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#define _AH 0x24
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#define _CH 0x25
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#define _DH 0x26
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#define _BH 0x27
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#define JMPm(D,B,I,S) ((_r0P(B) && _r0P(I)) ? _O_D32 (0xe9 ,(long)(D) ) : \
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JITFAIL("illegal mode in direct jump"))
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#define DECWr(RD) (_d16(), _Or (0x48,_r2(RD) ))
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#define DECLr(RD) _Or (0x48,_r4(RD) )
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#define INCWr(RD) (_d16(), _Or (0x40,_r2(RD) ))
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#define INCLr(RD) _Or (0x40,_r4(RD) )
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#endif
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#endif /* __lightning_asm_h */
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@ -34,6 +34,8 @@
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#ifndef __lightning_asm_h
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#define __lightning_asm_h
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#ifndef LIGHTNING_DEBUG
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#include "asm-i386.h"
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/* OPCODE + i = immediate operand
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@ -43,101 +45,102 @@
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*/
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#ifndef LIGHTNING_DEBUG
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#define _R12 0x4C
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#define _R13 0x4D
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#define JIT_CALLTMPSTART 0x48
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#define JIT_REXTMP 0x4B
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#define _rA(R) _r8(R)
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#define _r_8B( R, D,B ) (_qMrm(_b10,_rN(R),_r8(B)) ,_jit_I((long)(D)))
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#define _r_8IS( R, D,I,S) (_qMrm(_b00,_rN(R),_b100 ),_SIB(_SCL(S),_r8(I),_b101 ),_jit_I((long)(D)))
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#define _r_8BIS(R, D,B,I,S) (_qMrm(_b10,_rN(R),_b100 ),_SIB(_SCL(S),_r8(I),_r8(B)),_jit_I((long)(D)))
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/* Use RIP-addressing in 64-bit mode, if possible */
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#if 0
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#define _x86_RIP_addressing_possible(D,O) (X86_RIP_RELATIVE_ADDR && \
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((unsigned long)x86_get_target() + 4 + (O) - (D) <= 0xffffffff))
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#define _qMrm(Md,R,M) _jit_B((_M(Md)<<6)|(_r((R & 0x7))<<3)|_m((M & 0x7)))
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#define _r_D( R, D ) (_Mrm(_b00,_rN(R),_b100 ),_SIB(0,_b100,_b101) ,_jit_I((long)(D)))
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#define _r_Q( R, D ) (_qMrm(_b00,_rN(R),_b100 ),_SIB(0,_b100,_b101) ,_jit_I((long)(D)))
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#define _REX(R,X,B) ( _jit_B(0x48|((R&0x8)>>1)|((X&0x8)>>2)|((B&0x8)>>3)) )
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#define _qO( OP, R,X,B ) ( _REX(R,X,B), _jit_B( OP ) )
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#define _qOr( OP,R ) ( _REX(0,0,R), _jit_B( (OP)|_r(R&0x7)) )
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#define _qOs( OP, B, R, M ) ( _REX(0, M, R), _Os(OP, B) )
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#define _qOr_Q( OP,R ,Q ) ( _qOr ( OP,R) ,_jit_L(Q) )
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#define _qO_Mrm( OP ,MO,R,M ) ( _qO ( OP,R,0,M),_qMrm(MO,R,M ) )
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#define _qO_Mrm_L( OP ,MO,R,M ,L ) ( _qO ( OP,R,0,M),_qMrm(MO,R,M ) ,_jit_I(L) )
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#define _qOs_Mrm_sL(OP ,MO,R,M ,L ) ( _qOs ( OP,L,R,M),_qMrm(MO,R,M ),_sL(L) )
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#define _qO_r_X( OP ,R ,MD,MB,MI,MS ) ( _qO ( OP,R,0,MS),_qr_X(R,MD,MB,MI,MS) )
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#define _qO_r_XB( OP ,R ,MD,MB,MI,MS ) ( _qO ( OP,R,0,MB),_qr_X(R,MD,MB,MI,MS) )
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#define _r_X( R, D,B,I,S,O) (_r0P(I) ? (_r0P(B) ? (!X86_TARGET_64BIT ? _r_D(R,D) : \
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(_x86_RIP_addressing_possible(D, O) ? \
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_r_D(R, (D) - ((unsigned long)x86_get_target() + 4 + (O))) : \
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_r_DSIB(R,D))) : \
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_r_DSIB(R,D )) : \
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(_rIP(B) ? _r_D (R,D ) : \
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(_rsp12P(B) ? _r_DBIS(R,D,_RSP,_RSP,1) : \
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_r_DB (R,D, B )))) : \
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(_r0P(B) ? _r_4IS (R,D, I,S) : \
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(!_rspP(I) ? _r_DBIS(R,D, B, I,S) : \
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JITFAIL("illegal index register: %esp"))))
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#else
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#define _r_X( R, D,B,I,S,O) (_r0P(I) ? (_r0P(B) ? _r_DSIB(R,D ) : \
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(_rIP(B) ? _r_D (R,D ) : \
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(_rsp12P(B) ? _r_DBIS(R,D,_RSP,_RSP,1) : \
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_r_DB (R,D, B )))) : \
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(_r0P(B) ? _r_4IS (R,D, I,S) : \
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(!_rspP(I) ? _r_DBIS(R,D, B, I,S) : \
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JITFAIL("illegal index register: %esp"))))
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#endif
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#define ADDQrr(RS, RD) _qO_Mrm (0x01 ,_b11,_r8(RS),_r8(RD) )
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#define ADDQir(IM, RD) _qOs_Mrm_sL (0x81 ,_b11,_b000 ,_r8(RD) ,IM )
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#define _m32only(X) (JITFAIL("invalid instruction in 64-bit mode"))
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#define _m64only(X) (X)
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#define _m64(X) (X)
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#define ANDQrr(RS, RD) _qO_Mrm (0x21 ,_b11,_r8(RS),_r8(RD) )
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#define ANDQir(IM, RD) _qOs_Mrm_sL (0x81 ,_b11,_b100 ,_r8(RD) ,IM )
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#define CALLsr(R) CALLQsr(R)
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#define JMPsr(R) JMPQsr(R)
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#define CALLm(D,B,I,S) (MOVQir((D), JIT_REXTMP), CALLQsr(JIT_REXTMP))
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#define _SPL 0x14
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#define _BPL 0x15
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#define _SIL 0x16
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#define _DIL 0x17
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#define _R8B 0x18
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#define _R9B 0x19
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#define _R10B 0x1A
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#define _R11B 0x1B
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#define _R12B 0x1C
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#define _R13B 0x1D
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#define _R14B 0x1E
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#define _R15B 0x1F
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#define CALLsr(R) _O_Mrm (0xff ,_b11,_b010,_r4(R) )
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#define CALLQsr(R) _qO_Mrm (0xff ,_b11,_b010,_r8(R))
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#define _R8W 0x38
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#define _R9W 0x39
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#define _R10W 0x3A
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#define _R11W 0x3B
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#define _R12W 0x3C
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#define _R13W 0x3D
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#define _R14W 0x3E
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#define _R15W 0x3F
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#define _R8D 0x48
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#define _R9D 0x49
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#define _R10D 0x4A
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#define _R11D 0x4B
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#define _R12D 0x4C
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#define _R13D 0x4D
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#define _R14D 0x4E
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#define _R15D 0x4F
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#define CMPQrr(RS, RD) _qO_Mrm (0x39 ,_b11,_r8(RS),_r8(RD) )
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#define CMPQir(IM, RD) _qO_Mrm_L (0x81 ,_b11,_b111 ,_r8(RD) ,IM )
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#define _RAX 0x50
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#define _RCX 0x51
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#define _RDX 0x52
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#define _RBX 0x53
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#define _RSP 0x54
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#define _RBP 0x55
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#define _RSI 0x56
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#define _RDI 0x57
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#define _R8 0x48
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#define _R9 0x49
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#define _R10 0x4A
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#define _R11 0x4B
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#define _R12 0x4C
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#define _R13 0x4D
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#define _R14 0x4E
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#define _R15 0x4F
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#define _RIP -2
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#define JCCim(CC,D,B,I,S) (!_jitl.long_jumps \
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? _OO_D32(0x0f80|(CC), (long)(D) ) \
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: (_O_D8(0x71^(CC), _jit_UL(_jit.x.pc) + 13), JMPm((long)D, 0, 0, 0)))
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#if 0
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#define _r8(R) ( (_rC(R) == 0x50) ? _rN(R) : JITFAIL("64-bit register required"))
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#else
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#define _r8(R) ( (_rC(R) == 0x50) ? _rN(R) : _r4(R))
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#endif
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#define JMPm(D,B,I,S) (!_jitl.long_jumps \
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? _O_D32(0xe9, (long)(D)) \
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: (MOVQir((D), JIT_REXTMP), _qO_Mrm(0xff,_b11,_b100,_r8(JIT_REXTMP))))
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#define _r1e8lP(R) ((int)(R) >= _SPL && (int)(R) <= _DIL)
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#define LEAQmr(MD, MB, MI, MS, RD) _qO_r_X (0x8d ,_r8(RD) ,MD,MB,MI,MS )
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#define MOVQmr(MD, MB, MI, MS, RD) _qO_r_X (0x8b ,_r8(RD) ,MD,MB,MI,MS )
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#define MOVQrm(RS, MD, MB, MI, MS) _qO_r_X (0x89 ,_r8(RS) ,MD,MB,MI,MS )
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#define MOVQrQm(RS, MD, MB, MI, MS) _qO_r_XB (0x89 ,_r8(RS) ,MD,MB,MI,MS )
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#define MOVQir(IM, R) _qOr_Q (0xb8,_r8(R) ,IM )
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#define MOVQrr(RS, RD) _qO_Mrm (0x89 ,_b11,_r8(RS),_r8(RD) )
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#define NEGQr(RD) _qO_Mrm (0xf7 ,_b11,_b011 ,_r8(RD) )
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#define ORQrr(RS, RD) _qO_Mrm (0x09 ,_b11,_r8(RS),_r8(RD) )
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#define ORQir(IM, RD) _qOs_Mrm_sL (0x81 ,_b11,_b001 ,_r8(RD) ,IM )
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#define POPQr(RD) _qOr (0x58,_r8(RD) )
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#define PUSHQr(R) _qOr (0x50,_r8(R) )
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#define SALQir SHLQir
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#define SALQim SHLQim
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#define SALQrr SHLQrr
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#define SALQrm SHLQrm
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#define SARQir(IM,RD) (((IM)==1) ? _qO_Mrm (0xd1 ,_b11,_b111,_r8(RD) ) : \
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_qO_Mrm_B (0xc1 ,_b11,_b111,_r4(RD) ,_u8(IM) ) )
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#define SARQrr(RS,RD) (((RS)==_CL) ? _qO_Mrm (0xd3 ,_b11,_b111,_r8(RD) ) : \
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JITFAIL ("source register must be CL" ) )
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#define SHLQir(IM,RD) (((IM)==1) ? _qO_Mrm (0xd1 ,_b11,_b100,_r8(RD) ) : \
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_qO_Mrm_B (0xc1 ,_b11,_b100,_r8(RD) ,_u8(IM) ) )
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#define SHLQrr(RS,RD) (((RS)==_CL) ? _qO_Mrm (0xd3 ,_b11,_b100,_r8(RD) ) : \
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JITFAIL ("source register must be CL" ) )
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#define SHRQir(IM,RD) (((IM)==1) ? _qO_Mrm (0xd1 ,_b11,_b101,_r8(RD) ) : \
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_qO_Mrm_B (0xc1 ,_b11,_b101,_r8(RD) ,_u8(IM) ) )
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#define SHRQrr(RS,RD) (((RS)==_CL) ? _qO_Mrm (0xd3 ,_b11,_b101,_r8(RD) ) : \
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JITFAIL ("source register must be CL" ) )
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#define SUBQrr(RS, RD) _qO_Mrm (0x29 ,_b11,_r8(RS),_r8(RD) )
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#define SUBQir(IM, RD) _qOs_Mrm_sL (0x81 ,_b11,_b101 ,_r8(RD) ,IM )
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#define TESTQrr(RS, RD) _qO_Mrm (0x85 ,_b11,_r8(RS),_r8(RD) )
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#define TESTQir(IM, RD) _qO_Mrm_L (0xf7 ,_b11,_b000 ,_r8(RD) ,IM )
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#define XORQrr(RS, RD) _qO_Mrm (0x31 ,_b11,_r8(RS),_r8(RD) )
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#define XORQir(IM, RD) _qOs_Mrm_sL (0x81 ,_b11,_b110 ,_r8(RD) ,IM )
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#define DECWr(RD) (_d16(), _REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b001 ,_r2(RD) ))
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#define DECLr(RD) (_REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b001 ,_r4(RD) ))
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#define INCWr(RD) (_d16(), _REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b000 ,_r2(RD) ))
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#define INCLr(RD) (_REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b000 ,_r4(RD) ))
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#endif
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#endif /* __lightning_asm_h */
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File diff suppressed because it is too large
Load diff
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@ -46,8 +46,8 @@ struct jit_local_state {
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int alloca_slack;
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};
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#define jit_base_prolog() (PUSHLr(_EBP), MOVLrr(_ESP, _EBP), PUSHLr(_EBX), PUSHLr(_ESI), PUSHLr(_EDI))
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#define jit_prolog(n) (_jitl.framesize = 8, _jitl.alloca_offset = -12, jit_base_prolog())
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#define jit_base_prolog() (PUSHLr(_EBX), PUSHLr(_ESI), PUSHLr(_EDI), PUSHLr(_EBP), MOVLrr(_ESP, _EBP))
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#define jit_prolog(n) (_jitl.framesize = 20, _jitl.alloca_offset = 0, jit_base_prolog())
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/* Used internally. SLACK is used by the Darwin ABI which keeps the stack
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aligned to 16-bytes. */
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@ -63,10 +63,8 @@ struct jit_local_state {
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_jitl.alloca_offset -= (amount))
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/* Stack */
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#ifdef JIT_NEED_PUSH_POP
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#define jit_pushr_i(rs) PUSHLr(rs)
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#define jit_popr_i(rs) POPLr(rs)
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#endif
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/* The += in argssize allows for stack pollution */
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@ -103,7 +101,33 @@ struct jit_local_state {
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|
||||
#define jit_patch_long_at(jump_pc,v) (*_PSL((jump_pc) - sizeof(long)) = _jit_SL((jit_insn *)(v) - (jump_pc)))
|
||||
#define jit_patch_at(jump_pc,v) jit_patch_long_at(jump_pc, v)
|
||||
#define jit_ret() (POPLr(_EDI), POPLr(_ESI), POPLr(_EBX), (_jitl.alloca_offset < -12 ? LEAVE_() : POPLr(_EBP)), RET_())
|
||||
#define jit_ret() ((_jitl.alloca_offset < 0 ? LEAVE_() : POPLr(_EBP)), POPLr(_EDI), POPLr(_ESI), POPLr(_EBX), RET_())
|
||||
|
||||
/* Memory */
|
||||
|
||||
#define jit_ldi_c(d, is) MOVSBLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldxi_c(d, rs, is) MOVSBLmr((is), (rs), 0, 0, (d))
|
||||
|
||||
#define jit_ldi_uc(d, is) MOVZBLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldxi_uc(d, rs, is) MOVZBLmr((is), (rs), 0, 0, (d))
|
||||
|
||||
#define jit_sti_c(id, rs) jit_movbrm((rs), (id), 0, 0, 0)
|
||||
#define jit_stxi_c(id, rd, rs) jit_movbrm((rs), (id), (rd), 0, 0)
|
||||
|
||||
#define jit_ldi_s(d, is) MOVSWLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldxi_s(d, rs, is) MOVSWLmr((is), (rs), 0, 0, (d))
|
||||
|
||||
#define jit_ldi_us(d, is) MOVZWLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldxi_us(d, rs, is) MOVZWLmr((is), (rs), 0, 0, (d))
|
||||
|
||||
#define jit_sti_s(id, rs) MOVWrm(jit_reg16(rs), (id), 0, 0, 0)
|
||||
#define jit_stxi_s(id, rd, rs) MOVWrm(jit_reg16(rs), (id), (rd), 0, 0)
|
||||
|
||||
#define jit_ldi_i(d, is) MOVLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldxi_i(d, rs, is) MOVLmr((is), (rs), 0, 0, (d))
|
||||
|
||||
#define jit_sti_i(id, rs) MOVLrm((rs), (id), 0, 0, 0)
|
||||
#define jit_stxi_i(id, rd, rs) MOVLrm((rs), (id), (rd), 0, 0)
|
||||
|
||||
#endif /* __lightning_core_h */
|
||||
|
||||
|
|
|
|||
|
|
@ -36,6 +36,8 @@
|
|||
|
||||
/* Used to implement ldc, stc, ... */
|
||||
#define JIT_CAN_16 0
|
||||
#define JIT_CALLTMPSTART 0x48
|
||||
#define JIT_REXTMP 0x4B
|
||||
|
||||
#include "core-i386.h"
|
||||
|
||||
|
|
@ -106,13 +108,11 @@ struct jit_local_state {
|
|||
#define jit_rshr_ul(d, r1, r2) jit_replace((r1), (r2), _ECX, jit_qop_ ((d), (r1), SHRQrr(_CL, (d)) ))
|
||||
|
||||
/* Stack */
|
||||
#ifdef JIT_NEED_PUSH_POP
|
||||
#define jit_pushr_i(rs) PUSHQr(rs)
|
||||
#define jit_popr_i(rs) POPQr(rs)
|
||||
#endif
|
||||
|
||||
#define jit_base_prolog() (PUSHQr(_EBP), MOVQrr(_ESP, _EBP), PUSHQr(_EBX), PUSHQr(_R12), PUSHQr(_R13))
|
||||
#define jit_prolog(n) (_jitl.nextarg_geti = 0, _jitl.alloca_offset = -24, jit_base_prolog())
|
||||
#define jit_base_prolog() (PUSHQr(_EBX), PUSHQr(_R12), PUSHQr(_R13), PUSHQr(_EBP), MOVQrr(_ESP, _EBP))
|
||||
#define jit_prolog(n) (_jitl.nextarg_geti = 0, _jitl.alloca_offset = 0, jit_base_prolog())
|
||||
|
||||
/* Stack isn't used for arguments: */
|
||||
#define jit_prepare_i(ni) (_jitl.argssize = 0)
|
||||
|
|
@ -122,7 +122,7 @@ struct jit_local_state {
|
|||
#define jit_reg_is_arg(reg) ((reg == _EDI) || (reg ==_ESI) || (reg == _EDX))
|
||||
#define jit_finishr(reg) ((jit_reg_is_arg((reg)) ? MOVQrr(reg, JIT_REXTMP) : (void)0), \
|
||||
jit_shift_args(), \
|
||||
jit_reg_is_arg((reg)) ? CALQsr((JIT_REXTMP)) : jit_callr((reg)), \
|
||||
jit_reg_is_arg((reg)) ? CALLsr((JIT_REXTMP)) : jit_callr((reg)), \
|
||||
jit_restore_locals())
|
||||
|
||||
/* R12 and R13 are callee-save, instead of EDI and ESI. Can be improved. */
|
||||
|
|
@ -162,22 +162,22 @@ static int jit_arg_reg_order[] = { _EDI, _ESI, _EDX, _ECX };
|
|||
: MOVQir((is), (d))) \
|
||||
: XORLrr ((d), (d)) )
|
||||
|
||||
#define jit_bmsr_l(label, s1, s2) (TESTQrr((s1), (s2)), JNZm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bmcr_l(label, s1, s2) (TESTQrr((s1), (s2)), JZm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddr_l(label, s1, s2) (ADDQrr((s2), (s1)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubr_l(label, s1, s2) (SUBQrr((s2), (s1)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddr_ul(label, s1, s2) (ADDQrr((s2), (s1)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubr_ul(label, s1, s2) (SUBQrr((s2), (s1)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bmsr_l(label, s1, s2) (TESTQrr((s1), (s2)), JNZm(label), _jit.x.pc)
|
||||
#define jit_bmcr_l(label, s1, s2) (TESTQrr((s1), (s2)), JZm(label), _jit.x.pc)
|
||||
#define jit_boaddr_l(label, s1, s2) (ADDQrr((s2), (s1)), JOm(label), _jit.x.pc)
|
||||
#define jit_bosubr_l(label, s1, s2) (SUBQrr((s2), (s1)), JOm(label), _jit.x.pc)
|
||||
#define jit_boaddr_ul(label, s1, s2) (ADDQrr((s2), (s1)), JCm(label), _jit.x.pc)
|
||||
#define jit_bosubr_ul(label, s1, s2) (SUBQrr((s2), (s1)), JCm(label), _jit.x.pc)
|
||||
|
||||
#define jit_boaddi_l(label, rs, is) (ADDQir((is), (rs)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubi_l(label, rs, is) (SUBQir((is), (rs)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddi_ul(label, rs, is) (ADDQir((is), (rs)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubi_ul(label, rs, is) (SUBQir((is), (rs)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddi_l(label, rs, is) (ADDQir((is), (rs)), JOm(label), _jit.x.pc)
|
||||
#define jit_bosubi_l(label, rs, is) (SUBQir((is), (rs)), JOm(label), _jit.x.pc)
|
||||
#define jit_boaddi_ul(label, rs, is) (ADDQir((is), (rs)), JCm(label), _jit.x.pc)
|
||||
#define jit_bosubi_ul(label, rs, is) (SUBQir((is), (rs)), JCm(label), _jit.x.pc)
|
||||
|
||||
#define jit_patch_long_at(jump_pc,v) (*_PSL((jump_pc) - sizeof(long)) = _jit_SL((jit_insn *)(v)))
|
||||
#define jit_patch_short_at(jump_pc,v) (*_PSI((jump_pc) - sizeof(int)) = _jit_SI((jit_insn *)(v) - (jump_pc)))
|
||||
#define jit_patch_at(jump_pc,v) (_jitl.long_jumps ? jit_patch_long_at((jump_pc)-3, v) : jit_patch_short_at(jump_pc, v))
|
||||
#define jit_ret() (POPQr(_R13), POPQr(_R12), POPQr(_EBX), (_jitl.alloca_offset < -24 ? LEAVE_() : POPQr(_EBP)), RET_())
|
||||
#define jit_ret() ((_jitl.alloca_offset < -24 ? LEAVE_() : POPQr(_EBP)), POPQr(_R13), POPQr(_R12), POPQr(_EBX), RET_())
|
||||
|
||||
#define _jit_ldi_l(d, is) MOVQmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldr_l(d, rs) MOVQmr(0, (rs), 0, 0, (d))
|
||||
|
|
@ -189,19 +189,44 @@ static int jit_arg_reg_order[] = { _EDI, _ESI, _EDX, _ECX };
|
|||
#define jit_stxr_l(d1, d2, rs) MOVQrm((rs), 0, (d1), (d2), 1)
|
||||
#define jit_stxi_l(id, rd, rs) MOVQrm((rs), (id), (rd), 0, 0)
|
||||
|
||||
#define jit_ldi_l(d, is) (_u32P((long)(is)) ? _jit_ldi_l(d, is) : (jit_movi_l(d, is), jit_ldr_l(d, d)))
|
||||
#define jit_sti_l(id, rs) (_u32P((long)(id)) ? _jit_sti_l(id, rs) : (jit_movi_l(JIT_REXTMP, id), MOVQrQm(rs, 0, JIT_REXTMP, 0, 0)))
|
||||
#define jit_ldi_l(d, is) (_u32P((long)(is)) ? _jit_ldi_l((d), (is)) : (jit_movi_l(JIT_REXTMP, (is)), jit_ldr_l(JIT_REXTMP)))
|
||||
#define jit_sti_l(id, rs) (_u32P((long)(id)) ? _jit_sti_l(id, rs) : (jit_movi_l(JIT_REXTMP, id), jit_str_l (JIT_REXTMP, (rs))))
|
||||
|
||||
#define jit_blti_l(label, rs, is) jit_bra_l0((rs), (is), JLm(label, 0,0,0), JSm(label, 0,0,0) )
|
||||
#define jit_blei_l(label, rs, is) jit_bra_l ((rs), (is), JLEm(label,0,0,0) )
|
||||
#define jit_bgti_l(label, rs, is) jit_bra_l ((rs), (is), JGm(label, 0,0,0) )
|
||||
#define jit_bgei_l(label, rs, is) jit_bra_l0((rs), (is), JGEm(label,0,0,0), JNSm(label,0,0,0) )
|
||||
#define jit_beqi_l(label, rs, is) jit_bra_l0((rs), (is), JEm(label, 0,0,0), JEm(label, 0,0,0) )
|
||||
#define jit_bnei_l(label, rs, is) jit_bra_l0((rs), (is), JNEm(label,0,0,0), JNEm(label,0,0,0) )
|
||||
#define jit_blti_ul(label, rs, is) jit_bra_l ((rs), (is), JBm(label, 0,0,0) )
|
||||
#define jit_blei_ul(label, rs, is) jit_bra_l0((rs), (is), JBEm(label,0,0,0), JEm(label, 0,0,0) )
|
||||
#define jit_bgti_ul(label, rs, is) jit_bra_l0((rs), (is), JAm(label, 0,0,0), JNEm(label,0,0,0) )
|
||||
#define jit_bgei_ul(label, rs, is) jit_bra_l ((rs), (is), JAEm(label,0,0,0) )
|
||||
/* Memory */
|
||||
#define jit_ldi_c(d, is) (_u32P((long)(is)) ? MOVSBLmr((is), 0, 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldr_c(d, JIT_REXTMP)))
|
||||
#define jit_ldxi_c(d, rs, is) (_u32P((long)(is)) ? MOVSBLmr((is), (rs), 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldxr_c(d, rs, JIT_REXTMP)))
|
||||
|
||||
#define jit_ldi_uc(d, is) (_u32P((long)(is)) ? MOVZBLmr((is), 0, 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldr_uc(d, JIT_REXTMP)))
|
||||
#define jit_ldxi_uc(d, rs, is) (_u32P((long)(is)) ? MOVZBLmr((is), (rs), 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldxr_uc(d, rs, JIT_REXTMP)))
|
||||
|
||||
#define jit_sti_c(id, rs) (_u32P((long)(id)) ? jit_movbrm((rs), (id), 0, 0, 0) : (jit_movi_l(JIT_REXTMP, id), jit_str_c(JIT_REXTMP, rs)))
|
||||
#define jit_stxi_c(id, rd, rs) (_u32P((long)(id)) ? jit_movbrm((rs), (id), (rd), 0, 0) : (jit_movi_l(JIT_REXTMP, id), jit_stxr_c(JIT_REXTMP, rd, rs)))
|
||||
|
||||
#define jit_ldi_s(d, is) (_u32P((long)(is)) ? MOVSWLmr((is), 0, 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldr_s(d, JIT_REXTMP)))
|
||||
#define jit_ldxi_s(d, rs, is) (_u32P((long)(is)) ? MOVSWLmr((is), (rs), 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldxr_s(d, rs, JIT_REXTMP)))
|
||||
|
||||
#define jit_ldi_us(d, is) (_u32P((long)(is)) ? MOVZWLmr((is), 0, 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldr_us(d, JIT_REXTMP)))
|
||||
#define jit_ldxi_us(d, rs, is) (_u32P((long)(is)) ? MOVZWLmr((is), (rs), 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldxr_us(d, rs, JIT_REXTMP)))
|
||||
|
||||
#define jit_sti_s(id, rs) (_u32P((long)(id)) ? MOVWrm(jit_reg16(rs), (id), 0, 0, 0) : (jit_movi_l(JIT_REXTMP, id), jit_str_s(JIT_REXTMP, rs)))
|
||||
#define jit_stxi_s(id, rd, rs) (_u32P((long)(id)) ? MOVWrm(jit_reg16(rs), (id), (rd), 0, 0) : (jit_movi_l(JIT_REXTMP, id), jit_stxr_s(JIT_REXTMP, rd, rs)))
|
||||
|
||||
#define jit_ldi_i(d, is) (_u32P((long)(is)) ? MOVLmr((is), 0, 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldr_i(d, JIT_REXTMP)))
|
||||
#define jit_ldxi_i(d, rs, is) (_u32P((long)(is)) ? MOVLmr((is), (rs), 0, 0, (d)) : (jit_movi_l(JIT_REXTMP, is), jit_ldxr_i(d, rs, JIT_REXTMP)))
|
||||
|
||||
#define jit_sti_i(id, rs) (_u32P((long)(id)) ? MOVLrm((rs), (id), 0, 0, 0) : (jit_movi_l(JIT_REXTMP, id), jit_str_i(JIT_REXTMP, rs)))
|
||||
#define jit_stxi_i(id, rd, rs) (_u32P((long)(id)) ? MOVLrm((rs), (id), (rd), 0, 0) : (jit_movi_l(JIT_REXTMP, id), jit_stxr_i(JIT_REXTMP, rd, rs)))
|
||||
|
||||
#define jit_blti_l(label, rs, is) jit_bra_l0((rs), (is), JLm(label), JSm(label) )
|
||||
#define jit_blei_l(label, rs, is) jit_bra_l ((rs), (is), JLEm(label) )
|
||||
#define jit_bgti_l(label, rs, is) jit_bra_l ((rs), (is), JGm(label) )
|
||||
#define jit_bgei_l(label, rs, is) jit_bra_l0((rs), (is), JGEm(label), JNSm(label) )
|
||||
#define jit_beqi_l(label, rs, is) jit_bra_l0((rs), (is), JEm(label), JEm(label) )
|
||||
#define jit_bnei_l(label, rs, is) jit_bra_l0((rs), (is), JNEm(label), JNEm(label) )
|
||||
#define jit_blti_ul(label, rs, is) jit_bra_l ((rs), (is), JBm(label) )
|
||||
#define jit_blei_ul(label, rs, is) jit_bra_l0((rs), (is), JBEm(label), JEm(label) )
|
||||
#define jit_bgti_ul(label, rs, is) jit_bra_l0((rs), (is), JAm(label), JNEm(label) )
|
||||
#define jit_bgei_ul(label, rs, is) jit_bra_l ((rs), (is), JAEm(label) )
|
||||
#define jit_bmsi_l(label, rs, is) jit_bmsi_i(label, rs, is)
|
||||
#define jit_bmci_l(label, rs, is) jit_bmci_i(label, rs, is)
|
||||
|
||||
|
|
@ -210,16 +235,16 @@ static int jit_arg_reg_order[] = { _EDI, _ESI, _EDX, _ECX };
|
|||
|
||||
#define jit_pusharg_l(rs) jit_pusharg_i(rs)
|
||||
#define jit_retval_l(rd) ((void)jit_movr_l ((rd), _EAX))
|
||||
#define jit_bltr_l(label, s1, s2) jit_bra_qr((s1), (s2), JLm(label, 0,0,0) )
|
||||
#define jit_bler_l(label, s1, s2) jit_bra_qr((s1), (s2), JLEm(label,0,0,0) )
|
||||
#define jit_bgtr_l(label, s1, s2) jit_bra_qr((s1), (s2), JGm(label, 0,0,0) )
|
||||
#define jit_bger_l(label, s1, s2) jit_bra_qr((s1), (s2), JGEm(label,0,0,0) )
|
||||
#define jit_beqr_l(label, s1, s2) jit_bra_qr((s1), (s2), JEm(label, 0,0,0) )
|
||||
#define jit_bner_l(label, s1, s2) jit_bra_qr((s1), (s2), JNEm(label,0,0,0) )
|
||||
#define jit_bltr_ul(label, s1, s2) jit_bra_qr((s1), (s2), JBm(label, 0,0,0) )
|
||||
#define jit_bler_ul(label, s1, s2) jit_bra_qr((s1), (s2), JBEm(label,0,0,0) )
|
||||
#define jit_bgtr_ul(label, s1, s2) jit_bra_qr((s1), (s2), JAm(label, 0,0,0) )
|
||||
#define jit_bger_ul(label, s1, s2) jit_bra_qr((s1), (s2), JAEm(label,0,0,0) )
|
||||
#define jit_bltr_l(label, s1, s2) jit_bra_qr((s1), (s2), JLm(label) )
|
||||
#define jit_bler_l(label, s1, s2) jit_bra_qr((s1), (s2), JLEm(label) )
|
||||
#define jit_bgtr_l(label, s1, s2) jit_bra_qr((s1), (s2), JGm(label) )
|
||||
#define jit_bger_l(label, s1, s2) jit_bra_qr((s1), (s2), JGEm(label) )
|
||||
#define jit_beqr_l(label, s1, s2) jit_bra_qr((s1), (s2), JEm(label) )
|
||||
#define jit_bner_l(label, s1, s2) jit_bra_qr((s1), (s2), JNEm(label) )
|
||||
#define jit_bltr_ul(label, s1, s2) jit_bra_qr((s1), (s2), JBm(label) )
|
||||
#define jit_bler_ul(label, s1, s2) jit_bra_qr((s1), (s2), JBEm(label) )
|
||||
#define jit_bgtr_ul(label, s1, s2) jit_bra_qr((s1), (s2), JAm(label) )
|
||||
#define jit_bger_ul(label, s1, s2) jit_bra_qr((s1), (s2), JAEm(label) )
|
||||
|
||||
#endif /* __lightning_core_h */
|
||||
|
||||
|
|
|
|||
|
|
@ -66,13 +66,13 @@
|
|||
/* An operand is forced into a register */
|
||||
#define jit_replace(rd, rs, forced, op) \
|
||||
((rd == forced) ? JITSORRY("Register conflict for " # op) : \
|
||||
(rs == forced) ? op : (PUSHLr(forced), MOVLrr(rs, forced), op, POPLr(forced)))
|
||||
(rs == forced) ? op : (jit_pushr_i(forced), MOVLrr(rs, forced), op, jit_popr_i(forced)))
|
||||
|
||||
/* For LT, LE, ... */
|
||||
#define jit_replace8(d, op) \
|
||||
(jit_check8(d) \
|
||||
? (MOVLir(0, d), op(d)) \
|
||||
: (PUSHLr(_EAX), MOVLir(0, _EAX), op(_EAX), MOVLrr(_EAX, (d)), POPLr(_EAX)))
|
||||
: (jit_pushr_i(_EAX), MOVLir(0, _EAX), op(_EAX), MOVLrr(_EAX, (d)), jit_popr_i(_EAX)))
|
||||
|
||||
#define jit_bool_r(d, s1, s2, op) \
|
||||
(CMPLrr(s2, s1), jit_replace8(d, op))
|
||||
|
|
@ -96,8 +96,8 @@
|
|||
|
||||
/* Used to implement ldc, stc, ... */
|
||||
#define jit_check8(rs) ( (rs) <= _EBX )
|
||||
#define jit_reg8(rs) ( ((rs) == _SI || (rs) == _DI) ? _AL : ((rs) & _BH) | _AL )
|
||||
#define jit_reg16(rs) ( ((rs) & _BH) | _AX )
|
||||
#define jit_reg8(rs) ( ((rs) == _SI || (rs) == _DI) ? _AL : (_rN(rs) | _AL ))
|
||||
#define jit_reg16(rs) ( _rN(rs) | _AX )
|
||||
|
||||
/* In jit_replace below, _EBX is dummy */
|
||||
#define jit_movbrm(rs, dd, db, di, ds) \
|
||||
|
|
@ -129,62 +129,62 @@
|
|||
IMULLr(rs == _EAX ? _EDX : rs))
|
||||
|
||||
#define jit_divi_i_(result, d, rs, is) \
|
||||
(jit_might (d, _EAX, PUSHLr(_EAX)), \
|
||||
jit_might (d, _ECX, PUSHLr(_ECX)), \
|
||||
jit_might (d, _EDX, PUSHLr(_EDX)), \
|
||||
(jit_might (d, _EAX, jit_pushr_i(_EAX)), \
|
||||
jit_might (d, _ECX, jit_pushr_i(_ECX)), \
|
||||
jit_might (d, _EDX, jit_pushr_i(_EDX)), \
|
||||
jit_might (rs, _EAX, MOVLrr(rs, _EAX)), \
|
||||
jit_might (rs, _EDX, MOVLrr(rs, _EDX)), \
|
||||
MOVLir(is, _ECX), \
|
||||
SARLir(31, _EDX), \
|
||||
IDIVLr(_ECX), \
|
||||
jit_might(d, result, MOVLrr(result, d)), \
|
||||
jit_might(d, _EDX, POPLr(_EDX)), \
|
||||
jit_might(d, _ECX, POPLr(_ECX)), \
|
||||
jit_might(d, _EAX, POPLr(_EAX)))
|
||||
jit_might(d, _EDX, jit_popr_i(_EDX)), \
|
||||
jit_might(d, _ECX, jit_popr_i(_ECX)), \
|
||||
jit_might(d, _EAX, jit_popr_i(_EAX)))
|
||||
|
||||
#define jit_divr_i_(result, d, s1, s2) \
|
||||
(jit_might (d, _EAX, PUSHLr(_EAX)), \
|
||||
jit_might (d, _ECX, PUSHLr(_ECX)), \
|
||||
jit_might (d, _EDX, PUSHLr(_EDX)), \
|
||||
((s1 == _ECX) ? PUSHLr(_ECX) : 0), \
|
||||
(jit_might (d, _EAX, jit_pushr_i(_EAX)), \
|
||||
jit_might (d, _ECX, jit_pushr_i(_ECX)), \
|
||||
jit_might (d, _EDX, jit_pushr_i(_EDX)), \
|
||||
((s1 == _ECX) ? jit_pushr_i(_ECX) : 0), \
|
||||
jit_might (s2, _ECX, MOVLrr(s2, _ECX)), \
|
||||
((s1 == _ECX) ? POPLr(_EDX) : \
|
||||
((s1 == _ECX) ? jit_popr_i(_EDX) : \
|
||||
jit_might (s1, _EDX, MOVLrr(s1, _EDX))), \
|
||||
MOVLrr(_EDX, _EAX), \
|
||||
SARLir(31, _EDX), \
|
||||
IDIVLr(_ECX), \
|
||||
jit_might(d, result, MOVLrr(result, d)), \
|
||||
jit_might(d, _EDX, POPLr(_EDX)), \
|
||||
jit_might(d, _ECX, POPLr(_ECX)), \
|
||||
jit_might(d, _EAX, POPLr(_EAX)))
|
||||
jit_might(d, _EDX, jit_popr_i(_EDX)), \
|
||||
jit_might(d, _ECX, jit_popr_i(_ECX)), \
|
||||
jit_might(d, _EAX, jit_popr_i(_EAX)))
|
||||
|
||||
#define jit_divi_ui_(result, d, rs, is) \
|
||||
(jit_might (d, _EAX, PUSHLr(_EAX)), \
|
||||
jit_might (d, _ECX, PUSHLr(_ECX)), \
|
||||
jit_might (d, _EDX, PUSHLr(_EDX)), \
|
||||
(jit_might (d, _EAX, jit_pushr_i(_EAX)), \
|
||||
jit_might (d, _ECX, jit_pushr_i(_ECX)), \
|
||||
jit_might (d, _EDX, jit_pushr_i(_EDX)), \
|
||||
jit_might (rs, _EAX, MOVLrr(rs, _EAX)), \
|
||||
MOVLir(is, _ECX), \
|
||||
XORLrr(_EDX, _EDX), \
|
||||
DIVLr(_ECX), \
|
||||
jit_might(d, result, MOVLrr(result, d)), \
|
||||
jit_might(d, _EDX, POPLr(_EDX)), \
|
||||
jit_might(d, _ECX, POPLr(_ECX)), \
|
||||
jit_might(d, _EAX, POPLr(_EAX)))
|
||||
jit_might(d, _EDX, jit_popr_i(_EDX)), \
|
||||
jit_might(d, _ECX, jit_popr_i(_ECX)), \
|
||||
jit_might(d, _EAX, jit_popr_i(_EAX)))
|
||||
|
||||
#define jit_divr_ui_(result, d, s1, s2) \
|
||||
(jit_might (d, _EAX, PUSHLr(_EAX)), \
|
||||
jit_might (d, _ECX, PUSHLr(_ECX)), \
|
||||
jit_might (d, _EDX, PUSHLr(_EDX)), \
|
||||
((s1 == _ECX) ? PUSHLr(_ECX) : 0), \
|
||||
(jit_might (d, _EAX, jit_pushr_i(_EAX)), \
|
||||
jit_might (d, _ECX, jit_pushr_i(_ECX)), \
|
||||
jit_might (d, _EDX, jit_pushr_i(_EDX)), \
|
||||
((s1 == _ECX) ? jit_pushr_i(_ECX) : 0), \
|
||||
jit_might (s2, _ECX, MOVLrr(s2, _ECX)), \
|
||||
((s1 == _ECX) ? POPLr(_EAX) : \
|
||||
((s1 == _ECX) ? jit_popr_i(_EAX) : \
|
||||
jit_might (s1, _EAX, MOVLrr(s1, _EAX))), \
|
||||
XORLrr(_EDX, _EDX), \
|
||||
DIVLr(_ECX), \
|
||||
jit_might(d, result, MOVLrr(result, d)), \
|
||||
jit_might(d, _EDX, POPLr(_EDX)), \
|
||||
jit_might(d, _ECX, POPLr(_ECX)), \
|
||||
jit_might(d, _EAX, POPLr(_EAX)))
|
||||
jit_might(d, _EDX, jit_popr_i(_EDX)), \
|
||||
jit_might(d, _ECX, jit_popr_i(_ECX)), \
|
||||
jit_might(d, _EAX, jit_popr_i(_EAX)))
|
||||
|
||||
|
||||
/* ALU */
|
||||
|
|
@ -217,24 +217,24 @@
|
|||
#define jit_mulr_ui(d, s1, s2) jit_opr_((d), (s1), (s2), IMULLrr((s1), (d)), IMULLrr((s2), (d)) )
|
||||
|
||||
#define jit_hmuli_i(d, rs, is) \
|
||||
((d) == _EDX ? ( PUSHLr(_EAX), jit_muli_i_((is), (rs)), POPLr(_EAX) ) : \
|
||||
((d) == _EAX ? (PUSHLr(_EDX), jit_muli_i_((is), (rs)), MOVLrr(_EDX, _EAX), POPLr(_EDX) ) : \
|
||||
(PUSHLr(_EDX), PUSHLr(_EAX), jit_muli_i_((is), (rs)), MOVLrr(_EDX, (d)), POPLr(_EAX), POPLr(_EDX) )))
|
||||
((d) == _EDX ? ( jit_pushr_i(_EAX), jit_muli_i_((is), (rs)), jit_popr_i(_EAX) ) : \
|
||||
((d) == _EAX ? (jit_pushr_i(_EDX), jit_muli_i_((is), (rs)), MOVLrr(_EDX, _EAX), jit_popr_i(_EDX) ) : \
|
||||
(jit_pushr_i(_EDX), jit_pushr_i(_EAX), jit_muli_i_((is), (rs)), MOVLrr(_EDX, (d)), jit_popr_i(_EAX), jit_popr_i(_EDX) )))
|
||||
|
||||
#define jit_hmulr_i(d, s1, s2) \
|
||||
((d) == _EDX ? ( PUSHLr(_EAX), jit_mulr_i_((s1), (s2)), POPLr(_EAX) ) : \
|
||||
((d) == _EAX ? (PUSHLr(_EDX), jit_mulr_i_((s1), (s2)), MOVLrr(_EDX, _EAX), POPLr(_EDX) ) : \
|
||||
(PUSHLr(_EDX), PUSHLr(_EAX), jit_mulr_i_((s1), (s2)), MOVLrr(_EDX, (d)), POPLr(_EAX), POPLr(_EDX) )))
|
||||
((d) == _EDX ? ( jit_pushr_i(_EAX), jit_mulr_i_((s1), (s2)), jit_popr_i(_EAX) ) : \
|
||||
((d) == _EAX ? (jit_pushr_i(_EDX), jit_mulr_i_((s1), (s2)), MOVLrr(_EDX, _EAX), jit_popr_i(_EDX) ) : \
|
||||
(jit_pushr_i(_EDX), jit_pushr_i(_EAX), jit_mulr_i_((s1), (s2)), MOVLrr(_EDX, (d)), jit_popr_i(_EAX), jit_popr_i(_EDX) )))
|
||||
|
||||
#define jit_hmuli_ui(d, rs, is) \
|
||||
((d) == _EDX ? ( PUSHLr(_EAX), jit_muli_ui_((is), (rs)), POPLr(_EAX) ) : \
|
||||
((d) == _EAX ? (PUSHLr(_EDX), jit_muli_ui_((is), (rs)), MOVLrr(_EDX, _EAX), POPLr(_EDX) ) : \
|
||||
(PUSHLr(_EDX), PUSHLr(_EAX), jit_muli_ui_((is), (rs)), MOVLrr(_EDX, (d)), POPLr(_EAX), POPLr(_EDX) )))
|
||||
((d) == _EDX ? ( jit_pushr_i(_EAX), jit_muli_ui_((is), (rs)), jit_popr_i(_EAX) ) : \
|
||||
((d) == _EAX ? (jit_pushr_i(_EDX), jit_muli_ui_((is), (rs)), MOVLrr(_EDX, _EAX), jit_popr_i(_EDX) ) : \
|
||||
(jit_pushr_i(_EDX), jit_pushr_i(_EAX), jit_muli_ui_((is), (rs)), MOVLrr(_EDX, (d)), jit_popr_i(_EAX), jit_popr_i(_EDX) )))
|
||||
|
||||
#define jit_hmulr_ui(d, s1, s2) \
|
||||
((d) == _EDX ? ( PUSHLr(_EAX), jit_mulr_ui_((s1), (s2)), POPLr(_EAX) ) : \
|
||||
((d) == _EAX ? (PUSHLr(_EDX), jit_mulr_ui_((s1), (s2)), MOVLrr(_EDX, _EAX), POPLr(_EDX) ) : \
|
||||
(PUSHLr(_EDX), PUSHLr(_EAX), jit_mulr_ui_((s1), (s2)), MOVLrr(_EDX, (d)), POPLr(_EAX), POPLr(_EDX) )))
|
||||
((d) == _EDX ? ( jit_pushr_i(_EAX), jit_mulr_ui_((s1), (s2)), jit_popr_i(_EAX) ) : \
|
||||
((d) == _EAX ? (jit_pushr_i(_EDX), jit_mulr_ui_((s1), (s2)), MOVLrr(_EDX, _EAX), jit_popr_i(_EDX) ) : \
|
||||
(jit_pushr_i(_EDX), jit_pushr_i(_EAX), jit_mulr_ui_((s1), (s2)), MOVLrr(_EDX, (d)), jit_popr_i(_EAX), jit_popr_i(_EDX) )))
|
||||
|
||||
#define jit_divi_i(d, rs, is) jit_divi_i_(_EAX, (d), (rs), (is))
|
||||
#define jit_divi_ui(d, rs, is) jit_divi_ui_(_EAX, (d), (rs), (is))
|
||||
|
|
@ -297,87 +297,70 @@
|
|||
#define jit_gei_ui(d, rs, is) jit_bool_i0((d), (rs), (is), SETAEr, INCLr )
|
||||
|
||||
/* Jump */
|
||||
#define jit_bltr_i(label, s1, s2) jit_bra_r((s1), (s2), JLm(label, 0,0,0) )
|
||||
#define jit_bler_i(label, s1, s2) jit_bra_r((s1), (s2), JLEm(label,0,0,0) )
|
||||
#define jit_bgtr_i(label, s1, s2) jit_bra_r((s1), (s2), JGm(label, 0,0,0) )
|
||||
#define jit_bger_i(label, s1, s2) jit_bra_r((s1), (s2), JGEm(label,0,0,0) )
|
||||
#define jit_beqr_i(label, s1, s2) jit_bra_r((s1), (s2), JEm(label, 0,0,0) )
|
||||
#define jit_bner_i(label, s1, s2) jit_bra_r((s1), (s2), JNEm(label,0,0,0) )
|
||||
#define jit_bltr_ui(label, s1, s2) jit_bra_r((s1), (s2), JBm(label, 0,0,0) )
|
||||
#define jit_bler_ui(label, s1, s2) jit_bra_r((s1), (s2), JBEm(label,0,0,0) )
|
||||
#define jit_bgtr_ui(label, s1, s2) jit_bra_r((s1), (s2), JAm(label, 0,0,0) )
|
||||
#define jit_bger_ui(label, s1, s2) jit_bra_r((s1), (s2), JAEm(label,0,0,0) )
|
||||
#define jit_bmsr_i(label, s1, s2) (TESTLrr((s1), (s2)), JNZm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bmcr_i(label, s1, s2) (TESTLrr((s1), (s2)), JZm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddr_i(label, s1, s2) (ADDLrr((s2), (s1)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubr_i(label, s1, s2) (SUBLrr((s2), (s1)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddr_ui(label, s1, s2) (ADDLrr((s2), (s1)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubr_ui(label, s1, s2) (SUBLrr((s2), (s1)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bltr_i(label, s1, s2) jit_bra_r((s1), (s2), JLm(label) )
|
||||
#define jit_bler_i(label, s1, s2) jit_bra_r((s1), (s2), JLEm(label) )
|
||||
#define jit_bgtr_i(label, s1, s2) jit_bra_r((s1), (s2), JGm(label) )
|
||||
#define jit_bger_i(label, s1, s2) jit_bra_r((s1), (s2), JGEm(label) )
|
||||
#define jit_beqr_i(label, s1, s2) jit_bra_r((s1), (s2), JEm(label) )
|
||||
#define jit_bner_i(label, s1, s2) jit_bra_r((s1), (s2), JNEm(label) )
|
||||
#define jit_bltr_ui(label, s1, s2) jit_bra_r((s1), (s2), JBm(label) )
|
||||
#define jit_bler_ui(label, s1, s2) jit_bra_r((s1), (s2), JBEm(label) )
|
||||
#define jit_bgtr_ui(label, s1, s2) jit_bra_r((s1), (s2), JAm(label) )
|
||||
#define jit_bger_ui(label, s1, s2) jit_bra_r((s1), (s2), JAEm(label) )
|
||||
#define jit_bmsr_i(label, s1, s2) (TESTLrr((s1), (s2)), JNZm(label), _jit.x.pc)
|
||||
#define jit_bmcr_i(label, s1, s2) (TESTLrr((s1), (s2)), JZm(label), _jit.x.pc)
|
||||
#define jit_boaddr_i(label, s1, s2) (ADDLrr((s2), (s1)), JOm(label), _jit.x.pc)
|
||||
#define jit_bosubr_i(label, s1, s2) (SUBLrr((s2), (s1)), JOm(label), _jit.x.pc)
|
||||
#define jit_boaddr_ui(label, s1, s2) (ADDLrr((s2), (s1)), JCm(label), _jit.x.pc)
|
||||
#define jit_bosubr_ui(label, s1, s2) (SUBLrr((s2), (s1)), JCm(label), _jit.x.pc)
|
||||
|
||||
#define jit_blti_i(label, rs, is) jit_bra_i0((rs), (is), JLm(label, 0,0,0), JSm(label, 0,0,0) )
|
||||
#define jit_blei_i(label, rs, is) jit_bra_i ((rs), (is), JLEm(label,0,0,0) )
|
||||
#define jit_bgti_i(label, rs, is) jit_bra_i ((rs), (is), JGm(label, 0,0,0) )
|
||||
#define jit_bgei_i(label, rs, is) jit_bra_i0((rs), (is), JGEm(label,0,0,0), JNSm(label,0,0,0) )
|
||||
#define jit_beqi_i(label, rs, is) jit_bra_i0((rs), (is), JEm(label, 0,0,0), JEm(label, 0,0,0) )
|
||||
#define jit_bnei_i(label, rs, is) jit_bra_i0((rs), (is), JNEm(label,0,0,0), JNEm(label,0,0,0) )
|
||||
#define jit_blti_ui(label, rs, is) jit_bra_i ((rs), (is), JBm(label, 0,0,0) )
|
||||
#define jit_blei_ui(label, rs, is) jit_bra_i0((rs), (is), JBEm(label,0,0,0), JEm(label, 0,0,0) )
|
||||
#define jit_bgti_ui(label, rs, is) jit_bra_i0((rs), (is), JAm(label, 0,0,0), JNEm(label,0,0,0) )
|
||||
#define jit_bgei_ui(label, rs, is) jit_bra_i ((rs), (is), JAEm(label,0,0,0) )
|
||||
#define jit_boaddi_i(label, rs, is) (ADDLir((is), (rs)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubi_i(label, rs, is) (SUBLir((is), (rs)), JOm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_boaddi_ui(label, rs, is) (ADDLir((is), (rs)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bosubi_ui(label, rs, is) (SUBLir((is), (rs)), JCm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_blti_i(label, rs, is) jit_bra_i0((rs), (is), JLm(label), JSm(label) )
|
||||
#define jit_blei_i(label, rs, is) jit_bra_i ((rs), (is), JLEm(label) )
|
||||
#define jit_bgti_i(label, rs, is) jit_bra_i ((rs), (is), JGm(label) )
|
||||
#define jit_bgei_i(label, rs, is) jit_bra_i0((rs), (is), JGEm(label), JNSm(label) )
|
||||
#define jit_beqi_i(label, rs, is) jit_bra_i0((rs), (is), JEm(label), JEm(label) )
|
||||
#define jit_bnei_i(label, rs, is) jit_bra_i0((rs), (is), JNEm(label), JNEm(label) )
|
||||
#define jit_blti_ui(label, rs, is) jit_bra_i ((rs), (is), JBm(label) )
|
||||
#define jit_blei_ui(label, rs, is) jit_bra_i0((rs), (is), JBEm(label), JEm(label) )
|
||||
#define jit_bgti_ui(label, rs, is) jit_bra_i0((rs), (is), JAm(label), JNEm(label) )
|
||||
#define jit_bgei_ui(label, rs, is) jit_bra_i ((rs), (is), JAEm(label) )
|
||||
#define jit_boaddi_i(label, rs, is) (ADDLir((is), (rs)), JOm(label), _jit.x.pc)
|
||||
#define jit_bosubi_i(label, rs, is) (SUBLir((is), (rs)), JOm(label), _jit.x.pc)
|
||||
#define jit_boaddi_ui(label, rs, is) (ADDLir((is), (rs)), JCm(label), _jit.x.pc)
|
||||
#define jit_bosubi_ui(label, rs, is) (SUBLir((is), (rs)), JCm(label), _jit.x.pc)
|
||||
|
||||
#define jit_bmsi_i(label, rs, is) (jit_reduce(TEST, (is), (rs)), JNZm(label,0,0,0), _jit.x.pc)
|
||||
#define jit_bmci_i(label, rs, is) (jit_reduce(TEST, (is), (rs)), JZm(label,0,0,0), _jit.x.pc)
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#define jit_bmsi_i(label, rs, is) (jit_reduce(TEST, (is), (rs)), JNZm(label), _jit.x.pc)
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#define jit_bmci_i(label, rs, is) (jit_reduce(TEST, (is), (rs)), JZm(label), _jit.x.pc)
|
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|
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#define jit_jmpi(label) (JMPm( ((unsigned long) (label)), 0, 0, 0), _jit.x.pc)
|
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#define jit_calli(label) (CALLm( ((unsigned long) (label)), 0, 0, 0), _jit.x.pc)
|
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#define jit_callr(reg) (CALLsr(reg))
|
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#define jit_jmpr(reg) JMPsr(reg)
|
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#define jit_jmpi(label) (JMPm( ((unsigned long) (label))), _jit.x.pc)
|
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#define jit_calli(label) (CALLm( ((unsigned long) (label))), _jit.x.pc)
|
||||
#define jit_callr(reg) CALLsr(reg)
|
||||
#define jit_jmpr(reg) JMPsr(reg)
|
||||
|
||||
/* Memory */
|
||||
#define jit_ldi_c(d, is) MOVSBLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldr_c(d, rs) MOVSBLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_c(d, s1, s2) MOVSBLmr(0, (s1), (s2), 1, (d))
|
||||
#define jit_ldxi_c(d, rs, is) MOVSBLmr((is), (rs), 0, 0, (d))
|
||||
#define jit_ldr_c(d, rs) MOVSBLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_c(d, s1, s2) MOVSBLmr(0, (s1), (s2), 1, (d))
|
||||
|
||||
#define jit_ldi_uc(d, is) MOVZBLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldr_uc(d, rs) MOVZBLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_uc(d, s1, s2) MOVZBLmr(0, (s1), (s2), 1, (d))
|
||||
#define jit_ldxi_uc(d, rs, is) MOVZBLmr((is), (rs), 0, 0, (d))
|
||||
#define jit_ldr_uc(d, rs) MOVZBLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_uc(d, s1, s2) MOVZBLmr(0, (s1), (s2), 1, (d))
|
||||
|
||||
#define jit_sti_c(id, rs) jit_movbrm((rs), (id), 0, 0, 0)
|
||||
#define jit_str_c(rd, rs) jit_movbrm((rs), 0, (rd), 0, 0)
|
||||
#define jit_stxr_c(d1, d2, rs) jit_movbrm((rs), 0, (d1), (d2), 1)
|
||||
#define jit_stxi_c(id, rd, rs) jit_movbrm((rs), (id), (rd), 0, 0)
|
||||
|
||||
#define jit_ldi_s(d, is) MOVSWLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldr_s(d, rs) MOVSWLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_s(d, s1, s2) MOVSWLmr(0, (s1), (s2), 1, (d))
|
||||
#define jit_ldxi_s(d, rs, is) MOVSWLmr((is), (rs), 0, 0, (d))
|
||||
#define jit_ldr_s(d, rs) MOVSWLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_s(d, s1, s2) MOVSWLmr(0, (s1), (s2), 1, (d))
|
||||
|
||||
#define jit_ldi_us(d, is) MOVZWLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldr_us(d, rs) MOVZWLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_us(d, s1, s2) MOVZWLmr(0, (s1), (s2), 1, (d))
|
||||
#define jit_ldxi_us(d, rs, is) MOVZWLmr((is), (rs), 0, 0, (d))
|
||||
#define jit_ldr_us(d, rs) MOVZWLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_us(d, s1, s2) MOVZWLmr(0, (s1), (s2), 1, (d))
|
||||
|
||||
#define jit_sti_s(id, rs) MOVWrm(jit_reg16(rs), (id), 0, 0, 0)
|
||||
#define jit_str_s(rd, rs) MOVWrm(jit_reg16(rs), 0, (rd), 0, 0)
|
||||
#define jit_stxr_s(d1, d2, rs) MOVWrm(jit_reg16(rs), 0, (d1), (d2), 1)
|
||||
#define jit_stxi_s(id, rd, rs) MOVWrm(jit_reg16(rs), (id), (rd), 0, 0)
|
||||
#define jit_str_s(rd, rs) MOVWrm(jit_reg16(rs), 0, (rd), 0, 0)
|
||||
#define jit_stxr_s(d1, d2, rs) MOVWrm(jit_reg16(rs), 0, (d1), (d2), 1)
|
||||
|
||||
#define jit_ldi_i(d, is) MOVLmr((is), 0, 0, 0, (d))
|
||||
#define jit_ldr_i(d, rs) MOVLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_i(d, s1, s2) MOVLmr(0, (s1), (s2), 1, (d))
|
||||
#define jit_ldxi_i(d, rs, is) MOVLmr((is), (rs), 0, 0, (d))
|
||||
|
||||
#define jit_sti_i(id, rs) MOVLrm((rs), (id), 0, 0, 0)
|
||||
#define jit_str_i(rd, rs) MOVLrm((rs), 0, (rd), 0, 0)
|
||||
#define jit_stxr_i(d1, d2, rs) MOVLrm((rs), 0, (d1), (d2), 1)
|
||||
#define jit_stxi_i(id, rd, rs) MOVLrm((rs), (id), (rd), 0, 0)
|
||||
#define jit_ldr_i(d, rs) MOVLmr(0, (rs), 0, 0, (d))
|
||||
#define jit_ldxr_i(d, s1, s2) MOVLmr(0, (s1), (s2), 1, (d))
|
||||
|
||||
#define jit_str_i(rd, rs) MOVLrm((rs), 0, (rd), 0, 0)
|
||||
#define jit_stxr_i(d1, d2, rs) MOVLrm((rs), 0, (d1), (d2), 1)
|
||||
|
||||
/* Extra */
|
||||
#define jit_nop() NOP_()
|
||||
|
|
|
|||
|
|
@ -222,10 +222,10 @@ union jit_double_imm {
|
|||
POPLr(rd), \
|
||||
TESTLrr(aux, aux), \
|
||||
POPLr(aux), \
|
||||
JSSm(_jit.x.pc + 11, 0, 0, 0), \
|
||||
JSSm(_jit.x.pc + 11), \
|
||||
ADDLir(0x7FFFFFFF, aux), /* 6 */ \
|
||||
SBBLir(0, rd), /* 3 */ \
|
||||
JMPSm(_jit.x.pc + 10, 0, 0, 0), /* 2 */ \
|
||||
JMPSm(_jit.x.pc + 10), /* 2 */ \
|
||||
TESTLrr(aux, aux), /* 2 */ \
|
||||
SETGr(jit_reg8(aux)), /* 3 */ \
|
||||
SHRLir(1, aux), /* 2 */ \
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ generate_ldxi_big_operand (const void *operand)
|
|||
result = (loader_t)(jit_set_ip (buffer).iptr);
|
||||
jit_leaf (1);
|
||||
arg = jit_arg_i ();
|
||||
jit_getarg_i (JIT_R1, arg);
|
||||
jit_getarg_p (JIT_R1, arg);
|
||||
|
||||
jit_ldxi_c (JIT_R0, JIT_R1, operand);
|
||||
jit_movr_i (JIT_RET, JIT_R0);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue