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s390: Add initial jit_va_ calls to s390
* lib/jit_s390-cpu.c, lib/jit_s390-fpu.c, lib/jit_s390.c: Add base support to jit vararg functions to the s390 backend.
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pcpa
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8cb302f337
commit
2c8b5e530c
4 changed files with 336 additions and 42 deletions
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@ -19,9 +19,13 @@
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#if PROTO
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# if __WORDSIZE == 32
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# define ldr(r0,r1) ldr_i(r0,r1)
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# define ldxr(r0,r1,r2) ldxr_i(r0,r1,r2)
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# define ldxi(r0,r1,i0) ldxi_i(r0,r1,i0)
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# define stxi(i0,r0,r1) stxi_i(i0,r0,r1)
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# else
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# define ldr(r0,r1) ldr_l(r0,r1)
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# define ldxr(r0,r1,r2) ldxr_l(r0,r1,r2)
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# define ldxi(r0,r1,i0) ldxi_l(r0,r1,i0)
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# define stxi(i0,r0,r1) stxi_l(i0,r0,r1)
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# endif
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@ -1293,6 +1297,10 @@ static jit_word_t _calli_p(jit_state_t*,jit_word_t);
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static void _prolog(jit_state_t*,jit_node_t*);
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# define epilog(i0) _epilog(_jit,i0)
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static void _epilog(jit_state_t*,jit_node_t*);
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# define vastart(r0) _vastart(_jit, r0)
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static void _vastart(jit_state_t*, jit_int32_t);
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# define vaarg(r0, r1) _vaarg(_jit, r0, r1)
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static void _vaarg(jit_state_t*, jit_int32_t, jit_int32_t);
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# define patch_at(instr,label) _patch_at(_jit,instr,label)
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static void _patch_at(jit_state_t*,jit_word_t,jit_word_t);
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#endif
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@ -3484,6 +3492,7 @@ _calli_p(jit_state_t *_jit, jit_word_t i0)
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}
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static jit_int32_t gprs[] = {
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_R2, _R3, _R4, _R5,
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_R6, _R7, _R8, _R9, _R10, _R11, _R12, _R13
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};
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@ -3503,7 +3512,8 @@ _prolog(jit_state_t *_jit, jit_node_t *i0)
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_jitc->function->stack = ((_jitc->function->self.alen -
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/* align stack at 8 bytes */
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_jitc->function->self.aoff) + 7) & -8;
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/* Lightning does not reserve stack space for spilling arguments
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/* *IFF* a non variadic function,
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* Lightning does not reserve stack space for spilling arguments
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* in registers.
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* S390x, as per gcc, has 8 stack slots for spilling arguments,
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* (%r6 is callee save) and uses an alloca like approach to save
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@ -3512,43 +3522,72 @@ _prolog(jit_state_t *_jit, jit_node_t *i0)
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* use the 8 slots to spill any modified fpr register, and still
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* use the same stack frame logic as gcc.
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* Save at least %r13 to %r15, as %r13 is used as frame pointer.
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* *IFF* a variadic function, a "standard" stack frame, with
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* fpr registers saved in an alloca'ed area, is used.
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*/
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for (regno = 0; regno < jit_size(gprs) - 1; regno++) {
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if (jit_regset_tstbit(&_jitc->function->regset, gprs[regno]))
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break;
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if ((_jitc->function->self.call & jit_call_varargs) &&
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jit_arg_reg_p(_jitc->function->vagp))
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regno = _jitc->function->vagp;
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else {
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for (regno = 4; regno < jit_size(gprs) - 1; regno++) {
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if (jit_regset_tstbit(&_jitc->function->regset, gprs[regno]))
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break;
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}
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}
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#if __WORDSIZE == 32
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offset = regno * 4 + 32;
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# define FP_OFFSET 64
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if (_jitc->function->self.call & jit_call_varargs)
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offset = regno * 4 + 8;
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else
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offset = (regno - 4) * 4 + 32;
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STM(rn(gprs[regno]), _R15_REGNO, x20(offset), _R15_REGNO);
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#else
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offset = regno * 8 + 48;
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# define FP_OFFSET 128
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if (_jitc->function->self.call & jit_call_varargs)
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offset = regno * 8 + 16;
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else
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offset = (regno - 4) * 8 + 48;
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STMG(rn(gprs[regno]), _R15_REGNO, x20(offset), _R15_REGNO);
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#endif
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#define SPILL(R, O) \
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do { \
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if (jit_regset_tstbit(&_jitc->function->regset, R)) \
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stxi_d(O, _R15_REGNO, rn(R)); \
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} while (0)
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/* First 4 in low address */
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if (_jitc->function->self.call & jit_call_varargs) {
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for (regno = _jitc->function->vafp; jit_arg_f_reg_p(regno); ++regno)
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stxi_d(FP_OFFSET + regno * 8, _R15_REGNO, rn(_F0 - regno));
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SPILL(_F8, _jitc->function->vaoff + offsetof(jit_va_list_t, f8));
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SPILL(_F9, _jitc->function->vaoff + offsetof(jit_va_list_t, f9));
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SPILL(_F10, _jitc->function->vaoff + offsetof(jit_va_list_t, f10));
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SPILL(_F11, _jitc->function->vaoff + offsetof(jit_va_list_t, f11));
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SPILL(_F12, _jitc->function->vaoff + offsetof(jit_va_list_t, f12));
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SPILL(_F13, _jitc->function->vaoff + offsetof(jit_va_list_t, f13));
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SPILL(_F14, _jitc->function->vaoff + offsetof(jit_va_list_t, f14));
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}
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else {
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/* First 4 in low address */
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#if __WORDSIZE == 32
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SPILL(_F10, 0);
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SPILL(_F11, 8);
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SPILL(_F12, 16);
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SPILL(_F13, 24);
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/* gpr registers here */
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SPILL(_F14, 72);
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SPILL(_F8, 80);
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SPILL(_F9, 88);
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SPILL(_F10, 0);
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SPILL(_F11, 8);
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SPILL(_F12, 16);
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SPILL(_F13, 24);
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/* gpr registers here */
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SPILL(_F14, 72);
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SPILL(_F8, 80);
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SPILL(_F9, 88);
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#else
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SPILL(_F10, 16);
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SPILL(_F11, 24);
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SPILL(_F12, 32);
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SPILL(_F13, 48);
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/* Last 3 in high address */
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SPILL(_F14, 136);
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SPILL(_F8, 144);
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SPILL(_F9, 152);
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SPILL(_F10, 16);
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SPILL(_F11, 24);
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SPILL(_F12, 32);
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SPILL(_F13, 48);
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/* Last 3 in high address */
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SPILL(_F14, 136);
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SPILL(_F8, 144);
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SPILL(_F9, 152);
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#endif
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}
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#undef SPILL
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movr(_R13_REGNO, _R15_REGNO);
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subi(_R15_REGNO, _R15_REGNO, stack_framesize + _jitc->function->stack);
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@ -3566,38 +3605,61 @@ _epilog(jit_state_t *_jit, jit_node_t *i0)
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jit_int32_t regno, offset;
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if (_jitc->function->assume_frame)
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return;
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for (regno = 0; regno < jit_size(gprs) - 1; regno++) {
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if (jit_regset_tstbit(&_jitc->function->regset, gprs[regno]))
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break;
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if ((_jitc->function->self.call & jit_call_varargs) &&
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jit_arg_reg_p(_jitc->function->vagp))
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regno = _jitc->function->vagp;
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else {
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for (regno = 4; regno < jit_size(gprs) - 1; regno++) {
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if (jit_regset_tstbit(&_jitc->function->regset, gprs[regno]))
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break;
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}
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}
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#if __WORDSIZE == 32
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offset = regno * 4 + 32;
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if (_jitc->function->self.call & jit_call_varargs)
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offset = regno * 4 + 8;
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else
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offset = (regno - 4) * 4 + 32;
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#else
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offset = regno * 8 + 48;
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if (_jitc->function->self.call & jit_call_varargs)
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offset = regno * 8 + 16;
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else
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offset = (regno - 4) * 8 + 48;
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#endif
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movr(_R15_REGNO, _R13_REGNO);
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#define LOAD(R, O) \
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do { \
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if (jit_regset_tstbit(&_jitc->function->regset, R)) \
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ldxi_d(rn(R), _R15_REGNO, O); \
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} while (0)
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if (_jitc->function->self.call & jit_call_varargs) {
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LOAD(_F8, _jitc->function->vaoff + offsetof(jit_va_list_t, f8));
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LOAD(_F9, _jitc->function->vaoff + offsetof(jit_va_list_t, f9));
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LOAD(_F10, _jitc->function->vaoff + offsetof(jit_va_list_t, f10));
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LOAD(_F11, _jitc->function->vaoff + offsetof(jit_va_list_t, f11));
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LOAD(_F12, _jitc->function->vaoff + offsetof(jit_va_list_t, f12));
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LOAD(_F13, _jitc->function->vaoff + offsetof(jit_va_list_t, f13));
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LOAD(_F14, _jitc->function->vaoff + offsetof(jit_va_list_t, f14));
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}
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else {
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#if __WORDSIZE == 32
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LOAD(_F10, 0);
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LOAD(_F11, 8);
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LOAD(_F12, 16);
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LOAD(_F13, 24);
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LOAD(_F14, 72);
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LOAD(_F8, 80);
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LOAD(_F9, 88);
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LOAD(_F10, 0);
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LOAD(_F11, 8);
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LOAD(_F12, 16);
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LOAD(_F13, 24);
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LOAD(_F14, 72);
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LOAD(_F8, 80);
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LOAD(_F9, 88);
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#else
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LOAD(_F10, 16);
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LOAD(_F11, 24);
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LOAD(_F12, 32);
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LOAD(_F13, 48);
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LOAD(_F14, 136);
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LOAD(_F8, 144);
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LOAD(_F9, 152);
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LOAD(_F10, 16);
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LOAD(_F11, 24);
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LOAD(_F12, 32);
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LOAD(_F13, 48);
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LOAD(_F14, 136);
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LOAD(_F8, 144);
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LOAD(_F9, 152);
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#endif
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}
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#undef LOAD
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#if __WORDSIZE == 32
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LM(rn(gprs[regno]), _R15_REGNO, x20(offset), _R15_REGNO);
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@ -3607,6 +3669,103 @@ _epilog(jit_state_t *_jit, jit_node_t *i0)
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BR(_R14_REGNO);
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}
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static void
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_vastart(jit_state_t *_jit, jit_int32_t r0)
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{
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jit_int32_t reg;
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assert(_jitc->function->self.call & jit_call_varargs);
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/* Return jit_va_list_t in the register argument */
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addi(r0, _R13_REGNO, _jitc->function->vaoff);
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reg = jit_get_reg(jit_class_gpr);
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/* Initialize gp offset in the save area. */
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movi(rn(reg), _jitc->function->vagp);
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stxi(offsetof(jit_va_list_t, gpoff), r0, rn(reg));
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/* Initialize fp offset in the save area. */
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movi(rn(reg), _jitc->function->vafp);
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stxi(offsetof(jit_va_list_t, fpoff), r0, rn(reg));
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/* Initialize overflow pointer to the first stack argument. */
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addi(rn(reg), _R13_REGNO, _jitc->function->self.size);
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stxi(offsetof(jit_va_list_t, over), r0, rn(reg));
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/* Initialize register save area pointer. */
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stxi(offsetof(jit_va_list_t, save), r0, _R13_REGNO);
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jit_unget_reg(reg);
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}
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static void
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_vaarg(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
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{
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jit_int32_t rg0;
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jit_int32_t rg1;
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jit_int32_t rg2;
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jit_word_t ge_code;
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jit_word_t lt_code;
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assert(_jitc->function->self.call & jit_call_varargs);
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rg0 = jit_get_reg_but_zero(0);
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rg1 = jit_get_reg_but_zero(0);
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/* Load the gp offset in save area in the first temporary. */
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ldxi(rn(rg0), r1, offsetof(jit_va_list_t, gpoff));
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/* Jump over if there are no remaining arguments in the save area. */
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ge_code = bgei_p(_jit->pc.w, rn(rg0), 5);
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/* Load the save area pointer in the second temporary. */
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ldxi(rn(rg1), r1, offsetof(jit_va_list_t, save));
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/* Scale offset */
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rg2 = jit_get_reg_but_zero(0);
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lshi(rn(rg2), rn(rg0),
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#if __WORDSIZE == 32
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2
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#else
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3
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#endif
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);
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/* Add offset to saved area. */
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addi(rn(rg2), rn(rg2), 2 * sizeof(jit_word_t));
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/* Load the vararg argument in the first argument. */
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ldxr(r0, rn(rg1), rn(rg2));
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jit_unget_reg_but_zero(rg2);
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/* Update the gp offset. */
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addi(rn(rg0), rn(rg0), 1);
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stxi(offsetof(jit_va_list_t, gpoff), r1, rn(rg0));
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/* Will only need one temporary register below. */
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jit_unget_reg_but_zero(rg1);
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/* Jump over overflow code. */
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lt_code = jmpi_p(_jit->pc.w);
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/* Where to land if argument is in overflow area. */
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patch_at(ge_code, _jit->pc.w);
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/* Load overflow pointer. */
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ldxi(rn(rg0), r1, offsetof(jit_va_list_t, over));
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/* Load argument. */
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ldr(r0, rn(rg0));
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/* Update overflow pointer. */
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addi(rn(rg0), rn(rg0), sizeof(jit_word_t));
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stxi(offsetof(jit_va_list_t, over), r1, rn(rg0));
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/* Where to land if argument is in save area. */
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patch_at(lt_code, _jit->pc.w);
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jit_unget_reg_but_zero(rg0);
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}
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static void
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_patch_at(jit_state_t *_jit, jit_word_t instr, jit_word_t label)
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{
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