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Build and pass all tests on 32 and 64 bit sparc
* include/lightning/jit_private.h: Add new register classes to flag float registers and double only registers, required for sparc64 where only low 32 bit fpr registers can be used for single precision operations. Add new 128 bit jit_regset_t type for sparc64 register set. * include/lightning/jit_sparc.h, lib/jit_sparc-cpu.c, lib/jit_sparc-fpu.c, lib/jit_sparc-sz.c, lib/jit_sparc.c: Update for 64 bits sparc. * lib/lightning.c: Update for new jit_regset_t required for sparc64.
This commit is contained in:
Paulo Andrade
parent
ed5589ce59
commit
2cea99361b
8 changed files with 2754 additions and 246 deletions
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@ -95,7 +95,14 @@ typedef jit_uint64_t jit_regset_t;
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# define JIT_SP _SP
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# define JIT_RET _I0
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# define JIT_FRET _F0
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# if __WORDSIZE == 32
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typedef jit_uint64_t jit_regset_t;
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# else
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typedef struct {
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jit_uint64_t rl;
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jit_uint64_t rh;
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} jit_regset_t;
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# endif
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#elif defined(__ia64__)
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# define JIT_SP _R12
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# define JIT_RET _R8
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@ -217,6 +224,10 @@ extern jit_node_t *_jit_data(jit_state_t*, const void*,
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#define jit_class_sft 0x01000000 /* not a hardware register */
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#define jit_class_rg8 0x04000000 /* x86 8 bits */
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#define jit_class_xpr 0x80000000 /* float / vector */
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/* Used on sparc64 where %f0-%f31 can be encode for single float
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* but %f32 to %f62 only as double precision */
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#define jit_class_sng 0x10000000 /* Single precision float */
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#define jit_class_dbl 0x20000000 /* Only double precision float */
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#define jit_regno_patch 0x00008000 /* this is a register
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* returned by a "user" call
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* to jit_get_reg() */
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@ -250,7 +261,7 @@ extern jit_node_t *_jit_data(jit_state_t*, const void*,
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#define jit_cc_a2_flt 0x00200000 /* arg2 is immediate float */
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#define jit_cc_a2_dbl 0x00400000 /* arg2 is immediate double */
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#if __ia64__
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#if __ia64__ || (__sparc__ && __WORDSIZE == 64)
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extern void
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jit_regset_com(jit_regset_t*, jit_regset_t*);
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@ -286,10 +297,17 @@ jit_regset_setbit(jit_regset_t*, jit_int32_t);
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extern jit_bool_t
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jit_regset_tstbit(jit_regset_t*, jit_int32_t);
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# define jit_regset_new(set) \
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# if __sparc__ && __WORDSIZE == 64
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# define jit_regset_new(set) \
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do { (set)->rl = (set)->rh = 0; } while (0)
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# define jit_regset_del(set) \
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do { (set)->rl = (set)->rh = 0; } while (0)
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# else
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# define jit_regset_new(set) \
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do { (set)->rl = (set)->rh = (set)->fl = (set)->fh = 0; } while (0)
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# define jit_regset_del(set) \
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# define jit_regset_del(set) \
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do { (set)->rl = (set)->rh = (set)->fl = (set)->fh = 0; } while (0)
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# endif
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#else
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# define jit_regset_com(u, v) (*(u) = ~*(v))
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# define jit_regset_and(u, v, w) (*(u) = *(v) & *(w))
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@ -457,7 +475,7 @@ struct jit_compiler {
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jit_int32_t rout; /* first output register */
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jit_int32_t breg; /* base register for prolog/epilog */
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#endif
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#if __mips__ || __ia64__ || __alpha__
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#if __mips__ || __ia64__ || __alpha__ || (__sparc__ && __WORDSIZE == 64)
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jit_int32_t carry;
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#define jit_carry _jitc->carry
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#endif
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@ -32,8 +32,13 @@ typedef enum {
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#define jit_r_num() 3
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#define jit_v(i) (_L0 + (i))
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#define jit_v_num() 8
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#define jit_f(i) (_F0 + ((i) << 1))
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#define jit_f_num() 8
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#if __WORDSIZE == 32
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# define jit_f(i) (_F0 + ((i) << 1))
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# define jit_f_num() 8
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#else
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# define jit_f(i) (_F32 - (i))
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# define jit_f_num() 16
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#endif
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#define JIT_R0 _G2
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#define JIT_R1 _G3
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#define JIT_R2 _G4
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@ -49,16 +54,47 @@ typedef enum {
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_O0, _O1, _O2, _O3, _O4, _O5, _SP, _O7,
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_L0, _L1, _L2, _L3, _L4, _L5, _L6, _L7,
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_I0, _I1, _I2, _I3, _I4, _I5, _FP, _I7,
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#define JIT_F0 _F0
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#define JIT_F1 _F2
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#define JIT_F2 _F4
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#define JIT_F3 _F6
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#define JIT_F4 _F8
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#define JIT_F5 _F10
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#define JIT_F6 _F12
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#define JIT_F7 _F14
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#if __WORDSIZE == 32
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# define JIT_F0 _F0
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# define JIT_F1 _F2
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# define JIT_F2 _F4
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# define JIT_F3 _F6
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# define JIT_F4 _F8
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# define JIT_F5 _F10
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# define JIT_F6 _F12
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# define JIT_F7 _F14
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_F0, _F1, _F2, _F3, _F4, _F5, _F6, _F7,
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_F8, _F9, _F10, _F11, _F12, _F13, _F14, _F15,
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#else
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/* All single precision operations have a high cost due to being
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* stored on registers only encodable as double precision.
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* The cost is due to needing to move values to a register with
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* value <= 31.
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* This is a limitation due to using fixed named registers in
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* lightning. */
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# define JIT_F0 _F32
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# define JIT_F1 _F34
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# define JIT_F2 _F36
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# define JIT_F3 _F38
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# define JIT_F4 _F40
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# define JIT_F5 _F42
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# define JIT_F6 _F44
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# define JIT_F7 _F46
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# define JIT_F8 _F48
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# define JIT_F9 _F50
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# define JIT_F10 _F52
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# define JIT_F11 _F54
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# define JIT_F12 _F56
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# define JIT_F13 _F58
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# define JIT_F14 _F60
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# define JIT_F15 _F62
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_F62, _F60, _F58, _F56, _F54, _F52, _F50, _F48,
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_F46, _F44, _F42, _F40, _F38, _F36, _F34, _F32,
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_F31, _F30, _F29, _F28, _F27, _F26, _F25, _F24,
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_F23, _F22, _F21, _F20, _F19, _F18, _F17, _F16,
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_F15, _F14, _F13, _F12, _F11, _F10, _F9, _F8,
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_F7, _F6, _F5, _F4, _F3, _F2, _F1, _F0,
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#endif
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#define JIT_NOREG _NOREG
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_NOREG,
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} jit_reg_t;
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