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Build and pass all tests on 32 and 64 bit sparc
* include/lightning/jit_private.h: Add new register classes to flag float registers and double only registers, required for sparc64 where only low 32 bit fpr registers can be used for single precision operations. Add new 128 bit jit_regset_t type for sparc64 register set. * include/lightning/jit_sparc.h, lib/jit_sparc-cpu.c, lib/jit_sparc-fpu.c, lib/jit_sparc-sz.c, lib/jit_sparc.c: Update for 64 bits sparc. * lib/lightning.c: Update for new jit_regset_t required for sparc64.
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8 changed files with 2754 additions and 246 deletions
114
lib/lightning.c
114
lib/lightning.c
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@ -497,6 +497,120 @@ jit_regset_scan1(jit_regset_t *set, jit_int32_t offset)
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}
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return (ULONG_MAX);
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}
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#elif __sparc__ && __WORDSIZE == 64
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void
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jit_regset_com(jit_regset_t *u, jit_regset_t *v)
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{
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u->rl = ~v->rl; u->rh = ~v->rh;
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}
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void
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jit_regset_and(jit_regset_t *u, jit_regset_t *v, jit_regset_t *w)
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{
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u->rl = v->rl & w->rl; u->rh = v->rh & w->rh;
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}
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void
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jit_regset_ior(jit_regset_t *u, jit_regset_t *v, jit_regset_t *w)
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{
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u->rl = v->rl | w->rl; u->rh = v->rh | w->rh;
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}
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void
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jit_regset_xor(jit_regset_t *u, jit_regset_t *v, jit_regset_t *w)
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{
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u->rl = v->rl ^ w->rl; u->rh = v->rh ^ w->rh;
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}
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void
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jit_regset_set(jit_regset_t *u, jit_regset_t *v)
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{
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u->rl = v->rl; u->rh = v->rh;
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}
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void
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jit_regset_set_mask(jit_regset_t *u, jit_int32_t v)
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{
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jit_bool_t w = !!(v & (v - 1));
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assert(v >= 0 && v <= 128);
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if (v == 0)
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u->rl = u->rh = -1LL;
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else if (v <= 64) {
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u->rl = w ? (1LL << v) - 1 : -1LL;
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u->rh = 0;
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}
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else {
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u->rl = -1LL;
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u->rh = w ? (1LL << (v - 64)) - 1 : -1LL;
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}
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}
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jit_bool_t
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jit_regset_cmp_ui(jit_regset_t *u, jit_word_t v)
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{
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return !((u->rl == v && u->rh == 0));
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}
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void
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jit_regset_set_ui(jit_regset_t *u, jit_word_t v)
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{
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u->rl = v;
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u->rh = 0;
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}
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jit_bool_t
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jit_regset_set_p(jit_regset_t *u)
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{
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return (u->rl || u->rh);
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}
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void
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jit_regset_clrbit(jit_regset_t *set, jit_int32_t bit)
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{
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assert(bit >= 0 && bit <= 128);
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if (bit < 64)
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set->rl &= ~(1LL << bit);
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else
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set->rh &= ~(1LL << (bit - 64));
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}
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void
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jit_regset_setbit(jit_regset_t *set, jit_int32_t bit)
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{
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assert(bit >= 0 && bit <= 127);
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if (bit < 64)
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set->rl |= 1LL << bit;
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else
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set->rh |= 1LL << (bit - 64);
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}
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jit_bool_t
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jit_regset_tstbit(jit_regset_t *set, jit_int32_t bit)
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{
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assert(bit >= 0 && bit <= 127);
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if (bit < 64)
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return (!!(set->rl & (1LL << bit)));
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else
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return (!!(set->rh & (1LL << (bit - 64))));
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}
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unsigned long
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jit_regset_scan1(jit_regset_t *set, jit_int32_t offset)
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{
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assert(offset >= 0 && offset <= 127);
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for (; offset < 64; offset++) {
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if (set->rl & (1LL << offset))
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return (offset);
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}
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for (; offset < 128; offset++) {
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if (set->rh & (1LL << (offset - 64)))
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return (offset);
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}
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return (ULONG_MAX);
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}
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#else
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unsigned long
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jit_regset_scan1(jit_regset_t *set, jit_int32_t offset)
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