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Build and pass all tests on 32 and 64 bit sparc

* include/lightning/jit_private.h: Add new register classes to
	flag float registers and double only registers, required for sparc64
	where only low 32 bit fpr registers can be used for single precision
	operations.
	Add new 128 bit jit_regset_t type for sparc64 register set.

	* include/lightning/jit_sparc.h, lib/jit_sparc-cpu.c, lib/jit_sparc-fpu.c,
	lib/jit_sparc-sz.c, lib/jit_sparc.c: Update for 64 bits sparc.

	* lib/lightning.c: Update for new jit_regset_t required for sparc64.
This commit is contained in:
Paulo Andrade 2018-04-20 10:37:37 -03:00
parent ed5589ce59
commit 2cea99361b
8 changed files with 2754 additions and 246 deletions

View file

@ -497,6 +497,120 @@ jit_regset_scan1(jit_regset_t *set, jit_int32_t offset)
}
return (ULONG_MAX);
}
#elif __sparc__ && __WORDSIZE == 64
void
jit_regset_com(jit_regset_t *u, jit_regset_t *v)
{
u->rl = ~v->rl; u->rh = ~v->rh;
}
void
jit_regset_and(jit_regset_t *u, jit_regset_t *v, jit_regset_t *w)
{
u->rl = v->rl & w->rl; u->rh = v->rh & w->rh;
}
void
jit_regset_ior(jit_regset_t *u, jit_regset_t *v, jit_regset_t *w)
{
u->rl = v->rl | w->rl; u->rh = v->rh | w->rh;
}
void
jit_regset_xor(jit_regset_t *u, jit_regset_t *v, jit_regset_t *w)
{
u->rl = v->rl ^ w->rl; u->rh = v->rh ^ w->rh;
}
void
jit_regset_set(jit_regset_t *u, jit_regset_t *v)
{
u->rl = v->rl; u->rh = v->rh;
}
void
jit_regset_set_mask(jit_regset_t *u, jit_int32_t v)
{
jit_bool_t w = !!(v & (v - 1));
assert(v >= 0 && v <= 128);
if (v == 0)
u->rl = u->rh = -1LL;
else if (v <= 64) {
u->rl = w ? (1LL << v) - 1 : -1LL;
u->rh = 0;
}
else {
u->rl = -1LL;
u->rh = w ? (1LL << (v - 64)) - 1 : -1LL;
}
}
jit_bool_t
jit_regset_cmp_ui(jit_regset_t *u, jit_word_t v)
{
return !((u->rl == v && u->rh == 0));
}
void
jit_regset_set_ui(jit_regset_t *u, jit_word_t v)
{
u->rl = v;
u->rh = 0;
}
jit_bool_t
jit_regset_set_p(jit_regset_t *u)
{
return (u->rl || u->rh);
}
void
jit_regset_clrbit(jit_regset_t *set, jit_int32_t bit)
{
assert(bit >= 0 && bit <= 128);
if (bit < 64)
set->rl &= ~(1LL << bit);
else
set->rh &= ~(1LL << (bit - 64));
}
void
jit_regset_setbit(jit_regset_t *set, jit_int32_t bit)
{
assert(bit >= 0 && bit <= 127);
if (bit < 64)
set->rl |= 1LL << bit;
else
set->rh |= 1LL << (bit - 64);
}
jit_bool_t
jit_regset_tstbit(jit_regset_t *set, jit_int32_t bit)
{
assert(bit >= 0 && bit <= 127);
if (bit < 64)
return (!!(set->rl & (1LL << bit)));
else
return (!!(set->rh & (1LL << (bit - 64))));
}
unsigned long
jit_regset_scan1(jit_regset_t *set, jit_int32_t offset)
{
assert(offset >= 0 && offset <= 127);
for (; offset < 64; offset++) {
if (set->rl & (1LL << offset))
return (offset);
}
for (; offset < 128; offset++) {
if (set->rh & (1LL << (offset - 64)))
return (offset);
}
return (ULONG_MAX);
}
#else
unsigned long
jit_regset_scan1(jit_regset_t *set, jit_int32_t offset)