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X86: Correct load and store in the x32 abi
* lib/jit_x86-cpu.c, lib/jit_x86-sse.c, lib/jit_x86-x87.c: Correct encoding of ldxr* stxr* in the x32 abi. If the displacement register is negative, it would generate a 64 bit instruction with a 32 bit unsigned displacement. * check/ranger.tst, check/ranger.ok: New files, implementing a test case for negative loads and stores. This is range.tst converted to use registers instead of immediate offsets. check/Makefile.am: Update for the new test case.
This commit is contained in:
pcpa
parent
7fdbc5b84a
commit
3a03feae5d
7 changed files with 709 additions and 10 deletions
13
ChangeLog
13
ChangeLog
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@ -1,3 +1,16 @@
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2015-02-15 Paulo Andrade <pcpa@gnu.org>
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* lib/jit_x86-cpu.c, lib/jit_x86-sse.c, lib/jit_x86-x87.c:
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Correct encoding of ldxr* stxr* in the x32 abi. If the
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displacement register is negative, it would generate
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a 64 bit instruction with a 32 bit unsigned displacement.
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* check/ranger.tst, check/ranger.ok: New files, implementing
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a test case for negative loads and stores. This is range.tst
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converted to use registers instead of immediate offsets.
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check/Makefile.am: Update for the new test case.
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2015-02-07 Paulo Andrade <pcpa@gnu.org>
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* lib/jit_size.c: Preventively use at least 144 bytes
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@ -92,6 +92,7 @@ EXTRA_DIST = \
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qalu_mul.tst qalu_mul.ok \
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qalu_div.tst qalu_div.ok \
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range.tst range.ok \
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ranger.tst ranger.ok \
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ret.tst ret.ok \
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tramp.tst tramp.ok \
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check.sh \
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@ -121,7 +122,7 @@ base_TESTS = \
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clobber carry call \
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float jmpr put \
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qalu_mul qalu_div \
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range ret tramp
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range ranger ret tramp
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$(base_TESTS): check.sh
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$(LN_S) $(srcdir)/check.sh $@
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@ -193,7 +194,7 @@ arm_TESTS = \
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varargs.arm stack.arm \
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clobber.arm carry.arm call.arm \
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float.arm jmpr.arm tramp.arm range.arm \
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put.arm
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ranger.arm put.arm
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$(arm_TESTS): check.arm.sh
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$(LN_S) $(srcdir)/check.arm.sh $@
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TESTS += $(arm_TESTS)
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@ -218,7 +219,7 @@ swf_TESTS = \
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varargs.swf stack.swf \
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clobber.swf carry.swf call.swf \
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float.swf jmpr.swf tramp.swf range.swf \
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put.swf
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ranger.swf put.swf
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$(swf_TESTS): check.swf.sh
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$(LN_S) $(srcdir)/check.swf.sh $@
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TESTS += $(swf_TESTS)
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@ -241,7 +242,7 @@ arm_swf_TESTS = \
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varargs.arm.swf stack.arm.swf \
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clobber.arm.swf carry.arm.swf call.arm.swf \
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float.arm.swf jmpr.arm.swf tramp.arm.swf range.arm.swf \
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put.arm.swf
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ranger.arm.swf put.arm.swf
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$(arm_swf_TESTS): check.arm.swf.sh
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$(LN_S) $(srcdir)/check.arm.swf.sh $@
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TESTS += $(arm_swf_TESTS)
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@ -265,7 +266,7 @@ arm4_swf_TESTS = \
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varargs.arm4.swf stack.arm4.swf \
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clobber.arm4.swf carry.arm4.swf call.arm4.swf \
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float.arm4.swf jmpr.arm4.swf tramp.arm4.swf \
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range.arm4.swf put.arm4.swf
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range.arm4.swf ranger.arm4.swf put.arm4.swf
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$(arm4_swf_TESTS): check.arm4.swf.sh
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$(LN_S) $(srcdir)/check.arm4.swf.sh $@
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TESTS += $(arm4_swf_TESTS)
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@ -291,7 +292,7 @@ nodata_TESTS = \
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varargs.nodata stack.nodata \
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clobber.nodata carry.nodata call.nodata \
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float.nodata jmpr.nodata tramp.nodata \
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range.nodata put.nodata
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range.nodata ranger.nodata put.nodata
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$(nodata_TESTS): check.nodata.sh
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$(LN_S) $(srcdir)/check.nodata.sh $@
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TESTS += $(nodata_TESTS)
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1
check/ranger.ok
Normal file
1
check/ranger.ok
Normal file
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@ -0,0 +1 @@
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ok
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507
check/ranger.tst
Normal file
507
check/ranger.tst
Normal file
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@ -0,0 +1,507 @@
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#define M64 67108864
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#define aB1 (1<<1)
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#define aB2 (1<<2)
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#define aB3 (1<<3)
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#define aB4 (1<<4)
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#define aB5 (1<<5)
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#define aB6 (1<<6)
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#define aB7 (1<<7)
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#define aB8 (1<<8)
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#define aB9 (1<<9)
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#define aB10 (1<<10)
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#define aB11 (1<<11)
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#define aB12 (1<<12)
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#define aB13 (1<<13)
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#define aB14 (1<<14)
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#define aB15 (1<<15)
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#define aB16 (1<<16)
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#define aB17 (1<<17)
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#define aB18 (1<<18)
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#define aB19 (1<<19)
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#define aB20 (1<<20)
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#define aB21 (1<<21)
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#define aB22 (1<<22)
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#define aB23 (1<<23)
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#define aB24 (1<<24)
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#define aB25 (1<<25)
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#define aB26 (1<<26)
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#define bB1 (-aB1)
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#define bB2 (-aB2)
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#define bB3 (-aB3)
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#define bB4 (-aB4)
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#define bB5 (-aB5)
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#define bB6 (-aB6)
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#define bB7 (-aB7)
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#define bB8 (-aB8)
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#define bB9 (-aB9)
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#define bB10 (-aB10)
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#define bB11 (-aB11)
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#define bB12 (-aB12)
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#define bB13 (-aB13)
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#define bB14 (-aB14)
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#define bB15 (-aB15)
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#define bB16 (-aB16)
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#define bB17 (-aB17)
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#define bB18 (-aB18)
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#define bB19 (-aB19)
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#define bB20 (-aB20)
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#define bB21 (-aB21)
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#define bB22 (-aB22)
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#define bB23 (-aB23)
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#define bB24 (-aB24)
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#define bB25 (-aB25)
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#define bB26 (-aB26)
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#define cB1 (aB1-1)
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#define cB2 (aB2-1)
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#define cB3 (aB3-1)
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#define cB4 (aB4-1)
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#define cB5 (aB5-1)
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#define cB6 (aB6-1)
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#define cB7 (aB7-1)
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#define cB8 (aB8-1)
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#define cB9 (aB9-1)
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#define cB10 (aB10-1)
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#define cB11 (aB11-1)
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#define cB12 (aB12-1)
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#define cB13 (aB13-1)
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#define cB14 (aB14-1)
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#define cB15 (aB15-1)
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#define cB16 (aB16-1)
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#define cB17 (aB17-1)
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#define cB18 (aB18-1)
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#define cB19 (aB19-1)
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#define cB20 (aB20-1)
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#define cB21 (aB21-1)
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#define cB22 (aB22-1)
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#define cB23 (aB23-1)
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#define cB24 (aB24-1)
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#define cB25 (aB25-1)
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#define cB26 (aB26-1)
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#define dB1 (-aB1+1)
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#define dB2 (-aB2+1)
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#define dB3 (-aB3+1)
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#define dB4 (-aB4+1)
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#define dB5 (-aB5+1)
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#define dB6 (-aB6+1)
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#define dB7 (-aB7+1)
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#define dB8 (-aB8+1)
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#define dB9 (-aB9+1)
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#define dB10 (-aB10+1)
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#define dB11 (-aB11+1)
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#define dB12 (-aB12+1)
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#define dB13 (-aB13+1)
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#define dB14 (-aB14+1)
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#define dB15 (-aB15+1)
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#define dB16 (-aB16+1)
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#define dB17 (-aB17+1)
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#define dB18 (-aB18+1)
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#define dB19 (-aB19+1)
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#define dB20 (-aB20+1)
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#define dB21 (-aB21+1)
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#define dB22 (-aB22+1)
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#define dB23 (-aB23+1)
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#define dB24 (-aB24+1)
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#define dB25 (-aB25+1)
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#define dB26 (-aB26+1)
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#define add(a, b) $(a + b)
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#define sub(a, b) $(a - b)
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#define rsb(a, b) $(b - a)
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#define mul(a, b) $(a * b)
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#define div(a, b) $(a / b)
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#define rem(a, b) $(a % b)
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#define and(a, b) $(a & b)
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#define or(a, b) $(a | b)
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#define xor(a, b) $(a ^ b)
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#define alu2(N, X, L, R, V) \
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movi %r1 L \
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movi %r2 R \
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N##r %r0 %r1 %r2 \
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beqi X %r0 V \
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calli @abort \
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X:
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#define alu1(N, M) \
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alu2(N, N##M##1, 3, $(M##1), N(3, M##1)) \
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alu2(N, N##M##2, 3, $(M##2), N(3, M##2)) \
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alu2(N, N##M##3, 3, $(M##3), N(3, M##3)) \
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alu2(N, N##M##4, 3, $(M##4), N(3, M##4)) \
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alu2(N, N##M##5, 3, $(M##5), N(3, M##5)) \
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alu2(N, N##M##6, 3, $(M##6), N(3, M##6)) \
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alu2(N, N##M##7, 3, $(M##7), N(3, M##7)) \
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alu2(N, N##M##8, 3, $(M##8), N(3, M##8)) \
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alu2(N, N##M##9, 3, $(M##9), N(3, M##9)) \
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alu2(N, N##M##10, 3, $(M##10), N(3, M##10)) \
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alu2(N, N##M##11, 3, $(M##11), N(3, M##11)) \
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alu2(N, N##M##12, 3, $(M##12), N(3, M##12)) \
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alu2(N, N##M##13, 3, $(M##13), N(3, M##13)) \
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alu2(N, N##M##14, 3, $(M##14), N(3, M##14)) \
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alu2(N, N##M##15, 3, $(M##15), N(3, M##15)) \
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alu2(N, N##M##16, 3, $(M##16), N(3, M##16)) \
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alu2(N, N##M##17, 3, $(M##17), N(3, M##17)) \
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alu2(N, N##M##18, 3, $(M##18), N(3, M##18)) \
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alu2(N, N##M##19, 3, $(M##19), N(3, M##19)) \
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alu2(N, N##M##20, 3, $(M##20), N(3, M##20)) \
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alu2(N, N##M##21, 3, $(M##21), N(3, M##21)) \
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alu2(N, N##M##22, 3, $(M##22), N(3, M##22)) \
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alu2(N, N##M##23, 3, $(M##23), N(3, M##23)) \
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alu2(N, N##M##24, 3, $(M##24), N(3, M##24)) \
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alu2(N, N##M##25, 3, $(M##25), N(3, M##25)) \
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alu2(N, N##M##26, 3, $(M##26), N(3, M##26))
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#define alu(N) \
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alu1(N, aB) \
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alu1(N, bB) \
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alu1(N, cB) \
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alu1(N, dB)
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#define _lsh(N) \
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alu2(lsh, L##N, 3, N, $(3<<N))
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#define _rsh(N) \
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alu2(rsh, R##N, $(1<<63), N, $((1<<63)>>N))
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#if __WORDSIZE == 32
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# define xsh64(X) /**/
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#else
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# define xsh64(X) \
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_##X##sh(32) \
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_##X##sh(33) \
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_##X##sh(34) \
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_##X##sh(35) \
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_##X##sh(36) \
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_##X##sh(37) \
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_##X##sh(38) \
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_##X##sh(39) \
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_##X##sh(40) \
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_##X##sh(41) \
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_##X##sh(42) \
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_##X##sh(43) \
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_##X##sh(44) \
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_##X##sh(45) \
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_##X##sh(46) \
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_##X##sh(47) \
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_##X##sh(48) \
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_##X##sh(49) \
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_##X##sh(50) \
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_##X##sh(51) \
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_##X##sh(52) \
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_##X##sh(53) \
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_##X##sh(54) \
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_##X##sh(55) \
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_##X##sh(56) \
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_##X##sh(57) \
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_##X##sh(58) \
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_##X##sh(59) \
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_##X##sh(60) \
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_##X##sh(61) \
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_##X##sh(62) \
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_##X##sh(63)
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#endif
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#define xsh(X) \
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_##X##sh(0) \
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_##X##sh(1) \
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_##X##sh(2) \
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_##X##sh(3) \
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_##X##sh(4) \
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_##X##sh(5) \
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_##X##sh(6) \
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_##X##sh(7) \
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_##X##sh(8) \
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_##X##sh(9) \
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_##X##sh(10) \
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_##X##sh(11) \
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_##X##sh(12) \
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_##X##sh(13) \
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_##X##sh(14) \
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_##X##sh(15) \
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_##X##sh(16) \
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_##X##sh(17) \
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_##X##sh(18) \
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_##X##sh(19) \
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_##X##sh(20) \
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_##X##sh(21) \
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_##X##sh(22) \
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_##X##sh(23) \
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_##X##sh(24) \
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_##X##sh(25) \
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_##X##sh(26) \
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_##X##sh(27) \
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_##X##sh(28) \
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_##X##sh(29) \
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_##X##sh(30) \
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_##X##sh(31) \
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xsh64(X)
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#define lsh() \
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xsh(l)
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#define rsh() \
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xsh(r)
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#define reset(V) \
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prepare \
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pushargi buf \
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pushargi V \
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pushargi $(M64 + 8) \
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finishi @memset
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#define stx(T, N, O, V) \
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movi %r0 V \
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movi %r1 O \
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stxr##T %r1 %v0 %r0
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#define stx8(T, M, V) \
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stx(T, 3, $(M##B3), V) \
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stx(T, 4, $(M##B4), V) \
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stx(T, 5, $(M##B5), V) \
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stx(T, 6, $(M##B6), V) \
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stx(T, 7, $(M##B7), V) \
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stx(T, 8, $(M##B8), V) \
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stx(T, 9, $(M##B9), V) \
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stx(T, 10, $(M##B10), V) \
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stx(T, 11, $(M##B11), V) \
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stx(T, 12, $(M##B12), V) \
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stx(T, 13, $(M##B13), V) \
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stx(T, 14, $(M##B14), V) \
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stx(T, 15, $(M##B15), V) \
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stx(T, 16, $(M##B16), V) \
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stx(T, 17, $(M##B17), V) \
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stx(T, 18, $(M##B18), V) \
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stx(T, 19, $(M##B19), V) \
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stx(T, 20, $(M##B20), V) \
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stx(T, 21, $(M##B21), V) \
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stx(T, 22, $(M##B22), V) \
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stx(T, 23, $(M##B23), V) \
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stx(T, 24, $(M##B24), V) \
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stx(T, 25, $(M##B25), V) \
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stx(T, 26, $(M##B26), V)
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#define stx4(T, M, V) \
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stx(T, 2, $(M##B2), V) \
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stx8(T, M, V)
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#define stx2(T, M, V) \
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stx(T, 1, $(M##B1), V) \
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stx4(T, M, V)
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#define ldx(T, N, M, O, V) \
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movi %r0 0 \
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ldxi##T %r0 %v0 O \
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beqi ldx##T##N##M %r0 V \
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calli @abort \
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ldx##T##N##M:
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#define ldx8(T, M, V) \
|
||||
ldx(T, 3, M, $(M##B3), V) \
|
||||
ldx(T, 4, M, $(M##B4), V) \
|
||||
ldx(T, 5, M, $(M##B5), V) \
|
||||
ldx(T, 6, M, $(M##B6), V) \
|
||||
ldx(T, 7, M, $(M##B7), V) \
|
||||
ldx(T, 8, M, $(M##B8), V) \
|
||||
ldx(T, 9, M, $(M##B9), V) \
|
||||
ldx(T, 10, M, $(M##B10), V) \
|
||||
ldx(T, 11, M, $(M##B11), V) \
|
||||
ldx(T, 12, M, $(M##B12), V) \
|
||||
ldx(T, 13, M, $(M##B13), V) \
|
||||
ldx(T, 14, M, $(M##B14), V) \
|
||||
ldx(T, 15, M, $(M##B15), V) \
|
||||
ldx(T, 16, M, $(M##B16), V) \
|
||||
ldx(T, 17, M, $(M##B17), V) \
|
||||
ldx(T, 18, M, $(M##B18), V) \
|
||||
ldx(T, 19, M, $(M##B19), V) \
|
||||
ldx(T, 20, M, $(M##B20), V) \
|
||||
ldx(T, 21, M, $(M##B21), V) \
|
||||
ldx(T, 22, M, $(M##B22), V) \
|
||||
ldx(T, 23, M, $(M##B23), V) \
|
||||
ldx(T, 24, M, $(M##B24), V) \
|
||||
ldx(T, 25, M, $(M##B25), V) \
|
||||
ldx(T, 26, M, $(M##B26), V)
|
||||
#define ldx4(T, M, V) \
|
||||
ldx(T, 2, M, $(M##B2), V) \
|
||||
ldx8(T, M, V)
|
||||
#define ldx2(T, M, V) \
|
||||
ldx(T, 1, M, $(M##B1), V) \
|
||||
ldx4(T, M, V)
|
||||
|
||||
#define stf(T, N, O, V) \
|
||||
movi##T %f0 V \
|
||||
movi %r0 O \
|
||||
stxr##T %r0 %v0 %f0
|
||||
#define stf8(T, M, V) \
|
||||
stf(T, 3, $(M##B3), V) \
|
||||
stf(T, 4, $(M##B4), V) \
|
||||
stf(T, 5, $(M##B5), V) \
|
||||
stf(T, 6, $(M##B6), V) \
|
||||
stf(T, 7, $(M##B7), V) \
|
||||
stf(T, 8, $(M##B8), V) \
|
||||
stf(T, 9, $(M##B9), V) \
|
||||
stf(T, 10, $(M##B10), V) \
|
||||
stf(T, 11, $(M##B11), V) \
|
||||
stf(T, 12, $(M##B12), V) \
|
||||
stf(T, 13, $(M##B13), V) \
|
||||
stf(T, 14, $(M##B14), V) \
|
||||
stf(T, 15, $(M##B15), V) \
|
||||
stf(T, 16, $(M##B16), V) \
|
||||
stf(T, 17, $(M##B17), V) \
|
||||
stf(T, 18, $(M##B18), V) \
|
||||
stf(T, 19, $(M##B19), V) \
|
||||
stf(T, 20, $(M##B20), V) \
|
||||
stf(T, 21, $(M##B21), V) \
|
||||
stf(T, 22, $(M##B22), V) \
|
||||
stf(T, 23, $(M##B23), V) \
|
||||
stf(T, 24, $(M##B24), V) \
|
||||
stf(T, 25, $(M##B25), V) \
|
||||
stf(T, 26, $(M##B26), V)
|
||||
#define stf4(T, M, V) \
|
||||
stf(T, 2, $(M##B2), V) \
|
||||
stf8(T, M, V)
|
||||
#define ldf(T, N, M, O, V) \
|
||||
movi##T %f0 0 \
|
||||
ldxi##T %f0 %v0 O \
|
||||
beqi##T ldf##T##N##M %f0 V \
|
||||
calli @abort \
|
||||
ldf##T##N##M:
|
||||
#define ldf8(T, M, V) \
|
||||
ldf(T, 3, M, $(M##B3), V) \
|
||||
ldf(T, 4, M, $(M##B4), V) \
|
||||
ldf(T, 5, M, $(M##B5), V) \
|
||||
ldf(T, 6, M, $(M##B6), V) \
|
||||
ldf(T, 7, M, $(M##B7), V) \
|
||||
ldf(T, 8, M, $(M##B8), V) \
|
||||
ldf(T, 9, M, $(M##B9), V) \
|
||||
ldf(T, 10, M, $(M##B10), V) \
|
||||
ldf(T, 11, M, $(M##B11), V) \
|
||||
ldf(T, 12, M, $(M##B12), V) \
|
||||
ldf(T, 13, M, $(M##B13), V) \
|
||||
ldf(T, 14, M, $(M##B14), V) \
|
||||
ldf(T, 15, M, $(M##B15), V) \
|
||||
ldf(T, 16, M, $(M##B16), V) \
|
||||
ldf(T, 17, M, $(M##B17), V) \
|
||||
ldf(T, 18, M, $(M##B18), V) \
|
||||
ldf(T, 19, M, $(M##B19), V) \
|
||||
ldf(T, 20, M, $(M##B20), V) \
|
||||
ldf(T, 21, M, $(M##B21), V) \
|
||||
ldf(T, 22, M, $(M##B22), V) \
|
||||
ldf(T, 23, M, $(M##B23), V) \
|
||||
ldf(T, 24, M, $(M##B24), V) \
|
||||
ldf(T, 25, M, $(M##B25), V) \
|
||||
ldf(T, 26, M, $(M##B26), V)
|
||||
#define ldf4(T, M, V) \
|
||||
ldf(T, 2, M, $(M##B2), V) \
|
||||
ldf8(T, M, V)
|
||||
|
||||
#define ldst_c() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx2(_c, a, 0x5a) \
|
||||
ldx2(_c, a, 0x5a) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx2(_c, b, 0x5a) \
|
||||
ldx2(_c, b, 0x5a)
|
||||
#define ldst_uc() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx2(_c, a, 0x5a) \
|
||||
ldx2(_uc, a, 0x5a) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx2(_c, b, 0x5a) \
|
||||
ldx2(_uc, b, 0x5a)
|
||||
#define ldst_s() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx2(_s, a, 0x5a5a) \
|
||||
ldx2(_s, a, 0x5a5a) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx2(_s, b, 0x5a5a) \
|
||||
ldx2(_s, b, 0x5a5a)
|
||||
#define ldst_us() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx2(_s, a, 0x5a5a) \
|
||||
ldx2(_us, a, 0x5a5a) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx2(_s, b, 0x5a5a) \
|
||||
ldx2(_us, b, 0x5a5a)
|
||||
#define ldst_i() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx4(_i, a, 0x5a5a5a5a) \
|
||||
ldx4(_i, a, 0x5a5a5a5a) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx4(_i, b, 0x5a5a5a5a) \
|
||||
ldx4(_i, b, 0x5a5a5a5a)
|
||||
#define ldst_ui() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx4(_i, a, 0x5a5a5a5a) \
|
||||
ldx4(_ui, a, 0x5a5a5a5a) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx4(_i, b, 0x5a5a5a5a) \
|
||||
ldx4(_ui, b, 0x5a5a5a5a)
|
||||
#define ldst_l() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stx8(_l, a, 0x5a5a5a5a5a5a5a5a) \
|
||||
ldx8(_l, a, 0x5a5a5a5a5a5a5a5a) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stx8(_l, b, 0x5a5a5a5a5a5a5a5a) \
|
||||
ldx8(_l, b, 0x5a5a5a5a5a5a5a5a)
|
||||
#define ldst_f() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stf4(_f, a, 0.5) \
|
||||
ldf4(_f, a, 0.5) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stf4(_f, b, 0.5) \
|
||||
ldf4(_f, b, 0.5)
|
||||
#define ldst_d() \
|
||||
reset(0xa5) \
|
||||
movi %v0 buf \
|
||||
stf8(_d, a, 0.5) \
|
||||
ldf8(_d, a, 0.5) \
|
||||
reset(0xa5) \
|
||||
movi %v0 $(buf + M64) \
|
||||
stf8(_d, b, 0.5) \
|
||||
ldf8(_d, b, 0.5)
|
||||
|
||||
.data 67112960
|
||||
buf:
|
||||
.size M64
|
||||
.size 8
|
||||
ok:
|
||||
.c "ok"
|
||||
|
||||
.code
|
||||
prolog
|
||||
|
||||
alu(add)
|
||||
alu(sub)
|
||||
alu(rsb)
|
||||
alu(mul)
|
||||
alu(div)
|
||||
alu(rem)
|
||||
lsh()
|
||||
rsh()
|
||||
alu(and)
|
||||
alu(or)
|
||||
alu(xor)
|
||||
ldst_c()
|
||||
ldst_uc()
|
||||
ldst_s()
|
||||
ldst_us()
|
||||
ldst_i()
|
||||
#if __WORDSIZE == 64
|
||||
ldst_ui()
|
||||
ldst_l()
|
||||
#endif
|
||||
ldst_f()
|
||||
ldst_d()
|
||||
|
||||
prepare
|
||||
pushargi ok
|
||||
finishi @puts
|
||||
ret
|
||||
epilog
|
||||
|
|
@ -2466,10 +2466,15 @@ _ldi_l(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|||
static void
|
||||
_ldxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
addr(r0, r1, r2);
|
||||
ldr_c(r0, r0);
|
||||
#else
|
||||
rex(0, WIDE, r0, r1, r2);
|
||||
ic(0x0f);
|
||||
ic(0xbe);
|
||||
rx(r0, 0, r2, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2493,10 +2498,15 @@ _ldxi_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
static void
|
||||
_ldxr_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
addr(r0, r1, r2);
|
||||
ldr_uc(r0, r0);
|
||||
#else
|
||||
rex(0, WIDE, r0, r1, r2);
|
||||
ic(0x0f);
|
||||
ic(0xb6);
|
||||
rx(r0, 0, r2, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2520,10 +2530,15 @@ _ldxi_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
static void
|
||||
_ldxr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
addr(r0, r1, r2);
|
||||
ldr_s(r0, r0);
|
||||
#else
|
||||
rex(0, WIDE, r0, r1, r2);
|
||||
ic(0x0f);
|
||||
ic(0xbf);
|
||||
rx(r0, 0, r2, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2547,10 +2562,15 @@ _ldxi_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
static void
|
||||
_ldxr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
addr(r0, r1, r2);
|
||||
ldr_us(r0, r0);
|
||||
#else
|
||||
rex(0, WIDE, r0, r1, r2);
|
||||
ic(0x0f);
|
||||
ic(0xb7);
|
||||
rx(r0, 0, r2, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2610,9 +2630,15 @@ _ldxi_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
static void
|
||||
_ldxr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
addr(r0, r1, r2);
|
||||
/* to avoid confusion with macro renames */
|
||||
_ldr_ui(_jit, r0, r0);
|
||||
#else
|
||||
rex(0, 0, r0, r1, r2);
|
||||
ic(0x8b);
|
||||
rx(r0, 0, r2, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2789,6 +2815,12 @@ static void
|
|||
_stxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
jit_int32_t reg;
|
||||
#if __X64_32
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
str_c(rn(reg), r2);
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
if (reg8_p(r2)) {
|
||||
rex(0, 0, r2, r1, r0);
|
||||
ic(0x88);
|
||||
|
|
@ -2802,6 +2834,7 @@ _stxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|||
rx(rn(reg), 0, r0, r1, _SCL1);
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2834,10 +2867,18 @@ _stxi_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|||
static void
|
||||
_stxr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
str_s(rn(reg), r2);
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
ic(0x66);
|
||||
rex(0, 0, r2, r1, r0);
|
||||
ic(0x89);
|
||||
rx(r2, 0, r0, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -2861,9 +2902,17 @@ _stxi_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|||
static void
|
||||
_stxr_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
str_i(rn(reg), r2);
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
rex(0, 0, r2, r1, r0);
|
||||
ic(0x89);
|
||||
rx(r2, 0, r0, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
|||
|
|
@ -232,13 +232,15 @@ static void _sse_unordi_f(jit_state_t*,jit_int32_t,jit_int32_t,jit_float32_t*);
|
|||
# define sse_ldr_f(r0, r1) movssmr(0, r1, _NOREG, _SCL1, r0)
|
||||
# define sse_ldi_f(r0, i0) _sse_ldi_f(_jit, r0, i0)
|
||||
static void _sse_ldi_f(jit_state_t*, jit_int32_t, jit_word_t);
|
||||
# define sse_ldxr_f(r0, r1, r2) movssmr(0, r1, r2, _SCL1, r0)
|
||||
# define sse_ldxr_f(r0, r1, r2) _sse_ldxr_f(_jit, r0, r1, r2)
|
||||
static void _sse_ldxr_f(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
|
||||
# define sse_ldxi_f(r0, r1, i0) _sse_ldxi_f(_jit, r0, r1, i0)
|
||||
static void _sse_ldxi_f(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
|
||||
# define sse_str_f(r0, r1) movssrm(r1, 0, r0, _NOREG, _SCL1)
|
||||
# define sse_sti_f(i0, r0) _sse_sti_f(_jit, i0, r0)
|
||||
static void _sse_sti_f(jit_state_t*, jit_word_t,jit_int32_t);
|
||||
# define sse_stxr_f(r0, r1, r2) movssrm(r2, 0, r0, r1, _SCL1)
|
||||
# define sse_stxr_f(r0, r1, r2) _sse_stxr_f(_jit, r0, r1, r2)
|
||||
static void _sse_stxr_f(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
||||
# define sse_stxi_f(i0, r0, r1) _sse_stxi_f(_jit, i0, r0, r1)
|
||||
static void _sse_stxi_f(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
||||
# define sse_bltr_f(i0, r0, r1) _sse_bltr_f(_jit, i0, r0, r1)
|
||||
|
|
@ -366,14 +368,16 @@ static void _sse_unordi_d(jit_state_t*,jit_int32_t,jit_int32_t,jit_float64_t*);
|
|||
# define sse_ldr_d(r0, r1) movsdmr(0, r1, _NOREG, _SCL1, r0)
|
||||
# define sse_ldi_d(r0, i0) _sse_ldi_d(_jit, r0, i0)
|
||||
static void _sse_ldi_d(jit_state_t*, jit_int32_t, jit_word_t);
|
||||
# define sse_ldxr_d(r0, r1, r2) movsdmr(0, r1, r2, _SCL1, r0)
|
||||
# define sse_ldxr_d(r0, r1, r2) _sse_ldxr_d(_jit, r0, r1, r2)
|
||||
static void _sse_ldxr_d(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
|
||||
# define sse_ldxi_d(r0, r1, i0) _sse_ldxi_d(_jit, r0, r1, i0)
|
||||
static void _sse_ldxi_d(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
|
||||
# define sse_bltr_d(i0, r0, r1) _sse_bltr_d(_jit, i0, r0, r1)
|
||||
# define sse_str_d(r0, r1) movsdrm(r1, 0, r0, _NOREG, _SCL1)
|
||||
# define sse_sti_d(i0, r0) _sse_sti_d(_jit, i0, r0)
|
||||
static void _sse_sti_d(jit_state_t*, jit_word_t,jit_int32_t);
|
||||
# define sse_stxr_d(r0, r1, r2) movsdrm(r2, 0, r0, r1, _SCL1)
|
||||
# define sse_stxr_d(r0, r1, r2) _sse_stxr_d(_jit, r0, r1, r2)
|
||||
static void _sse_stxr_d(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
||||
# define sse_stxi_d(i0, r0, r1) _sse_stxi_d(_jit, i0, r0, r1)
|
||||
static void _sse_stxi_d(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
||||
static jit_word_t _sse_bltr_d(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
||||
|
|
@ -934,6 +938,20 @@ _sse_ldi_f(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|||
}
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_ldxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r1, r2);
|
||||
sse_ldr_f(r0, rn(reg));
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
movssmr(0, r1, r2, _SCL1, r0);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_ldxi_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
||||
{
|
||||
|
|
@ -942,8 +960,13 @@ _sse_ldxi_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
movssmr(i0, r1, _NOREG, _SCL1, r0);
|
||||
else {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r1, i0);
|
||||
sse_ldr_f(r0, rn(reg));
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
sse_ldxr_f(r0, r1, rn(reg));
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
|
|
@ -962,6 +985,20 @@ _sse_sti_f(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|||
}
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_stxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
sse_str_f(rn(reg), r2);
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
movssrm(r2, 0, r0, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_stxi_f(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
||||
{
|
||||
|
|
@ -970,8 +1007,13 @@ _sse_stxi_f(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|||
movssrm(r1, i0, r0, _NOREG, _SCL1);
|
||||
else {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r0, i0);
|
||||
sse_str_f(rn(reg), r1);
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
sse_stxr_f(rn(reg), r0, r1);
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
|
|
@ -1289,6 +1331,20 @@ _sse_ldi_d(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|||
}
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_ldxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r1, r2);
|
||||
sse_ldr_d(r0, rn(reg));
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
movsdmr(0, r1, r2, _SCL1, r0);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_ldxi_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
||||
{
|
||||
|
|
@ -1297,8 +1353,13 @@ _sse_ldxi_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
movsdmr(i0, r1, _NOREG, _SCL1, r0);
|
||||
else {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r1, i0);
|
||||
sse_ldr_d(r0, rn(reg));
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
sse_ldxr_d(r0, r1, rn(reg));
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
|
|
@ -1317,6 +1378,20 @@ _sse_sti_d(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|||
}
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_stxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
sse_str_d(rn(reg), r2);
|
||||
jit_unget_reg(reg);
|
||||
#else
|
||||
movsdrm(r2, 0, r0, r1, _SCL1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
_sse_stxi_d(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
||||
{
|
||||
|
|
@ -1325,8 +1400,13 @@ _sse_stxi_d(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|||
movsdrm(r1, i0, r0, _NOREG, _SCL1);
|
||||
else {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r0, i0);
|
||||
sse_str_d(rn(reg), r1);
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
sse_stxr_f(rn(reg), r0, r1);
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -887,8 +887,15 @@ _x87_ldi_f(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|||
static void
|
||||
_x87_ldxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r1, r2);
|
||||
x87_ldr_f(r0, rn(reg));
|
||||
#else
|
||||
fldsm(0, r1, r2, _SCL1);
|
||||
fstpr(r0 + 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -901,8 +908,13 @@ _x87_ldxi_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
}
|
||||
else {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r1, i0);
|
||||
x87_ldr_f(r0, rn(reg));
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
x87_ldxr_f(r0, r1, rn(reg));
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
|
|
@ -941,6 +953,12 @@ _x87_sti_f(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|||
static void
|
||||
_x87_stxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
x87_str_f(rn(reg), r2);
|
||||
#else
|
||||
if (r2 == _ST0_REGNO)
|
||||
fstsm(0, r0, r1, _SCL1);
|
||||
else {
|
||||
|
|
@ -948,6 +966,7 @@ _x87_stxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|||
fstsm(0, r0, r1, _SCL1);
|
||||
fxchr(r2);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -956,8 +975,13 @@ _x87_stxi_f(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|||
jit_int32_t reg;
|
||||
if (!can_sign_extend_int_p(i0)) {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r0, i0);
|
||||
x87_str_f(rn(reg), r1);
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
x87_stxr_f(rn(reg), r0, r1);
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
else if (r1 == _ST0_REGNO)
|
||||
|
|
@ -1144,8 +1168,15 @@ _x87_ldi_d(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|||
static void
|
||||
_x87_ldxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r1, r2);
|
||||
x87_ldr_d(r0, rn(reg));
|
||||
#else
|
||||
fldlm(0, r1, r2, _SCL1);
|
||||
fstpr(r0 + 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -1158,8 +1189,13 @@ _x87_ldxi_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
}
|
||||
else {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r1, i0);
|
||||
x87_ldr_d(r0, rn(reg));
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
x87_ldxr_d(r0, r1, rn(reg));
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
|
|
@ -1198,6 +1234,12 @@ _x87_sti_d(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|||
static void
|
||||
_x87_stxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
||||
{
|
||||
#if __X64_32
|
||||
jit_int32_t reg;
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
addr(rn(reg), r0, r1);
|
||||
x87_str_d(rn(reg), r2);
|
||||
#else
|
||||
if (r2 == _ST0_REGNO)
|
||||
fstlm(0, r0, r1, _SCL1);
|
||||
else {
|
||||
|
|
@ -1205,6 +1247,7 @@ _x87_stxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|||
fstlm(0, r0, r1, _SCL1);
|
||||
fxchr(r2);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -1213,8 +1256,13 @@ _x87_stxi_d(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|||
jit_int32_t reg;
|
||||
if (!can_sign_extend_int_p(i0)) {
|
||||
reg = jit_get_reg(jit_class_gpr);
|
||||
#if __X64_32
|
||||
addi(rn(reg), r0, i0);
|
||||
x87_str_d(rn(reg), r1);
|
||||
#else
|
||||
movi(rn(reg), i0);
|
||||
x87_stxr_d(rn(reg), r0, r1);
|
||||
#endif
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
else if (r1 == _ST0_REGNO)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue