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initial import
(automatically generated log message) git-archimport-id: bonzini@gnu.org--2004b/lightning--stable--1.2--base-0
This commit is contained in:
Paolo Bonzini
commit
3b4c061913
79 changed files with 26993 additions and 0 deletions
303
lightning/sparc/asm.h
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303
lightning/sparc/asm.h
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/******************************** -*- C -*- ****************************
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*
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* Run-time assembler for the SPARC
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*
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***********************************************************************/
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/***********************************************************************
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*
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* Copyright 1999, 2000, 2001, 2002 Ian Piumarta
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*
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* This file is part of GNU lightning.
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*
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* GNU lightning is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; either version 2.1, or (at your option)
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* any later version.
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*
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* GNU lightning is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
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* License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
|
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* along with GNU lightning; see the file COPYING.LESSER; if not, write to the
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* Free Software Foundation, 59 Temple Place - Suite 330, Boston,
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* MA 02111-1307, USA.
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*
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***********************************************************************/
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#ifndef __lightning_asm_h
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#define __lightning_asm_h
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/* <imm> = [0-9]+ -> add i, one parameter (imm)
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* <reg> = %<imm> -> add r, one parameter (imm or _Rr(imm) )
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* %g<imm> -> add r, one parameter (imm or _Rg(imm) )
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* %o<imm> -> add r, one parameter (imm+8 or _Ro(imm) )
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* %l<imm> -> add r, one parameter (imm+16 or _Rl(imm) )
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* %i<imm> -> add r, one parameter (imm+24 or _Ri(imm) )
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* <mem> = <imm>(<reg>) -> add m, two parameters (reg,imm)
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* <idx> = <reg>(<reg>) -> add x, two parameters (reg,reg)
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*/
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typedef unsigned int jit_insn;
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#define _d30(BD) ((_jit_UL(BD) - _jit_UL(_jit.x.pc))>>2)
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#define _d22(BD) _ck_d(22, _d30(BD))
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#define _HI(I) (_jit_UL(I) >> (10))
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#define _LO(I) (_jit_UL(I) & _MASK(10))
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/* register names */
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#define _y 0
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#define _psr 1
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#define _Rr(N) ( 0+(N))
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#define _Rg(N) ( 0+(N))
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#define _Ro(N) ( 8+(N))
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#define _Rl(N) (16+(N))
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#define _Ri(N) (24+(N))
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/* instruction formats -- Figure 5-1, page 44 in */
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/* SPARC International, "The SPARC Architecture Manual, Version 8", Prentice-Hall, 1992. */
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#define _0i(RD, OP2, IMM) _jit_I((0<<30)| (_u5(RD)<<25)|(_u3(OP2)<<22)| _u22(IMM))
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#define _0( A, CC, OP2, DSP) _jit_I((0<<30)|(_u1(A)<<29)|(_u4(CC)<<25)|(_u3(OP2)<<22)| _d22(DSP))
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#define _0d( A, CC, OP2, DSP) _jit_I((0<<30)|(_u1(A)<<29)|(_u4(CC)<<25)|(_u3(OP2)<<22)| _u22(DSP))
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#define _1( DSP) _jit_I((1<<30)| _d30(DSP))
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#define _2( RD, OP3, RS1, I, ASI, RS2) _jit_I((2<<30)| (_u5(RD)<<25)|(_u6(OP3)<<19)|(_u5(RS1)<<14)|(_u1(I)<<13)|(_u8(ASI)<<5)|_u5 (RS2))
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#define _2i(RD, OP3, RS1, I, IMM) _jit_I((2<<30)| (_u5(RD)<<25)|(_u6(OP3)<<19)|(_u5(RS1)<<14)|(_u1(I)<<13)| _s13(IMM))
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#define _2f(RD, OP3, RS1, OPF, RS2) _jit_I((2<<30)| (_u5(RD)<<25)|(_u6(OP3)<<19)|(_u5(RS1)<<14)| (_u9(OPF)<<5)|_u5 (RS2))
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#define _3( RD, OP3, RS1, I, ASI, RS2) _jit_I((3<<30)| (_u5(RD)<<25)|(_u6(OP3)<<19)|(_u5(RS1)<<14)|(_u1(I)<<13)|(_u8(ASI)<<5)|_u5 (RS2))
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#define _3i(RD, OP3, RS1, I, IMM) _jit_I((3<<30)| (_u5(RD)<<25)|(_u6(OP3)<<19)|(_u5(RS1)<<14)|(_u1(I)<<13)| _s13(IMM))
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/* basic instructions [Section B, page 87] */
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#define ADDrrr(RS1, RS2, RD) _2 ((RD), 0, (RS1), 0, 0, (RS2))
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#define ADDrir(RS1, IMM, RD) _2i ((RD), 0, (RS1), 1, (IMM))
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#define ADDCCrrr(RS1, RS2, RD) _2 ((RD), 16, (RS1), 0, 0, (RS2))
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#define ADDCCrir(RS1, IMM, RD) _2i ((RD), 16, (RS1), 1, (IMM))
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#define ADDXrrr(RS1, RS2, RD) _2 ((RD), 8, (RS1), 0, 0, (RS2))
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#define ADDXrir(RS1, IMM, RD) _2i ((RD), 8, (RS1), 1, (IMM))
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#define ADDXCCrrr(RS1, RS2, RD) _2 ((RD), 24, (RS1), 0, 0, (RS2))
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#define ADDXCCrir(RS1, IMM, RD) _2i ((RD), 24, (RS1), 1, (IMM))
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#define ANDrrr(RS1, RS2, RD) _2 ((RD), 1, (RS1), 0, 0, (RS2))
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#define ANDrir(RS1, IMM, RD) _2i ((RD), 1, (RS1), 1, (IMM))
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#define ANDCCrrr(RS1, RS2, RD) _2 ((RD), 17, (RS1), 0, 0, (RS2))
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#define ANDCCrir(RS1, IMM, RD) _2i ((RD), 17, (RS1), 1, (IMM))
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#define BNi(DISP) _0 (0, 0, 2, (DISP))
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#define BN_Ai(DISP) _0 (1, 0, 2, (DISP))
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#define BEi(DISP) _0 (0, 1, 2, (DISP))
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#define BE_Ai(DISP) _0 (1, 1, 2, (DISP))
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#define BLEi(DISP) _0 (0, 2, 2, (DISP))
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#define BLE_Ai(DISP) _0 (1, 2, 2, (DISP))
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#define BLi(DISP) _0 (0, 3, 2, (DISP))
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#define BL_Ai(DISP) _0 (1, 3, 2, (DISP))
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#define BLEUi(DISP) _0 (0, 4, 2, (DISP))
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#define BLEU_Ai(DISP) _0 (1, 4, 2, (DISP))
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#define BCSi(DISP) _0 (0, 5, 2, (DISP))
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#define BCS_Ai(DISP) _0 (1, 5, 2, (DISP))
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#define BNEGi(DISP) _0 (0, 6, 2, (DISP))
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#define BNEG_Ai(DISP) _0 (1, 6, 2, (DISP))
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#define BVSi(DISP) _0 (0, 7, 2, (DISP))
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#define BVS_Ai(DISP) _0 (1, 7, 2, (DISP))
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#define BAi(DISP) _0 (0, 8, 2, (DISP))
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#define BA_Ai(DISP) _0 (1, 8, 2, (DISP))
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#define BNEi(DISP) _0 (0, 9, 2, (DISP))
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#define BNE_Ai(DISP) _0 (1, 9, 2, (DISP))
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#define BGi(DISP) _0 (0, 10, 2, (DISP))
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#define BG_Ai(DISP) _0 (1, 10, 2, (DISP))
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#define BGEi(DISP) _0 (0, 11, 2, (DISP))
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#define BGE_Ai(DISP) _0 (1, 11, 2, (DISP))
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#define BGUi(DISP) _0 (0, 12, 2, (DISP))
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#define BGU_Ai(DISP) _0 (1, 12, 2, (DISP))
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#define BCCi(DISP) _0 (0, 13, 2, (DISP))
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#define BCC_Ai(DISP) _0 (1, 13, 2, (DISP))
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#define BPOSi(DISP) _0 (0, 14, 2, (DISP))
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#define BPOS_Ai(DISP) _0 (1, 14, 2, (DISP))
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#define BVCi(DISP) _0 (0, 15, 2, (DISP))
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#define BVC_Ai(DISP) _0 (1, 15, 2, (DISP))
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#define CALLi(DISP) _1 ((DISP))
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#define FLUSHrr(RS1, RS2) _2 (0, 0x3b, (RS1), 0, 0, (RS2))
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#define FLUSHir(IMM, RS1) _2i (0, 0x3b, (RS1), 1, (IMM))
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#define JMPLxr(RS1, RS2, RD) _2 ((RD), 56, (RS1), 0, 0, (RS2))
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#define JMPLmr(RS1, IMM, RD) _2i ((RD), 56, (RS1), 1, (IMM))
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#define LDxr(RS1, RS2, RD) _3 ((RD), 0, (RS1), 0, 0, (RS2))
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#define LDmr(RS1, IMM, RD) _3i ((RD), 0, (RS1), 1, (IMM))
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#define LDUBxr(RS1, RS2, RD) _3 ((RD), 1, (RS1), 0, 0, (RS2))
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#define LDUBmr(RS1, IMM, RD) _3i ((RD), 1, (RS1), 1, (IMM))
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#define LDUHxr(RS1, RS2, RD) _3 ((RD), 2, (RS1), 0, 0, (RS2))
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#define LDUHmr(RS1, IMM, RD) _3i ((RD), 2, (RS1), 1, (IMM))
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#define LDDxr(RS1, RS2, RD) _3 ((RD), 3, (RS1), 0, 0, (RS2))
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#define LDDmr(RS1, IMM, RD) _3i ((RD), 3, (RS1), 1, (IMM))
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#define LDSBxr(RS1, RS2, RD) _3 ((RD), 9, (RS1), 0, 0, (RS2))
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#define LDSBmr(RS1, IMM, RD) _3i ((RD), 9, (RS1), 1, (IMM))
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#define LDSHxr(RS1, RS2, RD) _3 ((RD), 10, (RS1), 0, 0, (RS2))
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#define LDSHmr(RS1, IMM, RD) _3i ((RD), 10, (RS1), 1, (IMM))
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#define ORrrr(RS1, RS2, RD) _2 ((RD), 2, (RS1), 0, 0, (RS2))
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#define ORrir(RS1, IMM, RD) _2i ((RD), 2, (RS1), 1, (IMM))
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#define ORCCrrr(RS1, RS2, RD) _2 ((RD), 18, (RS1), 0, 0, (RS2))
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#define ORCCrir(RS1, IMM, RD) _2i ((RD), 18, (RS1), 1, (IMM))
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#define RDir(RS, RD) _2 ((RD), (RS)|0x28, 0, 0, 0,0)
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#define RESTORErrr(RS1, RS2, RD) _2 ((RD), 61, (RS1), 0, 0, (RS2))
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#define RESTORErir(RS1, IMM, RD) _2i ((RD), 61, (RS1), 1, (IMM))
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#define SAVErrr(RS1, RS2, RD) _2 ((RD), 60, (RS1), 0, 0, (RS2))
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#define SAVErir(RS1, IMM, RD) _2i ((RD), 60, (RS1), 1, (IMM))
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#define SDIVrrr(RS1, RS2, RD) _2 ((RD), 15, (RS1), 0, 0, (RS2))
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#define SDIVrir(RS1, IMM, RD) _2i ((RD), 15, (RS1), 1, (IMM))
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#define SDIVCCrrr(RS1, RS2, RD) _2 ((RD), 31, (RS1), 0, 0, (RS2))
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#define SDIVCCrir(RS1, IMM, RD) _2i ((RD), 31, (RS1), 1, (IMM))
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#define SETHIir(IMM, RD) _0i ((RD), 4, (IMM))
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#define SLLrrr(RS1, RS2, RD) _2 ((RD), 37, (RS1), 0, 0, (RS2))
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#define SLLrir(RS1, IMM, RD) _2i ((RD), 37, (RS1), 1, (IMM))
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#define SMULrrr(RS1, RS2, RD) _2 ((RD), 11, (RS1), 0, 0, (RS2))
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#define SMULrir(RS1, IMM, RD) _2i ((RD), 11, (RS1), 1, (IMM))
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#define SMULCCrrr(RS1, RS2, RD) _2 ((RD), 27, (RS1), 0, 0, (RS2))
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#define SMULCCrir(RS1, IMM, RD) _2i ((RD), 27, (RS1), 1, (IMM))
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#define SRArrr(RS1, RS2, RD) _2 ((RD), 39, (RS1), 0, 0, (RS2))
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#define SRArir(RS1, IMM, RD) _2i ((RD), 39, (RS1), 1, (IMM))
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#define SRLrrr(RS1, RS2, RD) _2 ((RD), 38, (RS1), 0, 0, (RS2))
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#define SRLrir(RS1, IMM, RD) _2i ((RD), 38, (RS1), 1, (IMM))
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#define STrx(RS, RD1, RD2) _3 ((RS), 4, (RD1), 0, 0, (RD2))
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#define STrm(RS, RD, IMM) _3i ((RS), 4, (RD), 1, (IMM))
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#define STBrx(RS, RD1, RD2) _3 ((RS), 5, (RD1), 0, 0, (RD2))
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#define STBrm(RS, RD, IMM) _3i ((RS), 5, (RD), 1, (IMM))
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#define STBAR() _0i (0, 0x28, 15, 0, 0)
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#define STHrx(RS, RD1, RD2) _3 ((RS), 6, (RD1), 0, 0, (RD2))
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#define STHrm(RS, RD, IMM) _3i ((RS), 6, (RD), 1, (IMM))
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#define STDrx(RS, RD1, RD2) _3 ((RS), 7, (RD1), 0, 0, (RD2))
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#define STDrm(RS, RD, IMM) _3i ((RS), 7, (RD), 1, (IMM))
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#define SUBrrr(RS1, RS2, RD) _2 ((RD), 4, (RS1), 0, 0, (RS2))
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#define SUBrir(RS1, IMM, RD) _2i ((RD), 4, (RS1), 1, (IMM))
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#define SUBCCrrr(RS1, RS2, RD) _2 ((RD), 20, (RS1), 0, 0, (RS2))
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#define SUBCCrir(RS1, IMM, RD) _2i ((RD), 20, (RS1), 1, (IMM))
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#define SUBXrrr(RS1, RS2, RD) _2 ((RD), 12, (RS1), 0, 0, (RS2))
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#define SUBXrir(RS1, IMM, RD) _2i ((RD), 12, (RS1), 1, (IMM))
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#define SUBXCCrrr(RS1, RS2, RD) _2 ((RD), 28, (RS1), 0, 0, (RS2))
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#define SUBXCCrir(RS1, IMM, RD) _2i ((RD), 28, (RS1), 1, (IMM))
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#define UDIVrrr(RS1, RS2, RD) _2 ((RD), 14, (RS1), 0, 0, (RS2))
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#define UDIVrir(RS1, IMM, RD) _2i ((RD), 14, (RS1), 1, (IMM))
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#define UDIVCCrrr(RS1, RS2, RD) _2 ((RD), 30, (RS1), 0, 0, (RS2))
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#define UDIVCCrir(RS1, IMM, RD) _2i ((RD), 30, (RS1), 1, (IMM))
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#define UMULrrr(RS1, RS2, RD) _2 ((RD), 10, (RS1), 0, 0, (RS2))
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#define UMULrir(RS1, IMM, RD) _2i ((RD), 10, (RS1), 1, (IMM))
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#define UMULCCrrr(RS1, RS2, RD) _2 ((RD), 26, (RS1), 0, 0, (RS2))
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#define UMULCCrir(RS1, IMM, RD) _2i ((RD), 26, (RS1), 1, (IMM))
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#define WRrri(RS1, RS2, RD) _2 (0, (RD)|0x30, RS1, 0, 0, (RS2))
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#define WRrii(RS1, IMM, RD) _2i (0, (RD)|0x30, RS1, 1, (IMM))
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#define XORrrr(RS1, RS2, RD) _2 ((RD), 3, (RS1), 0, 0, (RS2))
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#define XORrir(RS1, IMM, RD) _2i ((RD), 3, (RS1), 1, (IMM))
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#define XORCCrrr(RS1, RS2, RD) _2 ((RD), 19, (RS1), 0, 0, (RS2))
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#define XORCCrir(RS1, IMM, RD) _2i ((RD), 19, (RS1), 1, (IMM))
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/* synonyms */
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#define Bi(DISP) BAi((DISP))
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#define B_Ai(DISP) BA_Ai((DISP))
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#define BNZi(DISP) BNEi((DISP))
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#define BNZ_Ai(DISP) BNE_Ai((DISP))
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#define BZi(DISP) BEi((DISP))
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#define BZ_Ai(DISP) BE_Ai((DISP))
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#define BGEUi(DISP) BCCi((DISP))
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#define BGEU_Ai(DISP) BCC_Ai((DISP))
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#define BLUi(DISP) BCSi((DISP))
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#define BLU_Ai(DISP) BCS_Ai((DISP))
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#define LDUWxr(RS1, RS2, RD) LDxr((RS1), (RS2), (RD))
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#define LDUWmr(RS1, IMM, RD) LDmr((RS1), (IMM), (RD))
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#define LDSWxr(RS1, RS2, RD) LDxr((RS1), (RS2), (RD))
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#define LDSWmr(RS1, IMM, RD) LDmr((RS1), (IMM), (RD))
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#define STWrx(RS, RD1, RD2) STrx((RS), (RD1), (RD2))
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#define STWrm(RS, RD, IMM) STrm((RS), (RD), (IMM))
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/* synthetic instructions [Table A-1, page 85] */
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#define BCLRrr(R,S) ANDNrrr((R), (S), (S))
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#define BCLRir(I,R) ANDNrir((R), (I), (R))
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#define BSETrr(R,S) ORrrr((R), (S), (S))
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#define BSETir(I,R) ORrir((R), (I), (R))
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#define BTOGrr(R,S) XORrrr((R), (S), (S))
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#define BTOGir(I,R) XORrir((R), (I), (R))
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#define BTSTrr(R,S) ANDCCrrr((R), (S), 0)
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#define BTSTir(I,R) ANDCCrir((R), (I), 0)
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#define CALLm(R,I) JMPLmr((R), (I), _Ro(7))
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#define CALLx(R,S) JMPLxr((R), (S), _Ro(7))
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#define CLRr(R) ORrrr(0, 0, (R))
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#define CLRBm(R,I) STBrm(0, (R), (I))
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#define CLRBx(R,S) STBrm(0, (R), (S))
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#define CLRHm(R,I) STHrm(0, (R), (I))
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#define CLRHx(R,S) STHrm(0, (R), (S))
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#define CLRm(R,I) STrm(0, (R), (I))
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#define CLRx(R,S) STrm(0, (R), (S))
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#define CMPrr(RS1, RS2) SUBCCrrr((RS1), (RS2), 0)
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#define CMPri(RS1, IMM) SUBCCrir((RS1), (IMM), 0)
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#define DECr(R) SUBrir((R), 1, (R))
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#define DECir(I,R) SUBrir((R), (I), (R))
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#define DECCCr(R) SUBCCrir((R), 1, (R))
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#define DECCCir(I,R) SUBCCrir((R), (I), (R))
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#define INCr(R) ADDrir((R), 1, (R))
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#define INCir(I,R) ADDrir((R), (I), (R))
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#define INCCCr(R) ADDCCrir((R), 1, (R))
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#define INCCCir(I,R) ADDCCrir((R), (I), (R))
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|
||||
#define JMPm(R,I) JMPLmr((R), (I), 0)
|
||||
#define JMPx(R,S) JMPLxr((R), (S), 0)
|
||||
|
||||
#define MOVrr(R,S) ORrrr(0, (R), (S))
|
||||
#define MOVir(I, R) ORrir(0, (I), (R))
|
||||
|
||||
#define NEGrr(R,S) SUBrrr(0, (R), (S))
|
||||
#define NEGr(R) SUBrrr(0, (R), (R))
|
||||
#define NOP() SETHIir(0, 0)
|
||||
|
||||
#define NOTrr(R,S) XNORrrr((R), 0, (S))
|
||||
#define NOTr(R) XNORrrr((R), 0, (R))
|
||||
|
||||
#define RESTORE() RESTORErrr(0, 0, 0)
|
||||
#define RET() JMPLmr(_Ri(7),8 ,0)
|
||||
#define RETL() JMPLmr(_Ro(7),8 ,0)
|
||||
|
||||
#define SAVE() SAVErrr(0, 0, 0)
|
||||
#define SETir(I,R) (_siP(13,(I)) ? MOVir((I),(R)) : SETir2(_HI(I), _LO(I), (R)))
|
||||
#define SETir2(H,L,R) (SETHIir(H,R), (L ? ORrir(R,L,R) : 0))
|
||||
|
||||
/* BNZ,a executes the delay instruction if NZ (so skips if Z)
|
||||
* BZ,a executes the delay instruction if Z (so skips if NZ). */
|
||||
#define SKIPZ() _0d (1, 9, 2, 2) /* BNZ,a .+8 */
|
||||
#define SKIPNZ() _0d (1, 1, 2, 2) /* BZ,a .+8 */
|
||||
#define SKIP() _0d (1, 0, 2, 0) /* BN,a . */
|
||||
|
||||
#define TSTr(R) ORCCrrr(0, (R), 0)
|
||||
|
||||
#define WRii(IMM, RD) WRrii(0, (IMM), (RD))
|
||||
#define WRri(RS2, RD) WRrri(0, (RS2), (RD))
|
||||
|
||||
#endif /* __ccg_asm_sparc_h */
|
||||
249
lightning/sparc/core.h
Normal file
249
lightning/sparc/core.h
Normal file
|
|
@ -0,0 +1,249 @@
|
|||
/******************************** -*- C -*- ****************************
|
||||
*
|
||||
* Platform-independent layer (Sparc version)
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
|
||||
/***********************************************************************
|
||||
*
|
||||
* Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
|
||||
* Written by Paolo Bonzini.
|
||||
*
|
||||
* This file is part of GNU lightning.
|
||||
*
|
||||
* GNU lightning is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU Lesser General Public License as published
|
||||
* by the Free Software Foundation; either version 2.1, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* GNU lightning is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
||||
* License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with GNU lightning; see the file COPYING.LESSER; if not, write to the
|
||||
* Free Software Foundation, 59 Temple Place - Suite 330, Boston,
|
||||
* MA 02111-1307, USA.
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
|
||||
#ifndef __lightning_core_h
|
||||
#define __lightning_core_h
|
||||
|
||||
#define JIT_R0 _Rl(0)
|
||||
#define JIT_R1 _Rl(1)
|
||||
#define JIT_R2 _Rl(2)
|
||||
#define JIT_V0 _Rl(3)
|
||||
#define JIT_V1 _Rl(4)
|
||||
#define JIT_V2 _Rl(5)
|
||||
#define JIT_BIG _Rg(1) /* %g1 used to make 32-bit operands */
|
||||
#define JIT_BIG2 _Rg(2) /* %g2 used to make 32-bit compare operands */
|
||||
#define JIT_SP _Ro(6)
|
||||
#define JIT_RZERO _Rg(0)
|
||||
#define JIT_RET _Ri(0)
|
||||
|
||||
/* Delay slot scheduling: jmp generates branches with annulled delay
|
||||
* slots; we toggle the annul bit if we can fill the slot. CALLs and
|
||||
* cond. branches have a different meaning for the annul bit, so we
|
||||
* automatically generate a NOP and eventually copy the delay insn onto
|
||||
* it. Delay slots in RET are already used for RESTORE, so we don't
|
||||
* schedule them.
|
||||
*
|
||||
* ,--- _jit.x.pc
|
||||
* insn X X before
|
||||
* cmp branch insn X X after (branch)
|
||||
* `--- _jit.x.pc
|
||||
* call insn insn X after (call)
|
||||
* `--- _jit.x.pc
|
||||
*/
|
||||
|
||||
struct jit_local_state {
|
||||
int nextarg_put; /* Next %o reg. to be written */
|
||||
int nextarg_get; /* Next %i reg. to be read */
|
||||
jit_insn delay;
|
||||
};
|
||||
|
||||
#define jit_fill_delay_after(branch) (_jitl.delay = *--_jit.x.pc, \
|
||||
((branch) == _jit.x.pc /* check if NOP was inserted */ \
|
||||
? (_jit.x.pc[-1] ^= 1<<29) /* no if branch, toggle annul bit */ \
|
||||
: (_jit.x.pc[-1] = _jitl.delay)), /* yes if call, replace NOP with delay insn */ \
|
||||
*_jit.x.pc = _jitl.delay, _jit.x.pc - 1) /* return addr of delay insn */
|
||||
|
||||
/* If possible, use the `small' instruction (rs, imm, rd)
|
||||
* else load imm into %l6 and use the `big' instruction (rs, %l6, rd)
|
||||
* jit_chk_imm2 uses %l7 instead of %l6 to avoid conflicts when using delay slots
|
||||
*/
|
||||
#define jit_chk_imm(imm, small, big) (_siP(13,(imm)) ? (small) : (SETir((imm), JIT_BIG), (big)) )
|
||||
#define jit_chk_imm2(imm, small, big) (_siP(13,(imm)) ? (small) : (SETir((imm), JIT_BIG2), (big)) )
|
||||
|
||||
/* Helper macros for branches */
|
||||
#define jit_branchi(rs, is, jmp, nop) (jit_chk_imm2(is, CMPri(rs, is), CMPrr(rs, JIT_BIG2)), jmp, nop, _jit.x.pc - 1)
|
||||
#define jit_branchr(s1, s2, jmp, nop) ( CMPrr(s1, s2), jmp, nop, _jit.x.pc - 1)
|
||||
|
||||
/* Helper macros for boolean tests -- delay slot sets d to 1;
|
||||
* taken branch leaves it to 1, not-taken branch resets it to 0 */
|
||||
#define jit_booli(d, rs, is, jmp) (jit_chk_imm (is, CMPri(rs, is), CMPrr(rs, JIT_BIG)), jmp, MOVir(1, (d)), MOVir(0, (d)))
|
||||
#define jit_boolr(d, s1, s2, jmp) ( CMPrr(s1, s2), jmp, MOVir(1, (d)), MOVir(0, (d)))
|
||||
|
||||
/* Helper macros for division
|
||||
* The architecture specifies that there must be 3 instructions between *
|
||||
* a y register write and a use of it for correct results. */
|
||||
#define jit_prepare_y(rs, is) (SRArir(rs, 31, JIT_BIG), WRri(JIT_BIG, _y), NOP(), NOP(), NOP(), _jit.x.pc -= jit_immsize(is))
|
||||
#define jit_clr_y(rs, is) ( WRri(0, _y), NOP(), NOP(), NOP(), _jit.x.pc -= jit_immsize(is))
|
||||
|
||||
#define jit_mod(div, mul, d, s1, s2) ( \
|
||||
div (JIT_BIG2, s1, s2), \
|
||||
mul (JIT_BIG2, JIT_BIG2, s2), \
|
||||
jit_subr_i (d, s1, JIT_BIG2))
|
||||
|
||||
/* How many instruction are needed to put imm in a register. */
|
||||
#define jit_immsize(imm) (!(imm) ? 0 : \
|
||||
(!_siP((imm), 13) && ((imm) & 0x3ff) ? 2 : 1))
|
||||
|
||||
|
||||
/* branch instructions return the address of the *delay* instruction -- this
|
||||
* is just a helper macro that makes jit_patch more readable.
|
||||
*/
|
||||
#define jit_patch_(jump_pc) \
|
||||
(*jump_pc &= ~_MASK(22), \
|
||||
*jump_pc |= ((_jit_UL(_jit.x.pc) - _jit_UL(jump_pc)) >> 2) & _MASK(22))
|
||||
|
||||
|
||||
#define jit_arg_c() (_jitl.nextarg_get++)
|
||||
#define jit_arg_i() (_jitl.nextarg_get++)
|
||||
#define jit_arg_l() (_jitl.nextarg_get++)
|
||||
#define jit_arg_p() (_jitl.nextarg_get++)
|
||||
#define jit_arg_s() (_jitl.nextarg_get++)
|
||||
#define jit_arg_uc() (_jitl.nextarg_get++)
|
||||
#define jit_arg_ui() (_jitl.nextarg_get++)
|
||||
#define jit_arg_ul() (_jitl.nextarg_get++)
|
||||
#define jit_arg_us() (_jitl.nextarg_get++)
|
||||
#define jit_addi_i(d, rs, is) jit_chk_imm((is), ADDrir((rs), (is), (d)), ADDrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_addr_i(d, s1, s2) ADDrrr((s1), (s2), (d))
|
||||
#define jit_addci_i(d, rs, is) jit_chk_imm((is), ADDCCrir((rs), (is), (d)), ADDCCrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_addcr_i(d, s1, s2) ADDCCrrr((s1), (s2), (d))
|
||||
#define jit_addxi_i(d, rs, is) jit_chk_imm((is), ADDXCCrir((rs), (is), (d)), ADDXCCrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_addxr_i(d, s1, s2) ADDXCCrrr((s1), (s2), (d))
|
||||
#define jit_andi_i(d, rs, is) jit_chk_imm((is), ANDrir((rs), (is), (d)), ANDrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_andr_i(d, s1, s2) ANDrrr((s1), (s2), (d))
|
||||
#define jit_beqi_i(label, rs, is) jit_branchi((rs), (is), BEi((label)), NOP() )
|
||||
#define jit_beqr_i(label, s1, s2) jit_branchr((s1), (s2), BEi((label)), NOP() )
|
||||
#define jit_bgei_i(label, rs, is) jit_branchi((rs), (is), BGEi((label)), NOP() )
|
||||
#define jit_bgei_ui(label, rs, is) jit_branchi((rs), (is), BGEUi((label)), NOP() )
|
||||
#define jit_bger_i(label, s1, s2) jit_branchr((s1), (s2), BGEi((label)), NOP() )
|
||||
#define jit_bger_ui(label, s1, s2) jit_branchr((s1), (s2), BGEUi((label)), NOP() )
|
||||
#define jit_bgti_i(label, rs, is) jit_branchi((rs), (is), BGi((label)), NOP() )
|
||||
#define jit_bgti_ui(label, rs, is) jit_branchi((rs), (is), BGUi((label)), NOP() )
|
||||
#define jit_bgtr_i(label, s1, s2) jit_branchr((s1), (s2), BGi((label)), NOP() )
|
||||
#define jit_bgtr_ui(label, s1, s2) jit_branchr((s1), (s2), BGUi((label)), NOP() )
|
||||
#define jit_blei_i(label, rs, is) jit_branchi((rs), (is), BLEi((label)), NOP() )
|
||||
#define jit_blei_ui(label, rs, is) jit_branchi((rs), (is), BLEUi((label)), NOP() )
|
||||
#define jit_bler_i(label, s1, s2) jit_branchr((s1), (s2), BLEi((label)), NOP() )
|
||||
#define jit_bler_ui(label, s1, s2) jit_branchr((s1), (s2), BLEUi((label)), NOP() )
|
||||
#define jit_blti_i(label, rs, is) jit_branchi((rs), (is), BLi((label)), NOP() )
|
||||
#define jit_blti_ui(label, rs, is) jit_branchi((rs), (is), BLUi((label)), NOP() )
|
||||
#define jit_bltr_i(label, s1, s2) jit_branchr((s1), (s2), BLi((label)), NOP() )
|
||||
#define jit_bltr_ui(label, s1, s2) jit_branchr((s1), (s2), BLUi((label)), NOP() )
|
||||
#define jit_bnei_i(label, rs, is) jit_branchi((rs), (is), BNEi((label)), NOP() )
|
||||
#define jit_bner_i(label, s1, s2) jit_branchr((s1), (s2), BNEi((label)), NOP() )
|
||||
#define jit_bmsi_i(label, rs, is) (jit_chk_imm((is), BTSTir((is), (rs)), BTSTrr((rs), JIT_BIG)), BNEi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bmci_i(label, rs, is) (jit_chk_imm((is), BTSTir((is), (rs)), BTSTrr((rs), JIT_BIG)), BEi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bmsr_i(label, s1, s2) ( BTSTrr((s1), (s2)), BNEi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bmcr_i(label, s1, s2) ( BTSTrr((s1), (s2)), BEi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_boaddi_i(label, rs, is) (jit_chk_imm((is), ADDCCrir((rs), (is), (rs)), ADDCCrrr((rs), JIT_BIG, (rs))), BVSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bosubi_i(label, rs, is) (jit_chk_imm((is), SUBCCrir((rs), (is), (rs)), SUBCCrrr((rs), JIT_BIG, (rs))), BVSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_boaddr_i(label, s1, s2) ( ADDCCrrr((s1), (s2), (s1)), BVSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bosubr_i(label, s1, s2) ( SUBCCrrr((s1), (s2), (s1)), BVSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_boaddi_ui(label, rs, is) (jit_chk_imm((is), ADDCCrir((rs), (is), (rs)), ADDCCrrr((rs), JIT_BIG, (rs))), BCSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bosubi_ui(label, rs, is) (jit_chk_imm((is), SUBCCrir((rs), (is), (rs)), SUBCCrrr((rs), JIT_BIG, (rs))), BCSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_boaddr_ui(label, s1, s2) ( ADDCCrrr((s1), (s2), (s1)), BCSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_bosubr_ui(label, s1, s2) ( SUBCCrrr((s1), (s2), (s1)), BCSi((label)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_calli(label) (CALLi(label), NOP(), _jit.x.pc - 1)
|
||||
#define jit_divi_i(d, rs, is) (jit_prepare_y((rs), 0x12345678), SETir((is), JIT_BIG), SDIVrrr((rs), JIT_BIG, (d)) )
|
||||
#define jit_divi_ui(d, rs, is) (jit_clr_y((rs)), 0x12345678), SETir((is), JIT_BIG), UDIVrrr((rs), JIT_BIG, (d)) )
|
||||
#define jit_divr_i(d, s1, s2) (jit_prepare_y((s1), 0), SDIVrrr((s1), (s2), (d)))
|
||||
#define jit_divr_ui(d, s1, s2) (jit_clr_y((s1), 0), UDIVrrr((s1), (s2), (d)))
|
||||
#define jit_eqi_i(d, rs, is) jit_chk_imm((is), \
|
||||
(SUBCCrir((rs), (is), (d)), ADDXCCrir((d), -1, JIT_BIG), SUBXrir(0,-1,(d))),\
|
||||
jit_eqr_i(d, rs, JIT_BIG))
|
||||
#define jit_eqr_i(d, s1, s2) (SUBCCrrr((s1), (s2), (d)), ADDXCCrir((d), -1, JIT_BIG), SUBXrir(0,-1,(d)))
|
||||
#define jit_nei_i(d, rs, is) jit_chk_imm((is), \
|
||||
(SUBCCrir((rs), (is), (d)), ADDXCCrir((d), -1, JIT_BIG), ADDXrrr(0,0,(d))),\
|
||||
jit_ner_i(d, rs, JIT_BIG))
|
||||
#define jit_ner_i(d, s1, s2) (SUBCCrrr((s1), (s2), (d)), ADDXCCrir((d), -1, JIT_BIG), ADDXrrr(0,0,(d)))
|
||||
#define jit_gei_i(d, rs, is) jit_booli ((d), (rs), (is), BGEi(_jit.x.pc + 3) )
|
||||
#define jit_gei_ui(d, rs, is) jit_booli ((d), (rs), (is), BGEUi(_jit.x.pc + 3))
|
||||
#define jit_ger_i(d, s1, s2) jit_boolr ((d), (s1), (s2), BGEi(_jit.x.pc + 3) )
|
||||
#define jit_ger_ui(d, s1, s2) jit_boolr ((d), (s1), (s2), BGEUi(_jit.x.pc + 3))
|
||||
#define jit_gti_i(d, rs, is) jit_booli ((d), (rs), (is), BGi(_jit.x.pc + 3) )
|
||||
#define jit_gti_ui(d, rs, is) jit_booli ((d), (rs), (is), BGUi(_jit.x.pc + 3) )
|
||||
#define jit_gtr_i(d, s1, s2) jit_boolr ((d), (s1), (s2), BGi(_jit.x.pc + 3) )
|
||||
#define jit_gtr_ui(d, s1, s2) jit_boolr ((d), (s1), (s2), BGUi(_jit.x.pc + 3) )
|
||||
#define jit_hmuli_i(d, rs, is) (jit_muli_i (JIT_BIG, (rs), (is)), RDir (_y, (d)))
|
||||
#define jit_hmuli_ui(d, rs, is) (jit_muli_ui(JIT_BIG, (rs), (is)), RDir (_y, (d)))
|
||||
#define jit_hmulr_i(d, s1, s2) (jit_mulr_i (JIT_BIG, (s1), (s2)), RDir (_y, (d)))
|
||||
#define jit_hmulr_ui(d, s1, s2) (jit_mulr_ui(JIT_BIG, (s1), (s2)), RDir (_y, (d)))
|
||||
#define jit_jmpi(label) (BA_Ai((label)), _jit.x.pc)
|
||||
#define jit_jmpr(reg) (JMPx(JIT_RZERO, (reg)), NOP(), _jit.x.pc - 1)
|
||||
#define jit_ldxi_c(d, rs, is) jit_chk_imm((is), LDSBmr((rs), (is), (d)), LDSBxr((rs), JIT_BIG, (d)))
|
||||
#define jit_ldxi_i(d, rs, is) jit_chk_imm((is), LDSWmr((rs), (is), (d)), LDSWxr((rs), JIT_BIG, (d)))
|
||||
#define jit_ldxi_s(d, rs, is) jit_chk_imm((is), LDSHmr((rs), (is), (d)), LDSHxr((rs), JIT_BIG, (d)))
|
||||
#define jit_ldxi_uc(d, rs, is) jit_chk_imm((is), LDUBmr((rs), (is), (d)), LDUBxr((rs), JIT_BIG, (d)))
|
||||
#define jit_ldxi_us(d, rs, is) jit_chk_imm((is), LDUHmr((rs), (is), (d)), LDUHxr((rs), JIT_BIG, (d)))
|
||||
#define jit_ldxr_c(d, s1, s2) LDSBxr((s1), (s2), (d))
|
||||
#define jit_ldxr_i(d, s1, s2) LDSWxr((s1), (s2), (d))
|
||||
#define jit_ldxr_s(d, s1, s2) LDSHxr((s1), (s2), (d))
|
||||
#define jit_ldxr_uc(d, s1, s2) LDUBxr((s1), (s2), (d))
|
||||
#define jit_ldxr_us(d, s1, s2) LDUHxr((s1), (s2), (d))
|
||||
#define jit_lei_i(d, rs, is) jit_booli ((d), (rs), (is), BLEi(_jit.x.pc + 3) )
|
||||
#define jit_lei_ui(d, rs, is) jit_booli ((d), (rs), (is), BLEUi(_jit.x.pc + 3))
|
||||
#define jit_ler_i(d, s1, s2) jit_boolr ((d), (s1), (s2), BLEi(_jit.x.pc + 3) )
|
||||
#define jit_ler_ui(d, s1, s2) jit_boolr ((d), (s1), (s2), BLEUi(_jit.x.pc + 3))
|
||||
#define jit_lshi_i(d, rs, is) SLLrir((rs), (is), (d))
|
||||
#define jit_lshr_i(d, r1, r2) SLLrrr((r1), (r2), (d))
|
||||
#define jit_lti_i(d, rs, is) jit_booli ((d), (rs), (is), BLi(_jit.x.pc + 3) )
|
||||
#define jit_lti_ui(d, rs, is) jit_booli ((d), (rs), (is), BLUi(_jit.x.pc + 3) )
|
||||
#define jit_ltr_i(d, s1, s2) jit_boolr ((d), (s1), (s2), BLi(_jit.x.pc + 3) )
|
||||
#define jit_ltr_ui(d, s1, s2) jit_boolr ((d), (s1), (s2), BLUi(_jit.x.pc + 3) )
|
||||
#define jit_modi_i(d, rs, is) jit_modi(jit_divi_i, jit_muli_i, (d), (rs), (is))
|
||||
#define jit_modi_ui(d, rs, is) jit_modi(jit_divi_i, jit_muli_i, (d), (rs), (is))
|
||||
#define jit_modr_i(d, s1, s2) jit_modr(jit_divr_i, jit_mulr_i, (d), (s1), (s2))
|
||||
#define jit_modr_ui(d, s1, s2) jit_modr(jit_divr_i, jit_mulr_i, (d), (s1), (s2))
|
||||
#define jit_movi_i(d, is) SETir((is), (d))
|
||||
#define jit_movr_i(d, rs) MOVrr((rs), (d))
|
||||
#define jit_muli_i(d, rs, is) jit_chk_imm((is), SMULrir((rs), (is), (d)), SMULrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_muli_ui(d, rs, is) jit_chk_imm((is), UMULrir((rs), (is), (d)), UMULrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_mulr_i(d, s1, s2) SMULrrr((s1), (s2), (d))
|
||||
#define jit_mulr_ui(d, s1, s2) UMULrrr((s1), (s2), (d))
|
||||
#define jit_nop() NOP()
|
||||
#define jit_ori_i(d, rs, is) jit_chk_imm((is), ORrir((rs), (is), (d)), ORrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_orr_i(d, s1, s2) ORrrr((s1), (s2), (d))
|
||||
#define jit_patch(delay_pc) jit_patch_ ( ((delay_pc) - 1) )
|
||||
#define jit_popr_i(rs) (LDmr(JIT_SP, 0, (rs)), ADDrir(JIT_SP, 8, JIT_SP))
|
||||
#define jitfp_prepare(numargs, nf, nd) (_jitl.nextarg_put = (numargs))
|
||||
#define jit_prolog(numargs) (SAVErir(JIT_SP, -96, JIT_SP), _jitl.nextarg_get = _Ri(0))
|
||||
#define jit_pushr_i(rs) (STrm((rs), JIT_SP, -8), SUBrir(JIT_SP, 8, JIT_SP))
|
||||
#define jit_pusharg_i(rs) (--_jitl.nextarg_put, MOVrr((rs), _Ro(_jitl.nextarg_put)))
|
||||
#define jit_ret() (RET(), RESTORE())
|
||||
#define jit_retval(rd) MOVrr(_Ro(0), (rd))
|
||||
#define jit_rshi_i(d, rs, is) SRArir((rs), (is), (d))
|
||||
#define jit_rshi_ui(d, rs, is) SRLrir((rs), (is), (d))
|
||||
#define jit_rshr_i(d, r1, r2) SRArrr((r1), (r2), (d))
|
||||
#define jit_rshr_ui(d, r1, r2) SRLrrr((r1), (r2), (d))
|
||||
#define jit_stxi_c(id, rd, rs) jit_chk_imm((id), STBrm((rs), (rd), (id)), STBrx((rs), (rd), JIT_BIG))
|
||||
#define jit_stxi_i(id, rd, rs) jit_chk_imm((id), STWrm((rs), (rd), (id)), STWrx((rs), (rd), JIT_BIG))
|
||||
#define jit_stxi_s(id, rd, rs) jit_chk_imm((id), STHrm((rs), (rd), (id)), STHrx((rs), (rd), JIT_BIG))
|
||||
#define jit_stxr_c(d1, d2, rs) STBrx((rs), (d1), (d2))
|
||||
#define jit_stxr_i(d1, d2, rs) STWrx((rs), (d1), (d2))
|
||||
#define jit_stxr_s(d1, d2, rs) STHrx((rs), (d1), (d2))
|
||||
#define jit_subr_i(d, s1, s2) SUBrrr((s1), (s2), (d))
|
||||
#define jit_subcr_i(d, s1, s2) SUBCCrrr((s1), (s2), (d))
|
||||
#define jit_subxi_i(d, rs, is) jit_chk_imm((is), SUBXCCrir((rs), (is), (d)), SUBXCCrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_subxr_i(d, s1, s2) SUBXCCrrr((s1), (s2), (d))
|
||||
#define jit_xori_i(d, rs, is) jit_chk_imm((is), XORrir((rs), (is), (d)), XORrrr((rs), JIT_BIG, (d)))
|
||||
#define jit_xorr_i(d, s1, s2) XORrrr((s1), (s2), (d))
|
||||
|
||||
#endif /* __lightning_core_h */
|
||||
163
lightning/sparc/fp.h
Normal file
163
lightning/sparc/fp.h
Normal file
|
|
@ -0,0 +1,163 @@
|
|||
/******************************** -*- C -*- ****************************
|
||||
*
|
||||
* Run-time assembler & support macros for the PowerPC math unit
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
|
||||
/***********************************************************************
|
||||
*
|
||||
* Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
|
||||
* Written by Paolo Bonzini.
|
||||
*
|
||||
* This file is part of GNU lightning.
|
||||
*
|
||||
* GNU lightning is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU Lesser General Public License as published
|
||||
* by the Free Software Foundation; either version 2.1, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* GNU lightning is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
||||
* License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with GNU lightning; see the file COPYING.LESSER; if not, write to the
|
||||
* Free Software Foundation, 59 Temple Place - Suite 330, Boston,
|
||||
* MA 02111-1307, USA.
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef __lightning_asm_fp_h
|
||||
#define __lightning_asm_fp_h
|
||||
|
||||
#if 0
|
||||
|
||||
/* dummy for now */
|
||||
|
||||
#define _FP1(RD, RS1, OPF, RS2) _2f((RD), 52, (RS1), (OPF), (RS2))
|
||||
#define _FP2(RD, RS1, OPF, RS2) _2f((RD), 53, (RS1), (OPF), (RS2))
|
||||
|
||||
#define FITODrr(FRS, FRD) _FP1((FRD), 0, 200, (FRS))
|
||||
#define FDTOIrr(FRS, FRD) _FP1((FRD), 0, 210, (FRS))
|
||||
#define FSTODrr(FRS, FRD) _FP1((FRD), 0, 201, (FRS))
|
||||
#define FDTOSrr(FRS, FRD) _FP1((FRD), 0, 198, (FRS))
|
||||
#define FMOVSrr(FRS, FRD) _FP1((FRD), 0, 1, (FRS))
|
||||
#define FNEGSrr(FRS, FRD) _FP1((FRD), 0, 5, (FRS))
|
||||
#define FABSSrr(FRS, FRD) _FP1((FRD), 0, 9, (FRS))
|
||||
#define FSQRTDrr(FRS, FRD) _FP1((FRD), 0, 74, (FRS))
|
||||
|
||||
#define FADDDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 66, (FRS2))
|
||||
#define FSUBDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 70, (FRS2))
|
||||
#define FMULDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 82, (FRS2))
|
||||
#define FDIVDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 86, (FRS2))
|
||||
|
||||
#define FCMPDrr(FRS1, FRS2) _FP2(0, (FRS1), 82, (FRS2))
|
||||
|
||||
#define LDFxr(RS1, RS2, RD) _3 ((RD), 32, (RS1), 0, 0, (RS2))
|
||||
#define LDFmr(RS1, IMM, RD) _3i ((RD), 32, (RS1), 1, (IMM))
|
||||
#define LDDFxr(RS1, RS2, RD) _3 ((RD), 35, (RS1), 0, 0, (RS2))
|
||||
#define LDDFmr(RS1, IMM, RD) _3i ((RD), 35, (RS1), 1, (IMM))
|
||||
#define STFrx(RS, RD1, RD2) _3 ((RS), 36, (RD1), 0, 0, (RD2))
|
||||
#define STFrm(RS, RD1, IMM) _3i ((RS), 36, (RD1), 1, (IMM))
|
||||
#define STDFrx(RS, RD1, RD2) _3 ((RS), 39, (RD1), 0, 0, (RD2))
|
||||
#define STDFrm(RS, RD1, IMM) _3i ((RS), 39, (RD1), 1, (IMM))
|
||||
|
||||
#define FBNi(DISP) _0 (0, 0, 6, (DISP))
|
||||
#define FBN_Ai(DISP) _0 (1, 0, 6, (DISP))
|
||||
#define FBNEi(DISP) _0 (0, 1, 6, (DISP))
|
||||
#define FBNE_Ai(DISP) _0 (1, 1, 6, (DISP))
|
||||
#define FBLGi(DISP) _0 (0, 2, 6, (DISP))
|
||||
#define FBLG_Ai(DISP) _0 (1, 2, 6, (DISP))
|
||||
#define FBULi(DISP) _0 (0, 3, 6, (DISP))
|
||||
#define FBUL_Ai(DISP) _0 (1, 3, 6, (DISP))
|
||||
#define FBLi(DISP) _0 (0, 4, 6, (DISP))
|
||||
#define FBL_Ai(DISP) _0 (1, 4, 6, (DISP))
|
||||
#define FBUGi(DISP) _0 (0, 5, 6, (DISP))
|
||||
#define FBUG_Ai(DISP) _0 (1, 5, 6, (DISP))
|
||||
#define FBGi(DISP) _0 (0, 6, 6, (DISP))
|
||||
#define FBG_Ai(DISP) _0 (1, 6, 6, (DISP))
|
||||
#define FBUi(DISP) _0 (0, 7, 6, (DISP))
|
||||
#define FBU_Ai(DISP) _0 (1, 7, 6, (DISP))
|
||||
#define FBAi(DISP) _0 (0, 8, 6, (DISP))
|
||||
#define FBA_Ai(DISP) _0 (1, 8, 6, (DISP))
|
||||
#define FBEi(DISP) _0 (0, 9, 6, (DISP))
|
||||
#define FBE_Ai(DISP) _0 (1, 9, 6, (DISP))
|
||||
#define FBUEi(DISP) _0 (0, 10, 6, (DISP))
|
||||
#define FBUE_Ai(DISP) _0 (1, 10, 6, (DISP))
|
||||
#define FBGEi(DISP) _0 (0, 11, 6, (DISP))
|
||||
#define FBGE_Ai(DISP) _0 (1, 11, 6, (DISP))
|
||||
#define FBUGEi(DISP) _0 (0, 12, 6, (DISP))
|
||||
#define FBUGE_Ai(DISP) _0 (1, 12, 6, (DISP))
|
||||
#define FBLEi(DISP) _0 (0, 13, 6, (DISP))
|
||||
#define FBLE_Ai(DISP) _0 (1, 13, 6, (DISP))
|
||||
#define FBULEi(DISP) _0 (0, 14, 6, (DISP))
|
||||
#define FBULE_Ai(DISP) _0 (1, 14, 6, (DISP))
|
||||
#define FBOi(DISP) _0 (0, 15, 6, (DISP))
|
||||
#define FBO_Ai(DISP) _0 (1, 15, 6, (DISP))
|
||||
|
||||
#define FSKIPUG() _0d (1, 13, 6, 2) /* fble,a .+8 */
|
||||
#define FSKIPUL() _0d (1, 11, 6, 2) /* fbge,a .+8 */
|
||||
|
||||
#define jit_add_two(reg0) FADDDrrr(30 - (reg0) * 2, 28 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
#define jit_sub_two(reg0) FSUBDrrr(30 - (reg0) * 2, 28 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
#define jit_mul_two(reg0) FMULDrrr(30 - (reg0) * 2, 28 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
#define jit_div_two(reg0) FDIVDrrr(30 - (reg0) * 2, 28 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
|
||||
#define jit_abs(reg0) FABSSrr(30 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
#define jit_neg(reg0) FNEGSrr(30 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
#define jit_sqrt(reg0) FSQRTDrr(30 - (reg0) * 2, 30 - (reg0) * 2)
|
||||
|
||||
#define jit_fpimm(reg0, first, second) \
|
||||
(_1(4), NOP(), _jit_L(first), _jit_L(second), \
|
||||
jit_ldxi_d((reg0), _Ro(7), 8))
|
||||
|
||||
#define jit_ldxi_f(reg0, rs, is) (jit_chk_imm((is), LDFmr((rs), (is), 30 - (reg0) * 2), LDFxr((rs), JIT_BIG, 30 - (reg0) * 2)), FSTODrr(30 - (reg0) * 2, 30 - (reg0) * 2))
|
||||
#define jit_ldxi_d(reg0, rs, is) jit_chk_imm((is), LDDFmr((rs), (is), 30 - (reg0) * 2), LDDFxr((rs), JIT_BIG, 30 - (reg0) * 2))
|
||||
#define jit_ldxr_f(reg0, s1, s2) (LDFxr((s1), (s2), 30 - (reg0) * 2), FSTODrr(30 - (reg0) * 2, 30 - (reg0) * 2))
|
||||
#define jit_ldxr_d(reg0, s1, s2) LDDFxr((s1), (s2), 30 - (reg0) * 2)
|
||||
#define jit_stxi_f(id, rd, reg0) (FDTOSrr(30 - (reg0) * 2, 30 - (reg0) * 2), jit_chk_imm((id), STFrm(30 - (reg0) * 2, (rd), (id)), STFrx(30 - (reg0) * 2, (rd), JIT_BIG)))
|
||||
#define jit_stxi_d(id, rd, reg0) jit_chk_imm((id), STDFrm(30 - (reg0) * 2, (rd), (id)), STDFrx(30 - (reg0) * 2, (rd), JIT_BIG))
|
||||
#define jit_stxr_f(d1, d2, reg0) (FDTOSrr(30 - (reg0) * 2, 30 - (reg0) * 2), STFrx (30 - (reg0) * 2, (d1), (d2)))
|
||||
#define jit_stxr_d(d1, d2, reg0) STDFrx(30 - (reg0) * 2, (d1), (d2))
|
||||
|
||||
|
||||
#define jit_do_round(mode, rd, freg) ( \
|
||||
_1(3), \
|
||||
SETHIir(_HI(mode << 29), JIT_BIG), \
|
||||
NOP(), \
|
||||
STFSRm(_Ro(7), 8), /* store fsr */ \
|
||||
LDmr(_Ro(7), 8, rd), \
|
||||
XORrrr(rd, JIT_BIG, JIT_BIG), /* adjust mode */ \
|
||||
STrm(JIT_BIG, _Ro(7), 8), \
|
||||
LDFSRm(_Ro(7), 8), /* load fsr */ \
|
||||
FDTOIrr(freg, freg), /* truncate */ \
|
||||
STrm(rd, _Ro(7), 8), /* load old fsr */ \
|
||||
LDFSRm(_Ro(7), 8), \
|
||||
STFrm(freg, _Ro(7), 8), /* store truncated value */ \
|
||||
LDmr(_Ro(7), 8, rd)) /* load it into rd */
|
||||
|
||||
|
||||
/* call delay slot data ,--- call lands here */
|
||||
#define jit_exti_d(reg0, rs) (_1(3), NOP(), NOP(), STrm((rs), _Ro(7), 8), LDFmr(_Ro(7), 8, 30 - (reg0) * 2), FITODrr(30 - (reg0) * 2, 30 - (reg0) * 2))
|
||||
#define jit_round(rd, reg0) (_1(3), FDTOIrr(30 - (reg0) * 2, 30 - (reg0) * 2), NOP(), STFrm(30 - (reg0) * 2, _Ro(7), 8), LDmr(_Ro(7), 8, (rd)))
|
||||
#define jit_floor(rd, reg0) jit_do_round(3, (rd), (30 - (reg0) * 2))
|
||||
#define jit_ceil(rd, reg0) jit_do_round(2, (rd), (30 - (reg0) * 2))
|
||||
#define jit_trunc(rd, reg0) jit_do_round(1, (rd), (30 - (reg0) * 2))
|
||||
|
||||
static double jit_zero = 0.0;
|
||||
|
||||
#define jit_cmp(le, ge, reg0) (SETHIir(_HI(_jit_UL(&jit_zero)), (le)), \
|
||||
LDDFmr((le), _LO(_jit_UL(&jit_zero)), 28 - (reg0) * 2), \
|
||||
FCMPDrr(30 - (reg0) * 2, 28 - (reg0) * 2), \
|
||||
MOVir(0, (le)), MOVir(0, (ge)), \
|
||||
FSKIPUL(), MOVir(1, (ge)), \
|
||||
FSKIPUG(), MOVir(1, (le)))
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __lightning_asm_fp_h */
|
||||
65
lightning/sparc/funcs.h
Normal file
65
lightning/sparc/funcs.h
Normal file
|
|
@ -0,0 +1,65 @@
|
|||
/******************************** -*- C -*- ****************************
|
||||
*
|
||||
* Platform-independent layer inline functions (Sparc)
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
|
||||
/***********************************************************************
|
||||
*
|
||||
* Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
|
||||
* Written by Paolo Bonzini.
|
||||
*
|
||||
* This file is part of GNU lightning.
|
||||
*
|
||||
* GNU lightning is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU Lesser General Public License as published
|
||||
* by the Free Software Foundation; either version 2.1, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* GNU lightning is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
||||
* License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with GNU lightning; see the file COPYING.LESSER; if not, write to the
|
||||
* Free Software Foundation, 59 Temple Place - Suite 330, Boston,
|
||||
* MA 02111-1307, USA.
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
|
||||
|
||||
#ifndef __lightning_funcs_h
|
||||
#define __lightning_funcs_h
|
||||
|
||||
#if !defined(__GNUC__) && !defined(__GNUG__)
|
||||
#error Go get GNU C, I do not know how to flush the cache
|
||||
#error with this compiler.
|
||||
#else
|
||||
/* Why doesn't this compile?!?
|
||||
* static void
|
||||
* jit_flush_code(start, end)
|
||||
* void *start;
|
||||
* void *end;
|
||||
*/
|
||||
|
||||
static void
|
||||
jit_flush_code(void* start, void* end)
|
||||
{
|
||||
#ifndef LIGHTNING_CROSS
|
||||
register char *dest;
|
||||
|
||||
__asm__ __volatile__ ("stbar");
|
||||
for (dest = (char *)start; dest <= (char *)end; dest += 4) {
|
||||
__asm__ __volatile__ ("flush %0"::"r"(dest));
|
||||
}
|
||||
|
||||
/* [SPARC Architecture Manual v8, page 139, implementation note #5] */
|
||||
__asm__ __volatile__ ("nop; nop; nop; nop; nop");
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __lightning_core_h */
|
||||
Loading…
Add table
Add a link
Reference in a new issue