Add assertion to check for register allocation leaks

* lib/jit_aarch64.c, lib/jit_alpha.c, lib/jit_arm.c,
	lib/jit_hppa.c, lib/jit_ia64.c, lib/jit_mips.c, lib/jit_ppc.c,
	lib/jit_s390x.c, lib/jit_sparc.c, lib/jit_x86.c: Add an
	assertion to all code generation "drivers" to ensure
	_jitc->regarg is empty or in an expected state, after
	translation of a lightning instruction to native code.
	This change was a brute force test to find out other cases
	of a temporary not being release (like was happening with
	_bmsi and _bmci on x86), but no other case was found,
	after running make check, with assertions enabled, on all
	backends.

ChangeLog

@@ -1,3 +1,17 @@
+2014-10-26 Paulo Andrade <pcpa@gnu.org>
+
+	* lib/jit_aarch64.c, lib/jit_alpha.c, lib/jit_arm.c,
+	lib/jit_hppa.c, lib/jit_ia64.c, lib/jit_mips.c, lib/jit_ppc.c,
+	lib/jit_s390x.c, lib/jit_sparc.c, lib/jit_x86.c: Add an
+	assertion to all code generation "drivers" to ensure
+	_jitc->regarg is empty or in an expected state, after
+	translation of a lightning instruction to native code.
+	This change was a brute force test to find out other cases
+	of a temporary not being release (like was happening with
+	_bmsi and _bmci on x86), but no other case was found,
+	after running make check, with assertions enabled, on all
+	backends.
+
 2014-10-26 Paulo Andrade <pcpa@gnu.org>
 
 	* lib/jit_x86-cpu.c: Correct a register allocation leak in

lib/jit_aarch64.c

@@ -1150,6 +1150,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_alpha.c

@@ -1191,6 +1191,7 @@ _emit_code(jit_state_t *_jit)
 	    }
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == jit_carry == _NOREG ? 0 : (1 << jit_carry));
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_arm.c

@@ -1526,6 +1526,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
 

lib/jit_hppa.c

@@ -1139,6 +1139,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_ia64.c

@@ -1356,6 +1356,12 @@ _emit_code(jit_state_t *_jit)
 	sync();
 #endif
 	jit_regarg_clr(node, value);
+	if (jit_carry == _NOREG)
+	    assert(jit_regset_cmp_ui(&_jitc->regarg, 0) == 0);
+	else {
+	    assert(jit_regset_scan1(&_jitc->regarg, 0) == jit_carry);
+	    assert(jit_regset_scan1(&_jitc->regarg, jit_carry + 1) == ULONG_MAX);
+	}
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_mips.c

@@ -1467,6 +1467,7 @@ _emit_code(jit_state_t *_jit)
 	    }
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == jit_carry == _NOREG ? 0 : (1 << jit_carry));
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_ppc.c

@@ -1351,6 +1351,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_s390x.c

@@ -1135,6 +1135,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_sparc.c

@@ -1132,6 +1132,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
     }

lib/jit_x86.c

@@ -1765,6 +1765,7 @@ _emit_code(jit_state_t *_jit)
 		abort();
 	}
 	jit_regarg_clr(node, value);
+	assert(_jitc->regarg == 0);
 	/* update register live state */
 	jit_reglive(node);
     }