mirror/guile
mirror/guile
1
Fork 0
mirror of https://git.savannah.gnu.org/git/guile.git synced 2025-06-27 21:40:34 +02:00
Code Activity

Make it simpler to add support for more than 64 registers.

Browse source 
* include/lightning/jit_private.h, lib/jit_arm.c,
	lib/jit_mips-cpu.c, lib/jit_mips.c, lib/jit_ppc-cpu.c,
	lib/jit_ppc.c, lib/jit_print.c, lib/jit_sparc-cpu.c,
	lib/jit_sparc.c, lib/jit_x86-cpu.c, lib/jit_x86.c,
	lib/lightning.c: Change all jit_regset macros to take
	a pointer argument, to avoid structure copies when
	adding a port to an architecture with more than 64
	registers.
This commit is contained in:
pcpa 2013-04-10 15:07:01 -03:00
parent 066db584c9
commit 7bdd22bd99
13 changed files with 310 additions and 309 deletions
Download patch file Download diff file Expand all files Collapse all files

51
include/lightning/jit_private.h
View file

@ -78,9 +78,9 @@
#define jit_size(vector) (sizeof(vector) / sizeof((vector)[0]))
#define jit_reg_free_p(regno) \
(!jit_regset_tstbit(_jitc->reglive, regno) && \
!jit_regset_tstbit(_jitc->regarg, regno) && \
!jit_regset_tstbit(_jitc->regsav, regno))
(!jit_regset_tstbit(&_jitc->reglive, regno) && \
!jit_regset_tstbit(&_jitc->regarg, regno) && \
!jit_regset_tstbit(&_jitc->regsav, regno))
/*
* Private jit_class bitmasks
@ -121,38 +121,27 @@
#define jit_cc_a2_flt 0x00200000 /* arg2 is immediate float */
#define jit_cc_a2_dbl 0x00400000 /* arg2 is immediate double */
#define jit_regset_com(u, v) ((u) = ~(v))
#define jit_regset_and(u, v, w) ((u) = (v) & (w))
#define jit_regset_ior(u, v, w) ((u) = (v) | (w))
#define jit_regset_xor(u, v, w) ((u) = (v) ^ (w))
#define jit_regset_set(u, v) ((u) = (v))
#define jit_regset_cmp_ui(u, v) ((u) != (v))
#define jit_regset_set_ui(u, v) ((u) = (v))
#define jit_regset_set_p(set) (set)
#if DEBUG
# define jit_regset_clrbit(set, bit) \
(assert(bit >= 0 && bit < (sizeof(jit_regset_t) << 3)), \
(set) &= ~(1LL << (bit)))
# define jit_regset_setbit(set, bit) \
(assert(bit >= 0 && bit < (sizeof(jit_regset_t) << 3)), \
(set) |= 1LL << (bit))
# define jit_regset_tstbit(set, bit) \
(assert(bit >= 0 && bit < (sizeof(jit_regset_t) << 3)), \
(set) & (1LL << (bit)))
#else
# define jit_regset_clrbit(set, bit) ((set) &= ~(1LL << (bit)))
# define jit_regset_setbit(set, bit) ((set) |= 1LL << (bit))
# define jit_regset_tstbit(set, bit) ((set) & (1LL << (bit)))
#endif
#define jit_regset_new(set) ((set) = 0)
#define jit_regset_del(set) ((set) = 0)
#define jit_regset_com(u, v) (*(u) = ~*(v))
#define jit_regset_and(u, v, w) (*(u) = *(v) & *(w))
#define jit_regset_ior(u, v, w) (*(u) = *(v) | *(w))
#define jit_regset_xor(u, v, w) (*(u) = *(v) ^ *(w))
#define jit_regset_set(u, v) (*(u) = *(v))
#define jit_regset_set_mask(u, v) (*(u) = (1LL << (v)) - 1)
#define jit_regset_cmp_ui(u, v) (*(u) != (v))
#define jit_regset_set_ui(u, v) (*(u) = (v))
#define jit_regset_set_p(set) (*set)
#define jit_regset_clrbit(set, bit) (*(set) &= ~(1LL << (bit)))
#define jit_regset_setbit(set, bit) (*(set) |= 1LL << (bit))
#define jit_regset_tstbit(set, bit) (*(set) & (1LL << (bit)))
#define jit_regset_new(set) (*(set) = 0)
#define jit_regset_del(set) (*(set) = 0)
extern unsigned long
jit_regset_scan1(jit_regset_t, jit_int32_t);
jit_regset_scan1(jit_regset_t*, jit_int32_t);
#define jit_reglive_setup() \
do { \
jit_regset_set_ui(_jitc->reglive, 0); \
jit_regset_set_ui(_jitc->regmask, 0); \
jit_regset_set_ui(&_jitc->reglive, 0); \
jit_regset_set_ui(&_jitc->regmask, 0); \
} while (0)
/*