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Change _ASM_SAFETY register width check to accept valid alternate values.
The checks were moved from i386/asm.h to i386/asm-{32,64}.h, as well
as some macros from core-{32,64}.h. Now it checks if the value is in the
range of a valid register, and in the proper register class, what should
prevent the common mistake of calling a jit*r_x macro passing an immediate
as argument.
Now it pass lightning's make check in i386/x86_64, as well as all test
cases in http://code.google.com/p/exl/source/browse/trunk/check/lightning
when compiled with -D_ASM_SAFETY.
This commit is contained in:
PCPA
Paolo Bonzini
parent
d4a2a1ba07
commit
8665ce16da
6 changed files with 103 additions and 36 deletions
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@ -543,8 +543,10 @@ typedef union jit_code {
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#define jit_extr_i_ul(d, rs) jit_movr_i(d, rs)
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/* Unary */
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#ifndef jit_movi_l
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#define jit_movi_l(d, rs) jit_movi_i((d), (rs))
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#define jit_movr_l(d, rs) jit_movr_i((d), (rs))
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#endif
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/* Stack */
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#define jit_pushr_l(rs) jit_pushr_i(rs)
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@ -43,11 +43,59 @@
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* + sr/sm = a star preceding a register or memory
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*/
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#if defined(_ASM_SAFETY)
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#define _r1(R) ( ((R) & ~3) == _AL || ((R) & ~3) == _AH ? _rN(R) : JITFAIL( "8-bit register required"))
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#if !_ASM_SAFETY
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# define _r1(R) _rN(R)
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# define _r2(R) _rN(R)
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# define _r4(R) _rN(R)
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# define _r8(R) _rN(R)
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# define _rM(R) _rN(R)
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# define _rX(R) _rN(R)
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#else
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/* _r1() used to check only for _AL and _AH but there is
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* usage of _CL and _DL when _*AX is already an operand */
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# define _r1(R) \
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/* Valid 32 bit register? */ \
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((!((R) & ~0x77) \
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/* 32, 16 or 8 bit register? */ \
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&& (((_rC(R) == 0x40 || _rC(R) == 0x30 || _rC(R) == 0x10) \
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/* Yes. Register is _AL, _CL or _DL? */ \
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&& ( (_rN(R) | 0x10) == _AL \
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|| (_rN(R) | 0x10) == _CL \
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|| (_rN(R) | 0x10) == _DL)) \
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/* No. Register is _AH? */ \
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|| ((_rC(R) == 0x20 && (_rN(R) | 0x20) == _AH)))) \
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? _rN(R) : JITFAIL("bad 8-bit register " #R))
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# define _r2(R) \
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/* Valid 32 bit register? */ \
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((!((R) & ~0x77) \
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/* 32, 16 or 8 bit register? */ \
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&& (_rC(R) == 0x40 || _rC(R) == 0x30 || _rC(R) == 0x10)) \
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? _rN(R) : JITFAIL("bad 16-bit register " #R))
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# define _r4(R) \
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/* Valid 32 bit register? */ \
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((!((R) & ~0x77) \
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/* 32, 16 or 8 bit register? */ \
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&& (_rC(R) == 0x40 || _rC(R) == 0x30 || _rC(R) == 0x10)) \
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? _rN(R) : JITFAIL("bad 32-bit register " #R))
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# define _r8(R) \
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JITFAIL("bad 64-bit register " #R)
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# define _rM(R) \
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/* Valid MMX register? */ \
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((!((R) & ~0x67) && _rC(R) == 0x60) \
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? _rN(R) : JITFAIL("bad MMX register " #R))
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# define _rX(R) \
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/* Valid SSE register? */ \
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((!((R) & ~0x77) && _rC(R) == 0x70) \
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? _rN(R) : JITFAIL("bad SSE register " #R))
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#endif
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#define _rA(R) _r4(R)
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#define _rA(R) _r4(R)
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#define jit_check8(rs) ((_rN(rs) | _AL) == _AL)
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#define jit_reg8(rs) \
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((jit_reg16(rs) == _SI || jit_reg16(rs) == _DI) \
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? _AL : (_rN(rs) | _AL))
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#define jit_reg16(rs) (_rN(rs) | _AX)
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/* Use RIP-addressing in 64-bit mode, if possible */
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#define _r_X( R, D,B,I,S,O) (_r0P(I) ? (_r0P(B) ? _r_D (R,D ) : \
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@ -43,8 +43,57 @@
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* + sr/sm = a star preceding a register or memory
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*/
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#if !_ASM_SAFETY
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# define _r1(R) _rN(R)
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# define _r2(R) _rN(R)
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# define _r4(R) _rN(R)
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# define _r8(R) _rN(R)
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# define _rM(R) _rN(R)
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# define _rX(R) _rN(R)
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#else
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# define _r1(R) \
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/* Valid 64 bit register? */ \
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((!((R) & ~0xff) \
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/* 64, 32, 16 or 8 bit register? */ \
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&& (_rC(R) == 0x50 || _rC(R) == 0x40 \
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|| _rC(R) == 0x30 || _rC(R) == 0x10)) \
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? _rN(R) : JITFAIL("bad 8-bit register " #R))
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# define _r2(R) \
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/* Valid 64 bit register? */ \
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((!((R) & ~0xff) \
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/* 64, 32, 16 or 8 bit register? */ \
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&& (_rC(R) == 0x50 || _rC(R) == 0x40 \
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|| _rC(R) == 0x30 || _rC(R) == 0x10)) \
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? _rN(R) : JITFAIL("bad 16-bit register " #R))
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# define _r4(R) \
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/* Valid 64 bit register? */ \
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((!((R) & ~0xff) \
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/* 64, 32, 16 or 8 bit register? */ \
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&& (_rC(R) == 0x50 || _rC(R) == 0x40 \
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|| _rC(R) == 0x30 || _rC(R) == 0x10)) \
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? _rN(R) : JITFAIL("bad 32-bit register " #R))
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# define _r8(R) \
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/* Valid 64 bit register? */ \
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((!((R) & ~0xff) \
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/* 64, 32, 16 or 8 bit register? */ \
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&& (_rC(R) == 0x50 || _rC(R) == 0x40 \
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|| _rC(R) == 0x30 || _rC(R) == 0x10)) \
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? _rN(R) : JITFAIL("bad 64-bit register " #R))
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# define _rM(R) \
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/* Valid MMX* register? */ \
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((!((R) & ~0x6f) && _rC(R) == 0x60) \
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? _rN(R) : JITFAIL("bad MMX register " #R))
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# define _rX(R) \
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/* Valid SSE2 register? */ \
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((!((R) & ~0x7f) && _rC(R) == 0x70) \
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? _rN(R) : JITFAIL("bad SSE2 register " #R))
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#endif
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#define _rA(R) _r8(R)
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#define _rA(R) _r8(R)
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#define jit_check8(rs) 1
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#define jit_reg8(rs) (_rR(rs) | _AL)
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#define jit_reg16(rs) (_rR(rs) | _AX)
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/* Use RIP-addressing in 64-bit mode, if possible */
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#if 0
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@ -125,16 +174,6 @@
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#define _R15 0x5F
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#define _RIP -2
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#if defined(_ASM_SAFETY)
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#define _r1(R) ( ((unsigned) _rC((R) - 16)) < (0x30 - 16) ? _rN(R) : JITFAIL( "8-bit register required"))
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#if 0
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#define _r8(R) ( (_rC(R) == 0x50) ? _rN(R) : JITFAIL("64-bit register required"))
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#else
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#define _r8(R) ( (_rC(R) == 0x50) ? _rN(R) : _r4(R))
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#endif
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#endif
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#define _r1e8lP(R) ((int)(R) >= _SPL && (int)(R) <= _DIL)
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#define DECWr(RD) (_d16(), _REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b001 ,_r2(RD) ))
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@ -129,20 +129,6 @@ typedef _uc jit_insn;
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#define _rN(R) ((R) & 0x07)
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#define _rXP(R) ((R) > 0 && _rR(R) > 7)
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#if !defined(_ASM_SAFETY)
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#define _r1(R) _rN(R)
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#define _r2(R) _rN(R)
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#define _r4(R) _rN(R)
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#define _r8(R) _rN(R)
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#define _rM(R) _rN(R)
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#define _rX(R) _rN(R)
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#else
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#define _r2(R) ( (_rC(R) == 0x30) ? _rN(R) : JITFAIL("16-bit register required"))
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#define _r4(R) ( (_rC(R) == 0x40) ? _rN(R) : JITFAIL("32-bit register required"))
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#define _rM(R) ( (_rC(R) == 0x60) ? _rN(R) : JITFAIL("MMX register required"))
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#define _rX(R) ( (_rC(R) == 0x70) ? _rN(R) : JITFAIL("SSE register required"))
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#endif
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#define _rbpP(R) (_rR(R) == _rR(_EBP))
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#define _rspP(R) (_rR(R) == _rR(_ESP))
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#define _rbp13P(R) (_rN(R) == _rN(_EBP))
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@ -122,11 +122,6 @@ struct jit_local_state {
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#define jit_patch_at(jump_pc,v) jit_patch_long_at(jump_pc, v)
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/* Memory */
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#define jit_check8(rs) ( (rs) <= _EBX )
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#define jit_reg8(rs) ( ((rs) == _SI || (rs) == _DI) ? _AL : (_rN(rs) | _AL ))
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#define jit_reg16(rs) ( _rN(rs) | _AX )
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#define jit_replace(s, rep, op) \
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(jit_pushr_i(rep), \
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MOVLrr((s), (rep)), \
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@ -241,9 +241,6 @@ static int jit_arg_reg_order[] = { _EDI, _ESI, _EDX, _ECX, _R8D, _R9D };
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/* Memory */
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/* Used to implement ldc, stc, ... We have SIL and friends which simplify it all. */
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#define jit_check8(rs) 1
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#define jit_reg8(rs) (_rR(rs) | _AL )
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#define jit_reg16(rs) (_rR(rs) | _AX )
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#define jit_movbrm(rs, dd, db, di, ds) MOVBrm(jit_reg8(rs), dd, db, di, ds)
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#define jit_ldr_c(d, rs) MOVSBQmr(0, (rs), 0, 0, (d))
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