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(FETCH_STORE): New macro.
(SCM_LOCK_VAL, SCM_UNLOCK_VAL): New constants. (SCM_LOCK_ARB, SCM_UNLOCK_ARB): Remove, effectively absorbed into scm_try_arbiter and scm_release_arbiter. (scm_try_arbiter, scm_release_arbiter): Use FETCH_STORE to get xchg for speed on i386, otherwise using mutex.
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1 changed files with 65 additions and 42 deletions
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@ -26,21 +26,61 @@
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#include "libguile/arbiters.h"
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#include "libguile/arbiters.h"
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/* ENHANCE-ME: If the cpu has an atomic test-and-set instruction it could be
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/* FETCH_STORE sets "fet" to the value fetched from "mem" and then stores
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used instead of a mutex in try-arbiter and release-arbiter.
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"sto" there. The fetch and store are done atomically, so once the fetch
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has been done no other thread or processor can fetch from there before
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the store is done.
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The operands are scm_t_bits, fet and sto are plain variables, mem is a
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memory location (ie. an lvalue).
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ENHANCE-ME: Add more cpu-specifics. glibc atomicity.h has some of the
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sort of thing required. FETCH_STORE could become some sort of
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compare-and-store if that better suited what various cpus do. */
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#if defined (__GNUC__) && defined (i386) && SIZEOF_SCM_T_BITS == 4
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/* This is for i386 with the normal 32-bit scm_t_bits. The xchg instruction
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is atomic on a single processor, and it automatically asserts the "lock"
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bus signal so it's atomic on a multi-processor (no need for the lock
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prefix on the instruction).
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The mem operand is read-write but "+" is not used since old gcc
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(eg. 2.7.2) doesn't support that. "1" for the mem input doesn't work
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(eg. gcc 3.3) when mem is a pointer dereference like current usage below.
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Having mem as a plain input should be ok though. It tells gcc the value
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is live, but as an "m" gcc won't fetch it itself (though that would be
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harmless). */
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#define FETCH_STORE(fet,mem,sto) \
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do { \
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asm ("xchg %0, %1" \
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: "=r" (fet), "=m" (mem) \
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: "0" (sto), "m" (mem)); \
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} while (0)
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#endif
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#ifndef FETCH_STORE
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/* This is a generic version, with a mutex to ensure the operation is
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atomic. Unfortunately this approach probably makes arbiters no faster
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than mutexes (though still using less memory of course), so some
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CPU-specifics are highly desirable. */
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#define FETCH_STORE(fet,mem,sto) \
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do { \
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scm_mutex_lock (&scm_i_misc_mutex); \
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(fet) = (mem); \
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(mem) = (sto); \
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scm_mutex_unlock (&scm_i_misc_mutex); \
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} while (0)
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#endif
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For the i386 family, cmpxchg would suit but it's only available on 80486
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and higher so that would have to be checked, perhaps at run-time when
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setting up the definitions of the scheme procedures, or at compile time
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if we interpret a host cpu type like "i686" to mean not less than that
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chip. */
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static scm_t_bits scm_tc16_arbiter;
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static scm_t_bits scm_tc16_arbiter;
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#define SCM_LOCK_VAL (scm_tc16_arbiter | (1L << 16))
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#define SCM_UNLOCK_VAL scm_tc16_arbiter
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#define SCM_ARB_LOCKED(arb) ((SCM_CELL_WORD_0 (arb)) & (1L << 16))
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#define SCM_ARB_LOCKED(arb) ((SCM_CELL_WORD_0 (arb)) & (1L << 16))
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#define SCM_LOCK_ARB(arb) (SCM_SET_CELL_WORD_0 ((arb), scm_tc16_arbiter | (1L << 16)));
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#define SCM_UNLOCK_ARB(arb) (SCM_SET_CELL_WORD_0 ((arb), scm_tc16_arbiter));
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static int
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static int
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arbiter_print (SCM exp, SCM port, scm_print_state *pstate)
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arbiter_print (SCM exp, SCM port, scm_print_state *pstate)
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@ -64,10 +104,10 @@ SCM_DEFINE (scm_make_arbiter, "make-arbiter", 1, 0, 0,
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#undef FUNC_NAME
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#undef FUNC_NAME
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/* The mutex here is so two threads can't both see the arbiter unlocked and
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/* The atomic FETCH_STORE here is so two threads can't both see the arbiter
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both proceed to lock and return #t. The arbiter itself wouldn't be
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unlocked and return #t. The arbiter itself wouldn't be corrupted by
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corrupted by this, but two threads both getting #t would be entirely
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this, but two threads both getting #t would be contrary to the intended
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contrary to the intended semantics. */
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semantics. */
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SCM_DEFINE (scm_try_arbiter, "try-arbiter", 1, 0, 0,
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SCM_DEFINE (scm_try_arbiter, "try-arbiter", 1, 0, 0,
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(SCM arb),
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(SCM arb),
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@ -77,27 +117,19 @@ SCM_DEFINE (scm_try_arbiter, "try-arbiter", 1, 0, 0,
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#define FUNC_NAME s_scm_try_arbiter
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#define FUNC_NAME s_scm_try_arbiter
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{
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{
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SCM_VALIDATE_SMOB (1, arb, arbiter);
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SCM_VALIDATE_SMOB (1, arb, arbiter);
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scm_t_bits old;
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scm_mutex_lock (&scm_i_misc_mutex);
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FETCH_STORE (old, * (scm_t_bits *) SCM_CELL_OBJECT_LOC(arb,0), SCM_LOCK_VAL);
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if (SCM_ARB_LOCKED(arb))
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return scm_from_bool (old == SCM_UNLOCK_VAL);
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arb = SCM_BOOL_F;
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else
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{
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SCM_LOCK_ARB(arb);
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arb = SCM_BOOL_T;
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}
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scm_mutex_unlock (&scm_i_misc_mutex);
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return arb;
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}
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}
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#undef FUNC_NAME
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#undef FUNC_NAME
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/* The mutex here is so two threads can't both see the arbiter locked and
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/* The atomic FETCH_STORE here is so two threads can't both see the arbiter
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both proceed to unlock and return #t. The arbiter itself wouldn't be
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locked and return #t. The arbiter itself wouldn't be corrupted by this,
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corrupted by this, but we don't want two threads both thinking they were
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but we don't want two threads both thinking they were the unlocker. The
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the unlocker. The intended usage is for the code which locked to be
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intended usage is for the code which locked to be responsible for
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responsible for unlocking, but we guarantee the return value even if
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unlocking, but we guarantee the return value even if multiple threads
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multiple threads compete. */
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compete. */
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SCM_DEFINE (scm_release_arbiter, "release-arbiter", 1, 0, 0,
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SCM_DEFINE (scm_release_arbiter, "release-arbiter", 1, 0, 0,
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(SCM arb),
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(SCM arb),
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@ -110,19 +142,10 @@ SCM_DEFINE (scm_release_arbiter, "release-arbiter", 1, 0, 0,
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"release it.")
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"release it.")
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#define FUNC_NAME s_scm_release_arbiter
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#define FUNC_NAME s_scm_release_arbiter
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{
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{
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SCM ret;
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SCM_VALIDATE_SMOB (1, arb, arbiter);
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SCM_VALIDATE_SMOB (1, arb, arbiter);
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scm_t_bits old;
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scm_mutex_lock (&scm_i_misc_mutex);
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FETCH_STORE (old, *(scm_t_bits*)SCM_CELL_OBJECT_LOC(arb,0), SCM_UNLOCK_VAL);
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if (!SCM_ARB_LOCKED(arb))
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return scm_from_bool (old == SCM_LOCK_VAL);
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ret = SCM_BOOL_F;
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else
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{
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SCM_UNLOCK_ARB (arb);
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ret = SCM_BOOL_T;
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}
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scm_mutex_unlock (&scm_i_misc_mutex);
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return ret;
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}
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}
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#undef FUNC_NAME
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#undef FUNC_NAME
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