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Implement the jit_rsb* interface.

* check/alu_rsb.ok, check/alu_rsb.tst: New files implementing
	tests for jit_rsb*.

	* check/Makefile.am, check/lightning.c, include/lightning.h,
	lib/jit_aarch64-cpu.c, lib/jit_aarch64-fpu.c, lib/jit_aarch64-sz.c,
	lib/jit_aarch64.c, lib/jit_alpha-cpu.c, lib/jit_alpha-fpu.c,
	lib/jit_alpha-sz.c, lib/jit_alpha.c, lib/jit_arm-cpu.c,
	lib/jit_arm-swf.c, lib/jit_arm-sz.c, lib/jit_arm-vfp.c,
	lib/jit_arm.c, lib/jit_hppa-cpu.c, lib/jit_hppa-fpu.c,
	lib/jit_hppa-sz.c, lib/jit_hppa.c, lib/jit_ia64-cpu.c,
	lib/jit_ia64-fpu.c, lib/jit_ia64-sz.c, lib/jit_ia64.c,
	lib/jit_mips-cpu.c, lib/jit_mips-fpu.c, lib/jit_mips-sz.c,
	lib/jit_mips.c, lib/jit_names.c, lib/jit_ppc-cpu.c,
	lib/jit_ppc-fpu.c, lib/jit_ppc-sz.c, lib/jit_ppc.c,
	lib/jit_s390x-cpu.c, lib/jit_s390x-fpu.c, lib/jit_s390x-sz.c,
	lib/jit_s390x.c, lib/jit_sparc-cpu.c, lib/jit_sparc-fpu.c,
	lib/jit_sparc-sz.c, lib/jit_sparc.c, lib/jit_x86-cpu.c,
	lib/jit_x86-sse.c, lib/jit_x86-sz.c, lib/jit_x86-x87.c,
	lib/jit_x86.c, lib/lightning.c: Implement jit_rsb*. This
	was a missing lightning 1.x interface, that on most
	backends is synthesized, but on a few backends (hppa and ia64),
	it can generate better code as on those there is, or the
	only instruction with an immediate is in "rsb" format
	(left operand).
This commit is contained in:
pcpa 2014-10-18 11:31:18 -03:00
parent 624cf33d08
commit 960280decd
50 changed files with 494 additions and 44 deletions

View file

@ -60,6 +60,7 @@ EXTRA_DIST = \
alux_add.tst alux_add.ok \
alu_sub.tst alu_sub.ok \
alux_sub.tst alux_sub.ok \
alu_rsb.tst alu_rsb.ok \
alu_mul.tst alu_mul.ok \
alu_div.tst alu_div.ok \
alu_rem.tst alu_rem.ok \
@ -99,7 +100,7 @@ base_TESTS = \
ldstr-c ldstxr-c ldstxi-c \
cvt branch \
alu_add alux_add \
alu_sub alux_sub \
alu_sub alux_sub alu_rsb \
alu_mul alu_div alu_rem \
alu_and alu_or alu_xor \
alu_lsh alu_rsh \
@ -126,7 +127,7 @@ x87_TESTS = \
ldstr-c.x87 ldstxr-c.x87 ldstxi-c.x87 \
cvt.x87 branch.x87 \
alu_add.x87 alux_add.x87 \
alu_sub.x87 alux_sub.x87 \
alu_sub.x87 alux_sub.x87 alu_rsb.x87 \
alu_mul.x87 alu_div.x87 alu_rem.x87 \
alu_and.x87 alu_or.x87 alu_xor.x87 \
alu_lsh.x87 alu_rsh.x87 \
@ -148,7 +149,7 @@ x87_nodata_TESTS = \
ldstr-c.x87.nodata ldstxr-c.x87.nodata ldstxi-c.x87.nodata \
cvt.x87.nodata branch.x87.nodata \
alu_add.x87.nodata alux_add.x87.nodata \
alu_sub.x87.nodata alux_sub.x87.nodata \
alu_sub.x87.nodata alux_sub.x87.nodata alu_rsb.x87.nodata \
alu_mul.x87.nodata alu_div.x87.nodata alu_rem.x87.nodata \
alu_and.x87.nodata alu_or.x87.nodata alu_xor.x87.nodata \
alu_lsh.x87.nodata alu_rsh.x87.nodata \
@ -172,7 +173,7 @@ arm_TESTS = \
ldstr-c.arm ldstxr-c.arm ldstxi-c.arm \
cvt.arm branch.arm \
alu_add.arm alux_add.arm \
alu_sub.arm alux_sub.arm \
alu_sub.arm alux_sub.arm alu_rsb.arm \
alu_mul.arm alu_div.arm alu_rem.arm \
alu_and.arm alu_or.arm alu_xor.arm \
alu_lsh.arm alu_rsh.arm \
@ -196,7 +197,7 @@ swf_TESTS = \
ldstr-c.swf ldstxr-c.swf ldstxi-c.swf \
cvt.swf branch.swf \
alu_add.swf alux_add.swf \
alu_sub.swf alux_sub.swf \
alu_sub.swf alux_sub.swf alu_rsb.swf \
alu_mul.swf alu_div.swf alu_rem.swf \
alu_and.swf alu_or.swf alu_xor.swf \
alu_lsh.swf alu_rsh.swf \
@ -220,7 +221,7 @@ nodata_TESTS = \
ldstr-c.nodata ldstxr-c.nodata ldstxi-c.nodata \
cvt.nodata branch.nodata \
alu_add.nodata alux_add.nodata \
alu_sub.nodata alux_sub.nodata \
alu_sub.nodata alux_sub.nodata alu_rsb.nodata \
alu_mul.nodata alu_div.nodata alu_rem.nodata \
alu_and.nodata alu_or.nodata alu_xor.nodata \
alu_lsh.nodata alu_rsh.nodata \

1
check/alu_rsb.ok Normal file
View file

@ -0,0 +1 @@
ok

49
check/alu_rsb.tst Normal file
View file

@ -0,0 +1,49 @@
#include "alu.inc"
.code
prolog
#define RSB(N, I0, I1, V) ALU(N, , rsb, I0, I1, V)
RSB(0, 1, 0x7fffffff, 0x7ffffffe)
RSB(2, 1, 0x80000000, 0x7fffffff)
RSB(3, 0x7fffffff, 0x80000000, 1)
RSB(4, 0xffffffff, 0xffffffff, 0)
RSB(5, 0x7fffffff, 0xffffffff, 0x80000000)
RSB(6, 0, 0x7fffffff, 0x7fffffff)
#if __WORDSIZE == 32
RSB(7, 0x7fffffff, 1, 0x80000002)
RSB(8, 0x80000000, 1, 0x80000001)
RSB(9, 0x80000000, 0x7fffffff, 0xffffffff)
RSB(10, 0xffffffff, 0x7fffffff, 0x80000000)
RSB(11, 0x7fffffff, 0, 0x80000001)
#else
RSB(7, 0x7fffffff, 1, 0xffffffff80000002)
RSB(8, 0xffffffff80000000, 1, 0x80000001)
RSB(9, 0xffffffff80000000, 0x7fffffff, 0xffffffff)
RSB(10, 0xffffffffffffffff, 0xffffffff7fffffff, 0xffffffff80000000)
RSB(11, 0x7fffffff, 0, 0xffffffff80000001)
RSB(12, 1, 0x7fffffffffffffff, 0x7ffffffffffffffe)
RSB(13, 0x7fffffffffffffff, 1, 0x8000000000000002)
RSB(14, 1, 0x8000000000000000, 0x7fffffffffffffff)
RSB(15, 0x8000000000000000, 1, 0x8000000000000001)
RSB(16, 0x8000000000000000, 0x7fffffffffffffff, 0xffffffffffffffff)
RSB(17, 0x7fffffffffffffff, 0x8000000000000000, 1)
RSB(18, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000)
RSB(19, 0x7fffffffffffffff, 0xffffffffffffffff, 0x8000000000000000)
RSB(20, 0xffffffffffffffff, 0xffffffffffffffff, 0)
#endif
#undef RSB
#define RSB(N, T, I0, I1, V) FOP(N, T, rsb, I0, I1, V)
RSB(0, _f, 0.5, -0.5, -1.0)
RSB(1, _f, 0.75, 0.25, -0.5)
RSB(0, _d, 0.5, -0.5, -1.0)
RSB(1, _d, 0.75, 0.25, -0.5)
prepare
pushargi ok
ellipsis
finishi @printf
ret
epilog

View file

@ -286,6 +286,7 @@ static void addcr(void); static void addci(void);
static void subr(void); static void subi(void);
static void subxr(void); static void subxi(void);
static void subcr(void); static void subci(void);
static void rsbr(void); static void rsbi(void);
static void mulr(void); static void muli(void);
static void qmulr(void); static void qmuli(void);
static void qmulr_u(void); static void qmuli_u(void);
@ -392,6 +393,7 @@ static void arg_f(void);
static void getarg_f(void);
static void addr_f(void); static void addi_f(void);
static void subr_f(void); static void subi_f(void);
static void rsbr_f(void); static void rsbi_f(void);
static void mulr_f(void); static void muli_f(void);
static void divr_f(void); static void divi_f(void);
static void negr_f(void); static void absr_f(void);
@ -442,6 +444,7 @@ static void arg_d(void);
static void getarg_d(void);
static void addr_d(void); static void addi_d(void);
static void subr_d(void); static void subi_d(void);
static void rsbr_d(void); static void rsbi_d(void);
static void mulr_d(void); static void muli_d(void);
static void divr_d(void); static void divi_d(void);
static void negr_d(void); static void absr_d(void);
@ -586,6 +589,7 @@ static instr_t instr_vector[] = {
entry(subr), entry(subi),
entry(subxr), entry(subxi),
entry(subcr), entry(subci),
entry(rsbr), entry(rsbi),
entry(mulr), entry(muli),
entry(qmulr), entry(qmuli),
entry(qmulr_u), entry(qmuli_u),
@ -692,6 +696,7 @@ static instr_t instr_vector[] = {
entry(getarg_f),
entry(addr_f), entry(addi_f),
entry(subr_f), entry(subi_f),
entry(rsbr_f), entry(rsbi_f),
entry(mulr_f), entry(muli_f),
entry(divr_f), entry(divi_f),
entry(negr_f), entry(absr_f),
@ -742,6 +747,7 @@ static instr_t instr_vector[] = {
entry(getarg_d),
entry(addr_d), entry(addi_d),
entry(subr_d), entry(subi_d),
entry(rsbr_d), entry(rsbi_d),
entry(mulr_d), entry(muli_d),
entry(divr_d), entry(divi_d),
entry(negr_d), entry(absr_d),
@ -1351,6 +1357,7 @@ entry_ir_ir_ir(addcr) entry_ir_ir_im(addci)
entry_ir_ir_ir(subr) entry_ir_ir_im(subi)
entry_ir_ir_ir(subxr) entry_ir_ir_im(subxi)
entry_ir_ir_ir(subcr) entry_ir_ir_im(subci)
entry_ir_ir_ir(rsbr) entry_ir_ir_im(rsbi)
entry_ir_ir_ir(mulr) entry_ir_ir_im(muli)
entry_ir_ir_ir_ir(qmulr) entry_ir_ir_ir_im(qmuli)
entry_ir_ir_ir_ir(qmulr_u) entry_ir_ir_ir_im(qmuli_u)
@ -1504,6 +1511,7 @@ entry_ca(arg_f)
entry_fa(getarg_f)
entry_fr_fr_fr(addr_f) entry_fr_fr_fm(addi_f)
entry_fr_fr_fr(subr_f) entry_fr_fr_fm(subi_f)
entry_fr_fr_fr(rsbr_f) entry_fr_fr_fm(rsbi_f)
entry_fr_fr_fr(mulr_f) entry_fr_fr_fm(muli_f)
entry_fr_fr_fr(divr_f) entry_fr_fr_fm(divi_f)
entry_fr_fr(negr_f) entry_fr_fr(absr_f)
@ -1554,6 +1562,7 @@ entry_ca(arg_d)
entry_fa(getarg_d)
entry_fr_fr_fr(addr_d) entry_fr_fr_dm(addi_d)
entry_fr_fr_fr(subr_d) entry_fr_fr_dm(subi_d)
entry_fr_fr_fr(rsbr_d) entry_fr_fr_dm(rsbi_d)
entry_fr_fr_fr(mulr_d) entry_fr_fr_dm(muli_d)
entry_fr_fr_fr(divr_d) entry_fr_fr_dm(divi_d)
entry_fr_fr(negr_d) entry_fr_fr(absr_d)