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PPC: Implement and use mcrxr emulation by default
* lib/jit_ppc-cpu.c: Add mcrxr instruction emulation, as this instruction has been phased out, and should be implemented as a kernel trap.
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2 changed files with 60 additions and 1 deletions
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@ -1,3 +1,9 @@
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2014-12-26 Paulo Andrade <pcpa@gnu.org>
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* lib/jit_ppc-cpu.c: Add mcrxr instruction emulation,
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as this instruction has been phased out, and should be
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implemented as a kernel trap.
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2014-12-26 Paulo Andrade <pcpa@gnu.org>
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2014-12-26 Paulo Andrade <pcpa@gnu.org>
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* lib/jit_arm.c: Better check for need to flush constants
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* lib/jit_arm.c: Better check for need to flush constants
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@ -270,7 +270,42 @@ static void _FXS(jit_state_t*,int,int,int,int,int,int,int);
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# define LD(d,a,s) FDs(58,d,a,s)
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# define LD(d,a,s) FDs(58,d,a,s)
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# define LDX(d,a,b) FX(31,d,a,b,21)
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# define LDX(d,a,b) FX(31,d,a,b,21)
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# define MCRF(d,s) FXL(19,d<<2,(s)<<2,0)
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# define MCRF(d,s) FXL(19,d<<2,(s)<<2,0)
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# if DEBUG
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/* In case instruction is emulated, check the kernel can handle it.
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Will only generate it if DEBUG is enabled.
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"""
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Chapter 6. Optional Facilities and Instructions that are being
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Phased Out of the Architecture
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...
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6.1 Move To Condition Register from XER
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The mcrxr instruction is being phased out of the archi-
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tecture. Its description is included here as an aid to
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constructing operating system code to emulate it.
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Move to Condition Register from XER
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X-form
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mcrxr BF
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31 BF // /// /// 512 /
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0 6 9 11 16 21 31
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CR(4xBF:4xBF+3) <- XER(32:35)
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XER(32:35) <- 0b0000
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The contents of XER(32:35) are copied to Condition Reg-
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ister field BF. XER(32:35) are set to zero.
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Special Registers Altered:
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CR field BF XER(32:35)
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Programming Note
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Warning: This instruction has been phased out of
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the architecture. Attempting to execute this
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instruction will cause the system illegal instruction
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error handler to be invoked
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"""
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*/
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# define MCRXR(d) FX(31,d<<2,0,0,512)
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# define MCRXR(d) FX(31,d<<2,0,0,512)
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# else
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# define MCRXR(cr) _MCRXR(_jit,cr);
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static void _MCRXR(jit_state_t*, jit_int32_t);
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# endif
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# define MFCR(d) FX(31,d,0,0,19)
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# define MFCR(d) FX(31,d,0,0,19)
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# define MFMSR(d) FX(31,d,0,0,83)
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# define MFMSR(d) FX(31,d,0,0,83)
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# define MFSPR(d,s) FXFX(31,d,s<<5,339)
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# define MFSPR(d,s) FXFX(31,d,s<<5,339)
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@ -994,6 +1029,24 @@ _FXS(jit_state_t *_jit, int o, int s, int a, int h, int x, int i, int r)
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}
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}
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#endif
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#endif
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#if !DEBUG
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/*
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* Use the sequence commented at
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* http://tenfourfox.blogspot.com/2011/04/attention-g5-owners-your-javascript-no.html
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*/
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static void
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_MCRXR(jit_state_t *_jit, jit_int32_t cr)
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{
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jit_int32_t reg;
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reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
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MFXER(rn(reg));
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MTCRF(128, rn(reg));
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RLWINM(rn(reg), rn(reg), 0, 0, 28);
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MTXER(rn(reg));
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jit_unget_reg(reg);
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}
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#endif
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static void
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static void
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_nop(jit_state_t *_jit, jit_int32_t i0)
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_nop(jit_state_t *_jit, jit_int32_t i0)
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{
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{
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