From a3fbc5da9683640b8f7e8b91ace4c1a1c6ab496d Mon Sep 17 00:00:00 2001 From: pcpa Date: Mon, 10 Dec 2012 21:14:50 -0200 Subject: [PATCH] Correct test cases in the mips backend. * lib/jit_mips-cpu.c: Correct all current test cases. Call the "xori" not the "XORI" macro for jit_xori implementation, as the XORI macro handles only 16 bit unsigned values. Call the "movr" macro, not the "movi" macro in the special case of adding or subtracting zero. Use the proper temporary register in the jit_andr implementation. --- ChangeLog | 9 +++++++++ lib/jit_mips-cpu.c | 8 ++++---- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/ChangeLog b/ChangeLog index 71a1907e9..cbfbafd60 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,12 @@ +2012-12-10 Paulo Andrade + + * lib/jit_mips-cpu.c: Correct all current test cases. + Call the "xori" not the "XORI" macro for jit_xori implementation, + as the XORI macro handles only 16 bit unsigned values. + Call the "movr" macro, not the "movi" macro in the special + case of adding or subtracting zero. + Use the proper temporary register in the jit_andr implementation. + 2012-12-09 Paulo Andrade * check/alu.inc, check/alu_add.ok, check/alu_add.tst, diff --git a/lib/jit_mips-cpu.c b/lib/jit_mips-cpu.c index 5f04e4d2d..87493005c 100644 --- a/lib/jit_mips-cpu.c +++ b/lib/jit_mips-cpu.c @@ -364,7 +364,7 @@ static void _nop(jit_state_t*,jit_int32_t); # define JR(r0) hrrrit(MIPS_SPECIAL,r0,0,0,0,MIPS_JR) # define J(i0) hi(MIPS_J, i0) # define MOVZ(rd,rs,rt) hrrrit(0,rs,rt,rd,0,MIPS_MOVZ) -# define comr(r0,r1) XORI(r0, r1, -1) +# define comr(r0,r1) xori(r0, r1, -1) # define negr(r0,r1) SUBU(r0,_ZERO_REGNO,r1) # define addr(rd,rs,rt) ADDU(rd,rs,rt) # define addi(r0,r1,i0) _addi(_jit,r0,r1,i0) @@ -715,7 +715,7 @@ _addi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0) { jit_int32_t reg; if (i0 == 0) - movi(r0, r1); + movr(r0, r1); else if (can_sign_extend_short_p(i0)) ADDIU(r0, r1, i0); else { @@ -807,7 +807,7 @@ _subi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0) { jit_int32_t reg; if (i0 == 0) - movi(r0, r1); + movr(r0, r1); else if (can_sign_extend_short_p(i0) && (i0 & 0xffff) != 0x8000) ADDIU(r0, r1, -i0); else { @@ -2644,7 +2644,7 @@ _bmcr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1) jit_word_t w; jit_int32_t t0; t0 = jit_get_reg(jit_class_gpr); - AND(rn(r0), r0, r1); + AND(rn(t0), r0, r1); w = _jit->pc.w; BEQ(_ZERO_REGNO, rn(t0), ((i0 - w) >> 2) - 1); NOP(1);