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VM: ASM_MUL for ARM: Add earlyclobber constraint to the SMULL outputs.

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Reported by Rob Browning <rlb@defaultvalue.org>.

* libguile/vm-i-scheme.c (ASM_MUL)[ARM]: Add earlyclobber (&) constraint
  to the SMULL output registers.
This commit is contained in:
Mark H Weaver 2014-09-19 21:18:09 -04:00
parent b38c19a5a5
commit a85c78ea13
1 changed files with 2 additions and 3 deletions
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5
libguile/vm-i-scheme.c
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@ -1,5 +1,4 @@
/* Copyright (C) 2001, 2009, 2010, 2011, 2012, 2013, /* Copyright (C) 2001, 2009-2014 Free Software Foundation, Inc.
* 2014 Free Software Foundation, Inc.
* *
* This library is free software; you can redistribute it and/or * This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License * modify it under the terms of the GNU Lesser General Public License
@ -363,7 +362,7 @@ VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
{ \ { \
scm_t_signed_bits rlo, rhi; \ scm_t_signed_bits rlo, rhi; \
asm ("smull %0, %1, %2, %3\n" \ asm ("smull %0, %1, %2, %3\n" \
: "=r" (rlo), "=r" (rhi) \ : "=&r" (rlo), "=&r" (rhi) \
: "r" (SCM_UNPACK (x) - scm_tc2_int), \ : "r" (SCM_UNPACK (x) - scm_tc2_int), \
"r" (SCM_I_INUM (y))); \ "r" (SCM_I_INUM (y))); \
if (SCM_LIKELY (SCM_SRS (rlo, 31) == rhi)) \ if (SCM_LIKELY (SCM_SRS (rlo, 31) == rhi)) \