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Do not assume that sizeof (long) == sizeof (void *) == sizeof (SCM).
This assumption does not hold on systems that use the LLP64 data model. Partially fixes <https://debbugs.gnu.org/22406>. Reported by Peter TB Brett <peter@peter-b.co.uk>. * libguile/numbers.h (scm_t_inum): Move here from numbers.c, and change to be equivalent to 'long' (formerly 'scm_t_signed_bits'). (SCM_MOST_POSITIVE_FIXNUM, SCM_MOST_NEGATIVE_FIXNUM): Define based on SCM_I_FIXNUM_BIT instead of SCM_T_SIGNED_BITS_MAX. (SCM_I_INUM): Adjust definitions to return a 'scm_t_inum', and avoiding the assumption that SCM_UNPACK returns a 'long'. * libguile/numbers.c (scm_t_inum): Move definition to numbers.h. Verify that 'scm_t_inum' fits within a SCM value. (scm_i_inum2big): Remove preprocessor code that forced a compile error unless sizeof (long) == sizeof (void *). * libguile/vm-i-scheme.c (_CX): For fixnum assembly functions, choose the register size based on SCM_I_FIXNUM_BIT instead of SIZEOF_VOID_P. (ASM_MUL, "ash", "vector-ref", "vector-set", BV_FIXABLE_INT_REF) (BV_INT_REF, BV_FLOAT_REF, BV_FIXABLE_INT_SET, BV_INT_SET) (BV_FLOAT_SET): Use 'scm_t_inum' for fixnums instead of 'scm_t_signed_bits'.
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1e86dc32a4
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3 changed files with 32 additions and 37 deletions
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@ -1,4 +1,4 @@
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/* Copyright (C) 2001, 2009-2014 Free Software Foundation, Inc.
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/* Copyright (C) 2001, 2009-2014, 2016 Free Software Foundation, Inc.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public License
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@ -236,9 +236,9 @@ VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
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#if SCM_GNUC_PREREQ (4, 5) && (defined __x86_64__ || defined __i386__)
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# undef _CX
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# if SIZEOF_VOID_P == 8
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# if SCM_I_FIXNUM_BIT == 62
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# define _CX "rcx"
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# elif SIZEOF_VOID_P == 4
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# elif SCM_I_FIXNUM_BIT == 30
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# define _CX "ecx"
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# else
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# error unsupported word size
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@ -291,7 +291,7 @@ VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
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# define ASM_MUL(x, y) \
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{ \
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scm_t_signed_bits xx = SCM_I_INUM (x); \
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scm_t_inum xx = SCM_I_INUM (x); \
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asm volatile goto ("mov %1, %%"_CX"; " \
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"test %[tag], %%cl; je %l[slow_mul]; " \
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"sub %[tag], %%"_CX"; " \
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@ -360,7 +360,7 @@ VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
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# define ASM_MUL(x, y) \
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if (SCM_LIKELY (SCM_I_INUMP (x) && SCM_I_INUMP (y))) \
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{ \
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scm_t_signed_bits rlo, rhi; \
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scm_t_inum rlo, rhi; \
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asm ("smull %0, %1, %2, %3\n" \
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: "=&r" (rlo), "=&r" (rhi) \
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: "r" (SCM_UNPACK (x) - scm_tc2_int), \
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@ -496,7 +496,7 @@ VM_DEFINE_FUNCTION (159, ash, "ash", 2)
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else
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/* Left shift. See comments in scm_ash. */
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{
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scm_t_signed_bits nn, bits_to_shift;
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scm_t_inum nn, bits_to_shift;
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nn = SCM_I_INUM (x);
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bits_to_shift = SCM_I_INUM (y);
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@ -552,7 +552,7 @@ VM_DEFINE_FUNCTION (162, logxor, "logxor", 2)
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VM_DEFINE_FUNCTION (163, vector_ref, "vector-ref", 2)
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{
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scm_t_signed_bits i = 0;
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scm_t_inum i = 0;
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ARGS2 (vect, idx);
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if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
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&& SCM_I_INUMP (idx)
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@ -568,7 +568,7 @@ VM_DEFINE_FUNCTION (163, vector_ref, "vector-ref", 2)
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VM_DEFINE_INSTRUCTION (164, vector_set, "vector-set", 0, 3, 0)
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{
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scm_t_signed_bits i = 0;
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scm_t_inum i = 0;
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SCM vect, idx, val;
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POP3 (val, idx, vect);
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if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
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@ -792,7 +792,7 @@ BV_REF_WITH_ENDIANNESS (f64, ieee_double)
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#define BV_FIXABLE_INT_REF(stem, fn_stem, type, size) \
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{ \
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scm_t_signed_bits i; \
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scm_t_inum i; \
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const scm_t_ ## type *int_ptr; \
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ARGS2 (bv, idx); \
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\
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@ -814,7 +814,7 @@ BV_REF_WITH_ENDIANNESS (f64, ieee_double)
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#define BV_INT_REF(stem, type, size) \
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{ \
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scm_t_signed_bits i; \
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scm_t_inum i; \
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const scm_t_ ## type *int_ptr; \
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ARGS2 (bv, idx); \
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\
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@ -845,7 +845,7 @@ BV_REF_WITH_ENDIANNESS (f64, ieee_double)
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#define BV_FLOAT_REF(stem, fn_stem, type, size) \
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{ \
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scm_t_signed_bits i; \
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scm_t_inum i; \
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const type *float_ptr; \
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ARGS2 (bv, idx); \
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\
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@ -933,7 +933,7 @@ BV_SET_WITH_ENDIANNESS (f64, ieee_double)
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#define BV_FIXABLE_INT_SET(stem, fn_stem, type, min, max, size) \
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{ \
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scm_t_signed_bits i, j = 0; \
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scm_t_inum i, j = 0; \
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SCM bv, idx, val; \
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scm_t_ ## type *int_ptr; \
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\
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@ -960,7 +960,7 @@ BV_SET_WITH_ENDIANNESS (f64, ieee_double)
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#define BV_INT_SET(stem, type, size) \
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{ \
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scm_t_signed_bits i = 0; \
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scm_t_inum i = 0; \
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SCM bv, idx, val; \
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scm_t_ ## type *int_ptr; \
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\
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@ -984,7 +984,7 @@ BV_SET_WITH_ENDIANNESS (f64, ieee_double)
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#define BV_FLOAT_SET(stem, fn_stem, type, size) \
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{ \
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scm_t_signed_bits i = 0; \
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scm_t_inum i = 0; \
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SCM bv, idx, val; \
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type *float_ptr; \
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\
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