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Add consistency check on temporaries during a jump

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* lib/jit_aarch64-cpu.c, lib/jit_aarch64-fpu.c,
	lib/jit_arm-cpu.c, lib/jit_arm-vfp.c,
	lib/jit_hppa-cpu.c, lib/jit_hppa-fpu.c,
	lib/jit_ia64-cpu.c, lib/jit_ia64-fpu.c,
	lib/jit_mips-cpu.c, lib/jit_mips-fpu.c,
	lib/jit_ppc-cpu.c, lib/jit_ppc-fpu.c,
	lib/jit_s390x-cpu.c, lib/jit_s390x-fpu.c,
	lib/jit_s390x.c, lib/jit_sparc-cpu.c,
	lib/jit_x86-cpu.c, lib/jit_x86-sse.c,
	lib/jit_x86-x87.c: Review generation of all branch
	instructions and always adds the jit_class_nospill
	bitfield for temporary registers that cannot be	spilled
	because the reload would be after a conditional jump; the
	patch only adds an extra assertion. These conditions do
	not happen on documented lightning usage, but can happen
	if one uses the not exported jit_get_reg and jit_unget_reg
	calls and cause enough register starvation.
This commit is contained in:
pcpa 2014-08-16 20:31:55 -03:00
parent 93e3ff38e1
commit b58960638d
20 changed files with 221 additions and 192 deletions
Download patch file Download diff file Expand all files Collapse all files

6
lib/jit_sparc-cpu.c
View file

@ -1466,7 +1466,7 @@ _bw(jit_state_t *_jit, jit_int32_t cc,
NOP();
}
else {
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
w = br(cc, i0, r0, rn(reg));
jit_unget_reg(reg);
@ -1511,7 +1511,7 @@ _b_asw(jit_state_t *_jit, jit_bool_t jif, jit_bool_t add, jit_bool_t sgn,
NOP();
}
else {
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
w = b_asr(jif, add, sgn, i0, r0, rn(reg));
jit_unget_reg(reg);
@ -1544,7 +1544,7 @@ _bm_w(jit_state_t *_jit, jit_bool_t set,
NOP();
}
else {
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
w = bm_r(set, i0, r0, rn(reg));
jit_unget_reg(reg);