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Add consistency check on temporaries during a jump

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* lib/jit_aarch64-cpu.c, lib/jit_aarch64-fpu.c,
	lib/jit_arm-cpu.c, lib/jit_arm-vfp.c,
	lib/jit_hppa-cpu.c, lib/jit_hppa-fpu.c,
	lib/jit_ia64-cpu.c, lib/jit_ia64-fpu.c,
	lib/jit_mips-cpu.c, lib/jit_mips-fpu.c,
	lib/jit_ppc-cpu.c, lib/jit_ppc-fpu.c,
	lib/jit_s390x-cpu.c, lib/jit_s390x-fpu.c,
	lib/jit_s390x.c, lib/jit_sparc-cpu.c,
	lib/jit_x86-cpu.c, lib/jit_x86-sse.c,
	lib/jit_x86-x87.c: Review generation of all branch
	instructions and always adds the jit_class_nospill
	bitfield for temporary registers that cannot be	spilled
	because the reload would be after a conditional jump; the
	patch only adds an extra assertion. These conditions do
	not happen on documented lightning usage, but can happen
	if one uses the not exported jit_get_reg and jit_unget_reg
	calls and cause enough register starvation.
This commit is contained in:
pcpa 2014-08-16 20:31:55 -03:00
parent 93e3ff38e1
commit b58960638d
20 changed files with 221 additions and 192 deletions
Download patch file Download diff file Expand all files Collapse all files

16
lib/jit_x86-cpu.c
View file

@ -3089,7 +3089,7 @@ _boaddi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jo(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (boaddr(i0, r0, rn(reg)));
@ -3112,7 +3112,7 @@ _boaddi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jc(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (boaddr_u(i0, r0, rn(reg)));
@ -3135,7 +3135,7 @@ _bxaddi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jno(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (bxaddr(i0, r0, rn(reg)));
@ -3158,7 +3158,7 @@ _bxaddi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jnc(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (bxaddr_u(i0, r0, rn(reg)));
@ -3181,7 +3181,7 @@ _bosubi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jo(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (bosubr(i0, r0, rn(reg)));
@ -3204,7 +3204,7 @@ _bosubi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jc(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (bosubr_u(i0, r0, rn(reg)));
@ -3227,7 +3227,7 @@ _bxsubi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jno(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (bxsubr(i0, r0, rn(reg)));
@ -3250,7 +3250,7 @@ _bxsubi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
jnc(i0);
return (_jit->pc.w);
}
reg = jit_get_reg(jit_class_gpr);
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
movi(rn(reg), i1);
jit_unget_reg(reg);
return (bxsubr_u(i0, r0, rn(reg)));