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Cosmetic removal of white spaces in end of lines.

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pcpa 2013-08-10 11:38:43 -03:00
parent f6ee396ccb
commit c078a972b4
10 changed files with 19 additions and 19 deletions
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2
check/ccall.c
View file

@ -702,7 +702,7 @@ main(int argc, char *argv[])
# define jit_extr_l(u, v) /**/ # define jit_extr_l(u, v) /**/
#endif #endif
#define strfy(n) #n #define strfy(n) #n
#define defi(T, N) \ #define defi(T, N) \
n##T##N = jit_name(strfy(n##T##N)); \ n##T##N = jit_name(strfy(n##T##N)); \
jit_note("ccall.c", __LINE__); \ jit_note("ccall.c", __LINE__); \

2
doc/Makefile.am
View file

@ -14,7 +14,7 @@
AM_CFLAGS = -I$(top_srcdir)/include -D_GNU_SOURCE AM_CFLAGS = -I$(top_srcdir)/include -D_GNU_SOURCE
info_TEXINFOS = lightning.texi info_TEXINFOS = lightning.texi
MOSTLYCLEANFILES = lightning.tmp MOSTLYCLEANFILES = lightning.tmp
lightning_TEXINFOS = body.texi version.texi lightning_TEXINFOS = body.texi version.texi

4
lib/jit_aarch64-fpu.c
View file

@ -592,7 +592,7 @@ _fbcci(jit_state_t *_jit, jit_int32_t cc,
reg = jit_get_reg(jit_class_fpr); reg = jit_get_reg(jit_class_fpr);
movi_f(rn(reg), i1); movi_f(rn(reg), i1);
w = fbccr(cc, i0, r0, rn(reg)); w = fbccr(cc, i0, r0, rn(reg));
jit_unget_reg(reg); jit_unget_reg(reg);
return (w); return (w);
} }
@ -807,7 +807,7 @@ _dbcci(jit_state_t *_jit, jit_int32_t cc,
reg = jit_get_reg(jit_class_fpr); reg = jit_get_reg(jit_class_fpr);
movi_d(rn(reg), i1); movi_d(rn(reg), i1);
w = dbccr(cc, i0, r0, rn(reg)); w = dbccr(cc, i0, r0, rn(reg));
jit_unget_reg(reg); jit_unget_reg(reg);
return (w); return (w);
} }

2
lib/jit_hppa-fpu.c
View file

@ -56,7 +56,7 @@ static void _f49_52(jit_state_t*,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t, jit_int32_t,jit_int32_t,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t, jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t); jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
#define f53(o,r1,r2,ta,ra,f,tm) _f53(_jit,o,r1,r2,ta,ra,f,tm) #define f53(o,r1,r2,ta,ra,f,tm) _f53(_jit,o,r1,r2,ta,ra,f,tm)
static void _f53(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t, static void _f53(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t) maybe_unused; jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t) maybe_unused;
#define f54(o,r1,r2,a,b,f,c,d,e,g,t) _f54(_jit,o,r1,r2,a,b,f,c,d,e,g,t) #define f54(o,r1,r2,a,b,f,c,d,e,g,t) _f54(_jit,o,r1,r2,a,b,f,c,d,e,g,t)

4
lib/jit_hppa.c
View file

@ -1161,7 +1161,7 @@ memory prior to any attempts at prefetching it as an instruction.
LDIL l%instr,rinstr LDIL l%instr,rinstr
STW temp,r%instr(0,rinstr) STW temp,r%instr(0,rinstr)
FDC r%instr(0,rinstr) FDC r%instr(0,rinstr)
SYNC SYNC
FIC r%instr(rinstr) FIC r%instr(rinstr)
SYNC SYNC
instr ... instr ...
@ -1171,7 +1171,7 @@ This sequence assumes a uniprocessor system. In a multiprocessor system,
software must ensure no processor is executing code which is in the process software must ensure no processor is executing code which is in the process
of being modified. of being modified.
*/ */
/* /*
Adapted from ffcall/trampoline/cache-hppa.c:__TR_clear_cache to Adapted from ffcall/trampoline/cache-hppa.c:__TR_clear_cache to
loop over addresses as it is unlikely from and to addresses would fit in loop over addresses as it is unlikely from and to addresses would fit in

2
lib/jit_ia64-cpu.c
View file

@ -79,7 +79,7 @@
stop(); \ stop(); \
} while (0) } while (0)
/* Record register was modified */ /* Record register was modified */
#define SETREG(r0) jit_regset_setbit(&_jitc->regs, r0) #define SETREG(r0) jit_regset_setbit(&_jitc->regs, r0)
/* Avoid using constants in macros and code */ /* Avoid using constants in macros and code */
typedef enum { typedef enum {

2
lib/jit_ia64-fpu.c
View file

@ -39,7 +39,7 @@
jit_regset_tstbit(&_jitc->regs, r2 + 128)) \ jit_regset_tstbit(&_jitc->regs, r2 + 128)) \
stop(); \ stop(); \
} while (0) } while (0)
#define SETFREG(r0) jit_regset_setbit(&_jitc->regs, r0 + 128) #define SETFREG(r0) jit_regset_setbit(&_jitc->regs, r0 + 128)
/* libm */ /* libm */
extern float sqrtf(float); extern float sqrtf(float);

4
lib/jit_mips-cpu.c
View file

@ -2821,7 +2821,7 @@ _prolog(jit_state_t *_jit, jit_node_t *node)
if (jit_regset_tstbit(&_jitc->function->regset, iregs[index])) if (jit_regset_tstbit(&_jitc->function->regset, iregs[index]))
stxi(offset, _SP_REGNO, rn(iregs[index])); stxi(offset, _SP_REGNO, rn(iregs[index]));
} }
assert(offset >= sizeof(jit_word_t)); assert(offset >= sizeof(jit_word_t));
stxi(offset, _SP_REGNO, _RA_REGNO); stxi(offset, _SP_REGNO, _RA_REGNO);
stxi(0, _SP_REGNO, _BP_REGNO); stxi(0, _SP_REGNO, _BP_REGNO);
movr(_BP_REGNO, _SP_REGNO); movr(_BP_REGNO, _SP_REGNO);
@ -2848,7 +2848,7 @@ _epilog(jit_state_t *_jit, jit_node_t *node)
if (jit_regset_tstbit(&_jitc->function->regset, iregs[index])) if (jit_regset_tstbit(&_jitc->function->regset, iregs[index]))
ldxi(rn(iregs[index]), _SP_REGNO, offset); ldxi(rn(iregs[index]), _SP_REGNO, offset);
} }
assert(offset >= sizeof(jit_word_t)); assert(offset >= sizeof(jit_word_t));
ldxi(_RA_REGNO, _SP_REGNO, offset); ldxi(_RA_REGNO, _SP_REGNO, offset);
ldxi(_BP_REGNO, _SP_REGNO, 0); ldxi(_BP_REGNO, _SP_REGNO, 0);
JR(_RA_REGNO); JR(_RA_REGNO);

14
lib/jit_sparc-cpu.c
View file

@ -686,7 +686,7 @@ _f2r(jit_state_t *_jit,
v.rd.b = rd; v.rd.b = rd;
v.op2.b = op2; v.op2.b = op2;
v.imm22.b = imm22; v.imm22.b = imm22;
ii(v.v); ii(v.v);
} }
static void static void
@ -705,7 +705,7 @@ _f2b(jit_state_t *_jit,
v.cond.b = cond; v.cond.b = cond;
v.op2.b = op2; v.op2.b = op2;
v.disp22.b = disp22; v.disp22.b = disp22;
ii(v.v); ii(v.v);
} }
static void static void
@ -725,7 +725,7 @@ _f3r(jit_state_t *_jit, jit_int32_t op, jit_int32_t rd,
v.i.b = 0; v.i.b = 0;
v.asi.b = 0; v.asi.b = 0;
v.rs2.b = rs2; v.rs2.b = rs2;
ii(v.v); ii(v.v);
} }
static void static void
@ -744,7 +744,7 @@ _f3i(jit_state_t *_jit, jit_int32_t op, jit_int32_t rd,
v.rs1.b = rs1; v.rs1.b = rs1;
v.i.b = 1; v.i.b = 1;
v.simm13.b = simm13; v.simm13.b = simm13;
ii(v.v); ii(v.v);
} }
static void static void
@ -769,7 +769,7 @@ _f3t(jit_state_t *_jit, jit_int32_t cond,
v.asi.b = 0; v.asi.b = 0;
v.rs2.b = rs2_imm7; v.rs2.b = rs2_imm7;
} }
ii(v.v); ii(v.v);
} }
static void static void
@ -790,7 +790,7 @@ _f3a(jit_state_t *_jit, jit_int32_t op, jit_int32_t rd,
v.i.b = 0; v.i.b = 0;
v.asi.b = asi; v.asi.b = asi;
v.rs2.b = rs2; v.rs2.b = rs2;
ii(v.v); ii(v.v);
} }
static void static void
@ -801,7 +801,7 @@ _f1(jit_state_t *_jit, jit_int32_t op, jit_int32_t disp30)
assert(s30_p(disp30)); assert(s30_p(disp30));
v.op.b = op; v.op.b = op;
v.disp30.b = disp30; v.disp30.b = disp30;
ii(v.v); ii(v.v);
} }
static void static void

2
lib/jit_x86-cpu.c
View file

@ -1792,7 +1792,7 @@ static void
_comr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1) _comr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
{ {
movr(r0, r1); movr(r0, r1);
icomr(r0); icomr(r0);
} }
#if USE_INC_DEC #if USE_INC_DEC