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Consider all callee_save_p regs as live on non trackable jumps

This commit is contained in:
pcpa 2014-09-07 15:32:32 -03:00
parent 120dfc956d
commit c8bb0dad56
5 changed files with 94 additions and 19 deletions

View file

@ -2172,19 +2172,9 @@ _jit_update(jit_state_t *_jit, jit_node_t *node,
* no options for "nospill" temporaries (other temporaries
* also benefit from not needing to spill/reload), so, the
* user must ensure to either spill/reload, or only leave
* live registers on JIT_Vn if using a jump that cannot
* be tracked around the generated jit code */
for (spec = JIT_R_NUM - 1; spec >= 0; spec--) {
regno = jit_r(spec);
if (jit_regset_tstbit(mask, regno))
jit_regset_clrbit(mask, regno);
}
for (spec = JIT_F_NUM - 1; spec >= 0; spec--) {
regno = jit_f(spec);
if (jit_regset_tstbit(mask, regno))
jit_regset_clrbit(mask, regno);
}
/* In some backends JIT_Rn and JIT_Fn are callee save */
* live values on registers that are advertised as
* callee save (as per jit_callee_save_p); on most targets
* these are the JIT_Vn registers. */
for (regno = 0; regno < _jitc->reglen; regno++) {
spec = jit_class(_rvs[regno].spec);
if (jit_regset_tstbit(mask, regno) &&