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Implement new synthesized IR codes sequences

* lib/jit_rewind.c: New file implementing generic functions
	to "rewind", or rewrite IR code sequences.

	* include/lightning.h: Add several new codes, that previously
	were a function call, that would synthesize the operation.
	Now, there is a code for the operation, and a new flag to
	know an operation is synthesized.

	* include/lightning/jit_private.h: Add several new macros to
	help construct synthesized IR code sequences.

	* lib/Makefile.am: Update for lib/jit_rewind.c.

	* lib/jit_disasm.c: Update for a small rework on jit_node_t,
	so that --enable-devel-disassembler does not need a change
	in the layout of jit_node_t.

	* lib/jit_names.c: Update for the new codes.

	* lib/jit_print.c: Update to print more readable output, and
	flag synthesized IR code sequences.

	* lib/jit_aarch64-sz.c, lib/jit_aarch64.c,
	lib/jit_arm-sz.c, lib/jit_arm.c, lib/jit_x86-sz.c,
	lib/jit_x86.c: Update for new synthesized IR code sequences.

	* lib/jit_ppc-cpu.c, lib/jit_ppc-fpu., lib/jit_ppc-sz.c,
	lib/jit_ppc.c, lib/jit_mips-cpu.c, lib/jit_mips-fpu.c,
	lib/jit_mips-sz.c, lib/jit_mips.c, lib/jit_s390-fpu.c,
	lib/jit_s390-sz.c, lib/jit_s390.c: Update for new synthesized
	IR code sequences and correct bugs in the initial varargs
	implementation support.

	* lib/jit_alpha-sz.c, lib/jit_alpha.c, lib/jit_hppa-sz.c,
	lib/jit_hppa.c, lib/jit_ia64-sz.c, lib/jit_ia64.c,
	lib/jit_sparc-sz.c, lib/jit_sparc.c: Add generic, untested
	support for the new synthesized	IR code sequences. Known
	most likely broken right now, and should be corrected once
	access to these hosts is available.

	* lib/lightning.c: Update for new IR codes, and add support
	for not yet existing instructions that change third argument.

	* size.c: Change to use different tables for LE and BE PowerPC.
	Correct a wrong endif for x32.
This commit is contained in:
pcpa 2015-06-04 18:53:07 -03:00
parent 7f1e0dfb34
commit d0a5bd8d3d
35 changed files with 4397 additions and 1152 deletions

View file

@ -2956,7 +2956,7 @@ _prolog(jit_state_t *_jit, jit_node_t *node)
}
if (_jitc->function->self.call & jit_call_varargs) {
index = _jitc->function->vagp;
index = (_jitc->function->self.size - stack_framesize) >> STACK_SHIFT;
offset = stack_framesize + index * sizeof(jit_word_t);
for (; jit_arg_reg_p(index); ++index, offset += sizeof(jit_word_t))
stxi(offset, _BP_REGNO, rn(_A0 - index));
@ -2993,41 +2993,19 @@ _epilog(jit_state_t *_jit, jit_node_t *node)
static void
_vastart(jit_state_t *_jit, jit_int32_t r0)
{
jit_int32_t reg;
assert(_jitc->function->self.call & jit_call_varargs);
/* Return jit_va_list_t in the register argument */
addi(r0, _BP_REGNO, _jitc->function->vaoff);
reg = jit_get_reg(jit_class_gpr);
/* Initialize stack pointer to the first stack argument. */
addi(rn(reg), _BP_REGNO, stack_framesize +
_jitc->function->vagp * sizeof(jit_word_t));
stxi(offsetof(jit_va_list_t, stack), r0, rn(reg));
jit_unget_reg(reg);
/* Initialize va_list to the first stack argument. */
addi(r0, _BP_REGNO, _jitc->function->self.size);
}
static void
_vaarg(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
{
jit_int32_t reg;
assert(_jitc->function->self.call & jit_call_varargs);
reg = jit_get_reg(jit_class_gpr);
/* Load varargs stack pointer. */
ldxi(rn(reg), r1, offsetof(jit_va_list_t, stack));
/* Load argument. */
ldr(r0, rn(reg));
ldr(r0, r1);
/* Update vararg stack pointer. */
addi(rn(reg), rn(reg), sizeof(jit_word_t));
stxi(offsetof(jit_va_list_t, stack), r1, rn(reg));
jit_unget_reg(reg);
/* Update va_list. */
addi(r1, r1, sizeof(jit_word_t));
}
static void