mirror of
https://git.savannah.gnu.org/git/guile.git
synced 2025-05-27 23:40:24 +02:00
Add new test case for int/float to/from conversion.
* check/Makefile.am, check/cvt.ok, check/cvt.tst: Add new
"cvt" test case to test conversion from/to int/float types.
* check/lightning.c: Only define truncr_{f,d}_l in 64 bit mode.
* include/lightning.h: Correct typo that caused it to define
jit_truncr_{f,d}_l in 32 bit mode.
* lib/jit_arm-cpu.c: Avoid assertion failure in the signed/unsigned
extend opcodes generation as it shares an interface for 3 argument
opcode generation.
* lib/jit_x86-cpu.c: Correct wrong argument passed to
jit_unget_reg in the andi implementation and wrong byte
unsigned extend code generation.
* lib/jit_x86-sse.c: Correct conversion from "word" to float or
double as is dependent on wordsize.
This commit is contained in:
pcpa
parent
e7e55966cb
commit
d1c0bc8e98
9 changed files with 449 additions and 18 deletions
21
ChangeLog
21
ChangeLog
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@ -1,3 +1,24 @@
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2012-12-05 Paulo Andrade <pcpa@gnu.org>
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* check/Makefile.am, check/cvt.ok, check/cvt.tst: Add new
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"cvt" test case to test conversion from/to int/float types.
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* check/lightning.c: Only define truncr_{f,d}_l in 64 bit mode.
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* include/lightning.h: Correct typo that caused it to define
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jit_truncr_{f,d}_l in 32 bit mode.
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* lib/jit_arm-cpu.c: Avoid assertion failure in the signed/unsigned
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extend opcodes generation as it shares an interface for 3 argument
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opcode generation.
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* lib/jit_x86-cpu.c: Correct wrong argument passed to
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jit_unget_reg in the andi implementation and wrong byte
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unsigned extend code generation.
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* lib/jit_x86-sse.c: Correct conversion from "word" to float or
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double as is dependent on wordsize.
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2012-12-05 Paulo Andrade <pcpa@gnu.org>
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* check/ldstr-c.ok, check/ldstr-c.tst, check/ldstxi-c.ok,
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@ -40,6 +40,7 @@ EXTRA_DIST = \
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ldstr-c.tst ldstr-c.ok \
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ldstxr-c.tst ldstxr-c.ok \
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ldstxi-c.tst ldstxi-c.ok \
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cvt.tst cvt.ok \
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check.sh run-test \
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all.tst
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@ -47,7 +48,8 @@ TESTS = 3to2 add allocai \
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bp divi fib rpn \
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ldstr ldsti \
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ldstxr ldstxi \
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ldstr-c ldstxr-c ldstxi-c
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ldstr-c ldstxr-c ldstxi-c \
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cvt
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CLEANFILES = $(TESTS)
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1
check/cvt.ok
Normal file
1
check/cvt.ok
Normal file
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@ -0,0 +1 @@
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ok
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379
check/cvt.tst
Normal file
379
check/cvt.tst
Normal file
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@ -0,0 +1,379 @@
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.data 12
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ok:
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.c "ok\n"
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#if __WORDSIZE == 32
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# define w7f 0x7fffffff
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# define w80 0x80000000
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# define w81 0x80000001
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# define wff 0xffffffff
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# define LEXTII2(N, R0, R1)
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# define LEXTIC2(N, R0)
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#else
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# define w7f 0x7fffffffffffffff
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# define w80 0x8000000000000000
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# define w81 0x8000000000000001
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# define wff 0xffffffffffffffff
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# define i7f wff
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# define ui7f 0xffffffff
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# define i80 0
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# define ui80 0
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# define i81 1
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# define ui81 1
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# define iff wff
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# define uiff 0xffffffff
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# define LEXTII2(N, R0, R1) \
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EXTII2(N, i, R0, R1) \
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EXTII2(N, ui, R0, R1)
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# define LEXTIC2(N, R0) \
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EXTIC2(N, i, R0) \
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EXTIC2(N, ui, R0)
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#endif
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#define c7f wff
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#define uc7f 0xff
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#define s7f wff
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#define us7f 0xffff
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#define c80 0
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#define uc80 0
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#define s80 0
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#define us80 0
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#define c81 1
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#define uc81 1
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#define s81 1
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#define us81 1
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#define cff wff
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#define ucff 0xff
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#define sff wff
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#define usff 0xffff
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#define EXTII2(N, T, R0, R1) \
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movi %R0 w##N \
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extr_##T %R1 %R0 \
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beqi T##_##R0##_##R1##_##N %R1 T##N \
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calli @abort \
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T##_##R0##_##R1##_##N:
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#define EXTII1(N, R0, R1) \
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EXTII2(N, c, R0, R1) \
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EXTII2(N, uc, R0, R1) \
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EXTII2(N, s, R0, R1) \
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EXTII2(N, us, R0, R1) \
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LEXTII2(N, R0, R1)
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#define EXTII0(R0, R1) \
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EXTII1(7f, R0, R1) \
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EXTII1(80, R0, R1) \
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EXTII1(81, R0, R1) \
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EXTII1(ff, R0, R1)
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#define EXTIC2(N, T, R0) \
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movi %R0 w##N \
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extr_##T %R0 %R0 \
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beqi T##_##R0##_##N %R0 T##N \
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calli @abort \
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T##_##R0##_##N:
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#define EXTIC1(N, R0) \
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EXTIC2(N, c, R0) \
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EXTIC2(N, uc, R0) \
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EXTIC2(N, s, R0) \
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EXTIC2(N, us, R0) \
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LEXTIC2(N, R0)
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#define EXTIC0(R0) \
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EXTIC1(7f, R0) \
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EXTIC1(80, R0) \
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EXTIC1(81, R0) \
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EXTIC1(ff, R0)
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#define EXTII(V0, V1, V2, R0, R1, R2) \
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EXTII0(V0, V1) \
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EXTII0(V0, V2) \
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EXTII0(V0, R0) \
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EXTII0(V0, R1) \
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EXTII0(V0, R2) \
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EXTII0(V1, V0) \
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EXTII0(V1, V2) \
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EXTII0(V1, R0) \
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EXTII0(V1, R1) \
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EXTII0(V1, R2) \
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EXTII0(V2, V0) \
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EXTII0(V2, V1) \
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EXTII0(V2, R0) \
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EXTII0(V2, R1) \
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EXTII0(V2, R2) \
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EXTII0(R0, V0) \
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EXTII0(R0, V1) \
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EXTII0(R0, V2) \
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EXTII0(R0, R1) \
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EXTII0(R0, R2) \
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EXTII0(R1, V0) \
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EXTII0(R1, V1) \
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EXTII0(R1, V2) \
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EXTII0(R1, R0) \
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EXTII0(R1, R2) \
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EXTII0(R2, V0) \
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EXTII0(R2, V1) \
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EXTII0(R2, V2) \
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EXTII0(R2, R0) \
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EXTII0(R2, R1) \
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EXTIC0(V0) \
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EXTIC0(V1) \
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EXTIC0(V2) \
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EXTIC0(R0) \
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EXTIC0(R1) \
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EXTIC0(R2)
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#define EXIF1(N, V, R0, R1) \
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movi %R0 V \
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extr_f %R1 %R0 \
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beqi_f wf##_##R0##_##R1##_##N %R1 V \
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wf##_##R0##_##R1##_##N:
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#define EXIF0(R0, R1) \
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EXIF1(0, -1, R0, R1) \
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EXIF1(1, 64, R0, R1)
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#define EXIF(V0, V1, V2, R0, R1, R2, F0, F1, F2, F3, F4, F5) \
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EXIF0(V0, F0) \
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EXIF0(V1, F1) \
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EXIF0(V2, F2) \
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EXIF0(R0, F3) \
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EXIF0(R1, F4) \
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EXIF0(R2, F5)
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#define EXID1(N, V, R0, R1) \
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movi %R0 V \
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extr_d %R1 %R0 \
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beqi_d wd##_##R0##_##R1##_##N %R1 V \
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wd##_##R0##_##R1##_##N:
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#define EXID0(R0, R1) \
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EXID1(0, -1, R0, R1) \
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EXID1(1, 64, R0, R1)
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#define EXID(V0, V1, V2, R0, R1, R2, F0, F1, F2, F3, F4, F5) \
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EXID0(V0, F0) \
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EXID0(V1, F1) \
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EXID0(V2, F2) \
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EXID0(R0, F3) \
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EXID0(R1, F4) \
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EXID0(R2, F5)
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#define EXFI1(N, V, R0, R1) \
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movi_f %R1 V \
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truncr_f %R0 %R1 \
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beqi fi##_##R0##_##R1##_##N %R0 V \
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calli @abort \
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fi##_##R0##_##R1##_##N:
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#define EXFI0(R0, R1) \
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EXFI1(0, 42, R0, R1) \
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EXFI1(1, -128, R0, R1)
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#define EXFI(V0, V1, V2, R0, R1, R2, F0, F1, F2, F3, F4, F5) \
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EXFI0(V0, F5) \
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EXFI0(V1, F4) \
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EXFI0(V2, F3) \
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EXFI0(R0, F2) \
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EXFI0(R1, F1) \
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EXFI0(R2, F0)
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#define EXDI1(N, V, R0, R1) \
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movi_d %R1 V \
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truncr_d %R0 %R1 \
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beqi di##_##R0##_##R1##_##N %R0 V \
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calli @abort \
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di##_##R0##_##R1##_##N:
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#define EXDI0(R0, R1) \
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EXDI1(0, 42, R0, R1) \
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EXDI1(1, -128, R0, R1)
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#define EXDI(V0, V1, V2, R0, R1, R2, F0, F1, F2, F3, F4, F5) \
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EXDI0(V0, F5) \
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EXDI0(V1, F4) \
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EXDI0(V2, F3) \
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EXDI0(R0, F2) \
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EXDI0(R1, F1) \
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EXDI0(R2, F0)
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#define LEXFI1(N, V, R0, R1) \
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movi_f %R1 V \
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truncr_f_i %R0 %R1 \
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andi %R0 %R0 0xffffffff \
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beqi lfi##_##R0##_##R1##_##N %R0 $(V & 0xffffffff) \
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calli @abort \
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lfi##_##R0##_##R1##_##N:
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#define LEXFI0(R0, R1) \
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LEXFI1(0, 42, R0, R1) \
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LEXFI1(1, -128, R0, R1)
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#define LEXFI(V0, V1, V2, R0, R1, R2, F0, F1, F2, F3, F4, F5) \
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LEXFI0(V0, F5) \
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LEXFI0(V1, F4) \
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LEXFI0(V2, F3) \
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LEXFI0(R0, F2) \
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LEXFI0(R1, F1) \
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LEXFI0(R2, F0)
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#define LEXDI1(N, V, R0, R1) \
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movi_d %R1 V \
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truncr_d_i %R0 %R1 \
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andi %R0 %R0 0xffffffff \
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beqi ldi##_##R0##_##R1##_##N %R0 $(V & 0xffffffff) \
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calli @abort \
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ldi##_##R0##_##R1##_##N:
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#define LEXDI0(R0, R1) \
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LEXDI1(0, 42, R0, R1) \
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LEXDI1(1, -128, R0, R1)
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#define LEXDI(V0, V1, V2, R0, R1, R2, F0, F1, F2, F3, F4, F5) \
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LEXDI0(V0, F5) \
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LEXDI0(V1, F4) \
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LEXDI0(V2, F3) \
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LEXDI0(R0, F2) \
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LEXDI0(R1, F1) \
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LEXDI0(R2, F0)
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#define EXTFD2(V, R0, R1) \
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movi_f %R0 V \
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extr_f_d %R1 %R0 \
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beqi_d fd##_##R0##_##R1 %R1 V \
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calli @abort \
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fd##_##R0##_##R1:
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#define EXTFD1(R0, R1) \
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EXTFD2(1.25, R0, R1)
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#define EXTFDC2(V, R0) \
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movi_f %R0 V \
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extr_f_d %R0 %R0 \
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beqi_d fdc##_##R0 %R0 V \
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calli @abort \
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fdc##_##R0:
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#define EXTFDC1(R0) \
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EXTFDC2(-0.75, R0)
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#define EXTFD(R0, R1, R2, R3, R4, R5) \
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EXTFD1(R0, R1) \
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EXTFD1(R0, R2) \
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EXTFD1(R0, R3) \
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EXTFD1(R0, R4) \
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EXTFD1(R0, R5) \
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EXTFDC1(R0) \
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EXTFDC1(R1) \
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EXTFDC1(R2) \
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EXTFDC1(R3) \
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EXTFDC1(R4) \
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EXTFDC1(R5)
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#define EXTDF2(V, R0, R1) \
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movi_d %R0 V \
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extr_d_f %R1 %R0 \
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beqi_f df##_##R0##_##R1 %R1 V \
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calli @abort \
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df##_##R0##_##R1:
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#define EXTDF1(R0, R1) \
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EXTDF2(1.25, R0, R1)
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#define EXTDFC2(V, R0) \
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movi_d %R0 V \
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extr_d_f %R0 %R0 \
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beqi_f dfc##_##R0 %R0 V \
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calli @abort \
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dfc##_##R0:
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#define EXTDFC1(R0) \
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EXTDFC2(-0.75, R0)
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#define EXTDF(R0, R1, R2, R3, R4, R5) \
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EXTDF1(R0, R1) \
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EXTDF1(R0, R2) \
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EXTDF1(R0, R3) \
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EXTDF1(R0, R4) \
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EXTDF1(R0, R5) \
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EXTDFC1(R0) \
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EXTDFC1(R1) \
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EXTDFC1(R2) \
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EXTDFC1(R3) \
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EXTDFC1(R4) \
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EXTDFC1(R5)
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.code
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prolog
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/* simple sequence for easier disassembly reading and encoding check */
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movi %r0 w7f
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extr_c %r1 %r0
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beqi xc %r1 c7f
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calli @abort
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xc:
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movi %r0 w7f
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extr_uc %r1 %r0
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beqi xuc %r1 uc7f
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calli @abort
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xuc:
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movi %r0 w7f
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extr_s %r1 %r0
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beqi xs %r1 s7f
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calli @abort
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xs:
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movi %r0 w7f
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extr_us %r1 %r0
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beqi xus %r1 us7f
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calli @abort
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xus:
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#if __WORDSIZE == 64
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movi %r0 w7f
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extr_i %r1 %r0
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beqi xi %r1 i7f
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calli @abort
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xi:
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movi %r0 w7f
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extr_ui %r1 %r0
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beqi xui %r1 ui7f
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calli @abort
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xui:
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#endif
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movi %r0 -2
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extr_f %f0 %r0
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beqi_f xif %f0 -2
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calli @abort
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xif:
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movi %r0 32
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extr_d %f0 %r0
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beqi_d xid %f0 32
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calli @abort
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xid:
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movi_f %f0 -128
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truncr_f %r0 %f0
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beqi xfi %r0 -128
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calli @abort
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xfi:
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movi_d %f0 -128
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truncr_d %r0 %f0
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beqi xdi %r0 -128
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calli @abort
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xdi:
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#if __WORDSIZE == 64
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movi_f %f0 -128
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truncr_f_i %r0 %f0
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andi %r0 %r0 0xffffffff
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beqi yfi %r0 $(-128 & 0xffffffff)
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calli @abort
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yfi:
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movi_d %f0 -128
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truncr_d_i %r0 %f0
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andi %r0 %r0 0xffffffff
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beqi ydi %r0 $(-128 & 0xffffffff)
|
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calli @abort
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ydi:
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#endif
|
||||
movi_f %f0 0.5
|
||||
extr_f_d %f1 %f0
|
||||
beqi_d xfd %f1 0.5
|
||||
calli @abort
|
||||
xfd:
|
||||
movi_d %f0 0.5
|
||||
extr_d_f %f1 %f0
|
||||
beqi_f xdf %f1 0.5
|
||||
calli @abort
|
||||
xdf:
|
||||
|
||||
EXTII(v0, v1, v2, r0, r1, r2)
|
||||
EXIF(v0, v1, v2, r0, r1, r2, f0, f1, f2, f3, f4, f5)
|
||||
EXID(v0, v1, v2, r0, r1, r2, f0, f1, f2, f3, f4, f5)
|
||||
EXFI(v0, v1, v2, r0, r1, r2, f0, f1, f2, f3, f4, f5)
|
||||
#if __WORDSIZE == 64
|
||||
LEXFI(v0, v1, v2, r0, r1, r2, f0, f1, f2, f3, f4, f5)
|
||||
LEXDI(v0, v1, v2, r0, r1, r2, f0, f1, f2, f3, f4, f5)
|
||||
#endif
|
||||
EXDI(v0, v1, v2, r0, r1, r2, f0, f1, f2, f3, f4, f5)
|
||||
EXTFD(f0, f1, f2, f3, f4, f5)
|
||||
EXTDF(f0, f1, f2, f3, f4, f5)
|
||||
|
||||
// just to know did not abort
|
||||
prepare 1
|
||||
pushargi ok
|
||||
finishi @printf
|
||||
|
||||
ret
|
||||
epilog
|
||||
|
|
@ -378,7 +378,11 @@ static void ungtr_f(void); static void ungti_f(void);
|
|||
static void ltgtr_f(void); static void ltgti_f(void);
|
||||
static void ordr_f(void); static void ordi_f(void);
|
||||
static void unordr_f(void); static void unordi_f(void);
|
||||
static void truncr_f_i(void); static void truncr_f_l(void);
|
||||
static void truncr_f_i(void);
|
||||
#if __WORDSIZE == 64
|
||||
static void truncr_f_l(void);
|
||||
#endif
|
||||
static void truncr_f(void);
|
||||
static void extr_f(void); static void extr_d_f(void);
|
||||
static void movr_f(void); static void movi_f(void);
|
||||
static void ldr_f(void); static void ldi_f(void);
|
||||
|
|
@ -424,7 +428,11 @@ static void ungtr_d(void); static void ungti_d(void);
|
|||
static void ltgtr_d(void); static void ltgti_d(void);
|
||||
static void ordr_d(void); static void ordi_d(void);
|
||||
static void unordr_d(void); static void unordi_d(void);
|
||||
static void truncr_d_i(void); static void truncr_d_l(void);
|
||||
static void truncr_d_i(void);
|
||||
#if __WORDSIZE == 64
|
||||
static void truncr_d_l(void);
|
||||
#endif
|
||||
static void truncr_d(void);
|
||||
static void extr_d(void); static void extr_f_d(void);
|
||||
static void movr_d(void); static void movi_d(void);
|
||||
static void ldr_d(void); static void ldi_d(void);
|
||||
|
|
@ -661,7 +669,11 @@ static instr_t instr_vector[] = {
|
|||
entry(ltgtr_f), entry(ltgti_f),
|
||||
entry(ordr_f), entry(ordi_f),
|
||||
entry(unordr_f), entry(unordi_f),
|
||||
entry(truncr_f_i), entry(truncr_f_l),
|
||||
entry(truncr_f_i),
|
||||
#if __WORDSIZE == 64
|
||||
entry(truncr_f_l),
|
||||
#endif
|
||||
entry(truncr_f),
|
||||
entry(extr_f), entry(extr_d_f),
|
||||
entry(movr_f), entry(movi_f),
|
||||
entry(ldr_f), entry(ldi_f),
|
||||
|
|
@ -707,7 +719,11 @@ static instr_t instr_vector[] = {
|
|||
entry(ltgtr_d), entry(ltgti_d),
|
||||
entry(ordr_d), entry(ordi_d),
|
||||
entry(unordr_d), entry(unordi_d),
|
||||
entry(truncr_d_i), entry(truncr_d_l),
|
||||
entry(truncr_d_i),
|
||||
#if __WORDSIZE == 64
|
||||
entry(truncr_d_l),
|
||||
#endif
|
||||
entry(truncr_d),
|
||||
entry(extr_d), entry(extr_f_d),
|
||||
entry(movr_d), entry(movi_d),
|
||||
entry(ldr_d), entry(ldi_d),
|
||||
|
|
@ -1251,6 +1267,7 @@ movi(void)
|
|||
jit_gpr_t r0 = get_ireg();
|
||||
ch = skipws();
|
||||
switch (ch) {
|
||||
case '+': case '-':
|
||||
case '0' ... '9':
|
||||
ungetch(ch);
|
||||
value = (void *)(long)get_uint(skip_none);
|
||||
|
|
@ -1378,7 +1395,11 @@ entry_ir_fr_fr(ungtr_f) entry_ir_fr_fm(ungti_f)
|
|||
entry_ir_fr_fr(ltgtr_f) entry_ir_fr_fm(ltgti_f)
|
||||
entry_ir_fr_fr(ordr_f) entry_ir_fr_fm(ordi_f)
|
||||
entry_ir_fr_fr(unordr_f) entry_ir_fr_fm(unordi_f)
|
||||
entry_ir_fr(truncr_f_i) entry_ir_fr(truncr_f_l)
|
||||
entry_ir_fr(truncr_f_i)
|
||||
#if __WORDSIZE == 64
|
||||
entry_ir_fr(truncr_f_l)
|
||||
#endif
|
||||
entry_ir_fr(truncr_f)
|
||||
entry_fr_ir(extr_f) entry_fr_fr(extr_d_f)
|
||||
entry_fr_fr(movr_f) entry_fr_fm(movi_f)
|
||||
entry_fr_ir(ldr_f) entry_fr_pm(ldi_f)
|
||||
|
|
@ -1424,7 +1445,11 @@ entry_ir_fr_fr(ungtr_d) entry_ir_fr_fm(ungti_d)
|
|||
entry_ir_fr_fr(ltgtr_d) entry_ir_fr_fm(ltgti_d)
|
||||
entry_ir_fr_fr(ordr_d) entry_ir_fr_fm(ordi_d)
|
||||
entry_ir_fr_fr(unordr_d) entry_ir_fr_fm(unordi_d)
|
||||
entry_ir_fr(truncr_d_i) entry_ir_fr(truncr_d_l)
|
||||
entry_ir_fr(truncr_d_i)
|
||||
#if __WORDSIZE == 64
|
||||
entry_ir_fr(truncr_d_l)
|
||||
#endif
|
||||
entry_ir_fr(truncr_d)
|
||||
entry_fr_ir(extr_d) entry_fr_fr(extr_f_d)
|
||||
entry_fr_fr(movr_d) entry_fr_fm(movi_d)
|
||||
entry_fr_ir(ldr_d) entry_fr_pm(ldi_d)
|
||||
|
|
|
|||
|
|
@ -497,7 +497,7 @@ typedef enum {
|
|||
|
||||
#define jit_truncr_f_i(u,v) jit_new_node_ww(jit_code_truncr_f_i,u,v)
|
||||
jit_code_truncr_f_i,
|
||||
#if __WODSIZE == 32
|
||||
#if __WORDSIZE == 32
|
||||
# define jit_truncr_f(u,v) jit_truncr_f_i(u,v)
|
||||
#else
|
||||
# define jit_truncr_f(u,v) jit_truncr_f_l(u,v)
|
||||
|
|
@ -642,14 +642,14 @@ typedef enum {
|
|||
|
||||
#define jit_truncr_d_i(u,v) jit_new_node_ww(jit_code_truncr_d_i,u,v)
|
||||
jit_code_truncr_d_i,
|
||||
#if __WODSIZE == 32
|
||||
#if __WORDSIZE == 32
|
||||
# define jit_truncr_d(u,v) jit_truncr_d_i(u,v)
|
||||
#else
|
||||
# define jit_truncr_d(u,v) jit_truncr_d_l(u,v)
|
||||
# define jit_truncr_d_l(u,v) jit_new_node_ww(jit_code_truncr_d_l,u,v)
|
||||
#endif
|
||||
jit_code_truncr_d_l,
|
||||
#define jit_extr_d(u,v) jit_new_node_ww(jit_code_extr_f,u,v)
|
||||
#define jit_extr_d(u,v) jit_new_node_ww(jit_code_extr_d,u,v)
|
||||
#define jit_extr_f_d(u,v) jit_new_node_ww(jit_code_extr_f_d,u,v)
|
||||
jit_code_extr_d, jit_code_extr_f_d,
|
||||
#define jit_movr_d(u,v) jit_new_node_ww(jit_code_movr_d,u,v)
|
||||
|
|
|
|||
|
|
@ -159,16 +159,16 @@ extern unsigned __aeabi_uidivmod(unsigned, unsigned);
|
|||
# define THUMB2_REV16 0xfa90f090
|
||||
# define ARM_SXTB 0x06af0070
|
||||
# define THUMB_SXTB 0xb240
|
||||
# define THUMB2_SXTB 0xfa4ff080
|
||||
# define THUMB2_SXTB 0xfa40f080
|
||||
# define ARM_UXTB 0x06ef0070
|
||||
# define THUMB_UXTB 0xb2c0
|
||||
# define THUMB2_UXTB 0xfa5ff080
|
||||
# define THUMB2_UXTB 0xfa50f080
|
||||
# define ARM_SXTH 0x06bf0070
|
||||
# define THUMB_SXTH 0xb200
|
||||
# define THUMB2_SXTH 0xfa0f0080
|
||||
# define THUMB2_SXTH 0xfa00f080
|
||||
# define ARM_UXTH 0x06ff0070
|
||||
# define THUMB_UXTH 0xb280
|
||||
# define THUMB2_UXTH 0xfa1ff080
|
||||
# define THUMB2_UXTH 0xfa10f080
|
||||
# define ARM_XTR8 0x00000400 /* ?xt? rotate 8 bits */
|
||||
# define ARM_XTR16 0x00000800 /* ?xt? rotate 16 bits */
|
||||
# define ARM_XTR24 0x00000c00 /* ?xt? rotate 24 bits */
|
||||
|
|
|
|||
|
|
@ -1348,7 +1348,7 @@ _andi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|||
reg = jit_get_reg(jit_class_gpr);
|
||||
movi(rn(reg), i0);
|
||||
iandr(r0, rn(reg));
|
||||
jit_unget_reg(r0);
|
||||
jit_unget_reg(reg);
|
||||
}
|
||||
}
|
||||
else {
|
||||
|
|
@ -1856,7 +1856,7 @@ _movcr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
|
|||
{
|
||||
rex(0, 1, r0, _NOREG, r1);
|
||||
ic(0x0f);
|
||||
ic(0xbe);
|
||||
ic(0xb6);
|
||||
mrm(0x03, r7(r0), r7(r1));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -69,9 +69,12 @@ static void _ssexi(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t)
|
|||
# if __WORDSIZE == 64
|
||||
# define sse_truncr_f_l(r0, r1) sselxr(0xf3, X86_SSE_CVTTSI, r0, r1)
|
||||
# define sse_truncr_d_l(r0, r1) sselxr(0xf2, X86_SSE_CVTTSI, r0, r1)
|
||||
# define sse_extr_f(r0, r1) sselxr(0xf3, X86_SSE_CVTIS, r0, r1)
|
||||
# define sse_extr_d(r0, r1) sselxr(0xf2, X86_SSE_CVTIS, r0, r1)
|
||||
# else
|
||||
# define sse_extr_f(r0, r1) ssexr(0xf3, X86_SSE_CVTIS, r0, r1)
|
||||
# define sse_extr_d(r0, r1) ssexr(0xf2, X86_SSE_CVTIS, r0, r1)
|
||||
# endif
|
||||
# define sse_extr_f(r0, r1) sselxr(0xf3, X86_SSE_CVTIS, r0, r1)
|
||||
# define sse_extr_d(r0, r1) sselxr(0xf2, X86_SSE_CVTIS, r0, r1)
|
||||
# define sse_extr_f_d(r0, r1) ssexr(0xf3, X86_SSE_CVTSD, r0, r1)
|
||||
# define sse_extr_d_f(r0, r1) ssexr(0xf2, X86_SSE_CVTSD, r0, r1)
|
||||
# define ucomissr(r0,r1) sser(X86_SSE_UCOMI,r0,r1)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue