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Add new test case for int/float to/from conversion.
* check/Makefile.am, check/cvt.ok, check/cvt.tst: Add new "cvt" test case to test conversion from/to int/float types. * check/lightning.c: Only define truncr_{f,d}_l in 64 bit mode. * include/lightning.h: Correct typo that caused it to define jit_truncr_{f,d}_l in 32 bit mode. * lib/jit_arm-cpu.c: Avoid assertion failure in the signed/unsigned extend opcodes generation as it shares an interface for 3 argument opcode generation. * lib/jit_x86-cpu.c: Correct wrong argument passed to jit_unget_reg in the andi implementation and wrong byte unsigned extend code generation. * lib/jit_x86-sse.c: Correct conversion from "word" to float or double as is dependent on wordsize.
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9 changed files with 449 additions and 18 deletions
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@ -159,16 +159,16 @@ extern unsigned __aeabi_uidivmod(unsigned, unsigned);
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# define THUMB2_REV16 0xfa90f090
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# define ARM_SXTB 0x06af0070
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# define THUMB_SXTB 0xb240
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# define THUMB2_SXTB 0xfa4ff080
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# define THUMB2_SXTB 0xfa40f080
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# define ARM_UXTB 0x06ef0070
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# define THUMB_UXTB 0xb2c0
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# define THUMB2_UXTB 0xfa5ff080
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# define THUMB2_UXTB 0xfa50f080
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# define ARM_SXTH 0x06bf0070
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# define THUMB_SXTH 0xb200
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# define THUMB2_SXTH 0xfa0f0080
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# define THUMB2_SXTH 0xfa00f080
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# define ARM_UXTH 0x06ff0070
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# define THUMB_UXTH 0xb280
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# define THUMB2_UXTH 0xfa1ff080
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# define THUMB2_UXTH 0xfa10f080
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# define ARM_XTR8 0x00000400 /* ?xt? rotate 8 bits */
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# define ARM_XTR16 0x00000800 /* ?xt? rotate 16 bits */
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# define ARM_XTR24 0x00000c00 /* ?xt? rotate 24 bits */
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@ -1348,7 +1348,7 @@ _andi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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reg = jit_get_reg(jit_class_gpr);
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movi(rn(reg), i0);
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iandr(r0, rn(reg));
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jit_unget_reg(r0);
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jit_unget_reg(reg);
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}
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}
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else {
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@ -1856,7 +1856,7 @@ _movcr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
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{
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rex(0, 1, r0, _NOREG, r1);
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ic(0x0f);
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ic(0xbe);
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ic(0xb6);
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mrm(0x03, r7(r0), r7(r1));
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}
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@ -69,9 +69,12 @@ static void _ssexi(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t)
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# if __WORDSIZE == 64
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# define sse_truncr_f_l(r0, r1) sselxr(0xf3, X86_SSE_CVTTSI, r0, r1)
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# define sse_truncr_d_l(r0, r1) sselxr(0xf2, X86_SSE_CVTTSI, r0, r1)
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# define sse_extr_f(r0, r1) sselxr(0xf3, X86_SSE_CVTIS, r0, r1)
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# define sse_extr_d(r0, r1) sselxr(0xf2, X86_SSE_CVTIS, r0, r1)
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# else
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# define sse_extr_f(r0, r1) ssexr(0xf3, X86_SSE_CVTIS, r0, r1)
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# define sse_extr_d(r0, r1) ssexr(0xf2, X86_SSE_CVTIS, r0, r1)
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# endif
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# define sse_extr_f(r0, r1) sselxr(0xf3, X86_SSE_CVTIS, r0, r1)
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# define sse_extr_d(r0, r1) sselxr(0xf2, X86_SSE_CVTIS, r0, r1)
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# define sse_extr_f_d(r0, r1) ssexr(0xf3, X86_SSE_CVTSD, r0, r1)
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# define sse_extr_d_f(r0, r1) ssexr(0xf2, X86_SSE_CVTSD, r0, r1)
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# define ucomissr(r0,r1) sser(X86_SSE_UCOMI,r0,r1)
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