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Simplify register representation

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Instead of JIT_R0 being a wrapped index into a table which then gives
the regno and class, just have JIT_R0 be the wrapped regno and class.
This commit is contained in:
Andy Wingo 2019-04-25 17:03:46 +02:00
parent b34e230413
commit ddd66a2f34
6 changed files with 206 additions and 342 deletions
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4
lightening/x86-cpu.c
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@ -272,9 +272,9 @@ get_temp_gpr(jit_state_t *_jit)
_jit->temp_gpr_saved = 1;
#if __X32
pushr(_jit, _RBP_REGNO);
return JIT_GPR(_RBP);
return _RBP;
#else
return JIT_GPR(_R8);
return _R8;
#endif
}