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https://git.savannah.gnu.org/git/guile.git
synced 2025-05-02 13:00:26 +02:00
Simplify register representation
Instead of JIT_R0 being a wrapped index into a table which then gives the regno and class, just have JIT_R0 be the wrapped regno and class.
This commit is contained in:
Andy Wingo
parent
b34e230413
commit
ddd66a2f34
6 changed files with 206 additions and 342 deletions
11
lightening.h
11
lightening.h
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@ -95,18 +95,7 @@ typedef struct jit_reloc
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# include "lightening/alpha.h"
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# include "lightening/alpha.h"
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#endif
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#endif
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#define JIT_R(index) JIT_GPR(jit_r(index))
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#define JIT_V(index) JIT_GPR(jit_v(index))
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#define JIT_F(index) JIT_FPR(jit_f(index))
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#define JIT_R_NUM jit_r_num()
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#define JIT_V_NUM jit_v_num()
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#define JIT_F_NUM jit_f_num()
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#define jit_class_chk 0x02000000 /* just checking */
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#define jit_class_arg 0x08000000 /* argument register */
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#define jit_class_sav 0x10000000 /* callee save */
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#define jit_class_sav 0x10000000 /* callee save */
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#define jit_class_gpr 0x20000000 /* general purpose */
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#define jit_class_fpr 0x40000000 /* float */
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#define jit_class(bits) ((bits) & 0xffff0000)
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#define jit_class(bits) ((bits) & 0xffff0000)
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#define jit_regno(bits) ((bits) & 0x00007fff)
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#define jit_regno(bits) ((bits) & 0x00007fff)
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@ -35,89 +35,73 @@
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# define maybe_unused /**/
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# define maybe_unused /**/
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#endif
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#endif
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#define _NOREG 0xffff
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#define rc(value) jit_class_##value
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#define rc(value) jit_class_##value
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#define rn(reg) (jit_regno(_rvs[jit_regno(reg.bits)].spec))
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#define rn(reg) jit_regno(reg.bits)
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#if defined(__i386__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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# define JIT_SP JIT_GPR(_RSP)
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# define JIT_RET _RAX
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# define JIT_RET JIT_GPR(_RAX)
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# if __X32
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# if __X32
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# define JIT_FRET JIT_FPR(_ST0)
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# define JIT_FRET _ST0
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# else
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# else
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# if __CYGWIN__
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# if __CYGWIN__
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# define JIT_RA0 JIT_GPR(_RCX)
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# define JIT_RA0 _RCX
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# else
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# else
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# define JIT_RA0 JIT_GPR(_RDI)
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# define JIT_RA0 _RDI
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# endif
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# endif
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# define JIT_FA0 JIT_FPR(_XMM0)
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# define JIT_FA0 _XMM0
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# define JIT_FRET JIT_FPR(_XMM0)
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# define JIT_FRET _XMM0
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# endif
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# endif
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#elif defined(__mips__)
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#elif defined(__mips__)
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# define JIT_RA0 JIT_GPR(_A0)
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# define JIT_RA0 _A0
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# define JIT_FA0 JIT_FPR(_F12)
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# define JIT_FA0 _F12
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# define JIT_SP JIT_GPR(_SP)
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# define JIT_SP _SP
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# define JIT_RET JIT_GPR(_V0)
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# define JIT_RET _V0
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# define JIT_FRET JIT_FPR(_F0)
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# define JIT_FRET _F0
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#elif defined(__arm__)
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#elif defined(__arm__)
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# define JIT_RA0 JIT_GPR(_R0)
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# define JIT_RA0 _R0
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# define JIT_FA0 JIT_FPR(_D0)
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# define JIT_FA0 _D0
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# define JIT_SP JIT_GPR(_R13)
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# define JIT_SP _R13
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# define JIT_RET JIT_GPR(_R0)
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# define JIT_RET _R0
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# if defined(__ARM_PCS_VFP)
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# if defined(__ARM_PCS_VFP)
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# define JIT_FRET JIT_FPR(_D0)
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# define JIT_FRET _D0
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# else
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# else
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# define JIT_FRET JIT_FPR(_R0)
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# define JIT_FRET _R0
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# endif
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# endif
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#elif defined(__ppc__) || defined(__powerpc__)
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#elif defined(__ppc__) || defined(__powerpc__)
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# define JIT_RA0 JIT_GPR(_R3)
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# define JIT_RA0 _R3
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# define JIT_FA0 JIT_FPR(_F1)
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# define JIT_FA0 _F1
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# define JIT_SP JIT_GPR(_R1)
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# define JIT_SP _R1
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# define JIT_RET JIT_GPR(_R3)
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# define JIT_RET _R3
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# define JIT_FRET JIT_FPR(_F1)
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# define JIT_FRET _F1
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#elif defined(__sparc__)
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#elif defined(__sparc__)
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# define JIT_SP JIT_GPR(_SP)
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# define JIT_SP _SP
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# define JIT_RET JIT_GPR(_I0)
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# define JIT_RET _I0
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# define JIT_FRET JIT_FPR(_F0)
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# define JIT_FRET _F0
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#elif defined(__ia64__)
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#elif defined(__ia64__)
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# define JIT_SP JIT_GPR(_R12)
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# define JIT_SP _R12
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# define JIT_RET JIT_GPR(_R8)
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# define JIT_RET _R8
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# define JIT_FRET JIT_FPR(_F8)
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# define JIT_FRET _F8
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#elif defined(__hppa__)
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#elif defined(__hppa__)
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# define JIT_SP JIT_GPR(_R30)
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# define JIT_SP _R30
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# define JIT_RET JIT_GPR(_R28)
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# define JIT_RET _R28
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# define JIT_FRET JIT_FPR(_F4)
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# define JIT_FRET _F4
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#elif defined(__aarch64__)
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#elif defined(__aarch64__)
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# define JIT_RA0 JIT_GPR(_R0)
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# define JIT_RA0 _R0
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# define JIT_FA0 JIT_FPR(_V0)
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# define JIT_FA0 _V0
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# define JIT_SP JIT_GPR(_SP)
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# define JIT_SP _SP
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# define JIT_RET JIT_GPR(_R0)
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# define JIT_RET _R0
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# define JIT_FRET JIT_FPR(_V0)
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# define JIT_FRET _V0
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#elif defined(__s390__) || defined(__s390x__)
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#elif defined(__s390__) || defined(__s390x__)
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# define JIT_SP JIT_GPR(_R15)
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# define JIT_SP _R15
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# define JIT_RET JIT_GPR(_R2)
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# define JIT_RET _R2
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# define JIT_FRET JIT_FPR(_F0)
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# define JIT_FRET _F0
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#elif defined(__alpha__)
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#elif defined(__alpha__)
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# define JIT_SP JIT_GPR(_SP)
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# define JIT_SP _SP
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# define JIT_RET JIT_GPR(_V0)
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# define JIT_RET _V0
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# define JIT_FRET JIT_FPR(_F0)
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# define JIT_FRET _F0
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#endif
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#endif
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/*
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* Private jit_class bitmasks
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*/
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#define jit_class_named 0x00400000 /* hit must be the named reg */
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#define jit_class_nospill 0x00800000 /* hint to fail if need spill */
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#define jit_class_sft 0x01000000 /* not a hardware register */
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#define jit_class_rg8 0x04000000 /* x86 8 bits */
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#define jit_class_xpr 0x80000000 /* float / vector */
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/* Used on sparc64 where %f0-%f31 can be encode for single float
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* but %f32 to %f62 only as double precision */
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#define jit_class_sng 0x10000000 /* Single precision float */
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#define jit_class_dbl 0x20000000 /* Only double precision float */
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#define jit_regno_patch 0x00008000 /* this is a register
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* returned by a "user" call
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* to jit_get_reg() */
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union jit_pc
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union jit_pc
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{
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{
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uint8_t *uc;
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uint8_t *uc;
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@ -146,20 +130,6 @@ enum jit_reloc_flags
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JIT_RELOC_CAN_SHORTEN = 1<<0
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JIT_RELOC_CAN_SHORTEN = 1<<0
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};
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};
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struct jit_register
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{
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jit_reg_t spec;
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char *name;
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};
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typedef struct jit_register jit_register_t;
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static const jit_register_t _rvs[];
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#define jit_regload_reload 0 /* convert to reload */
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#define jit_regload_delete 1 /* just remove node */
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#define jit_regload_isdead 2 /* delete and unset live bit */
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#define ASSERT(x) do { if (!(x)) abort(); } while (0)
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#define ASSERT(x) do { if (!(x)) abort(); } while (0)
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#if defined(__GNUC__)
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#if defined(__GNUC__)
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# define UNLIKELY(exprn) __builtin_expect(exprn, 0)
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# define UNLIKELY(exprn) __builtin_expect(exprn, 0)
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@ -406,13 +376,13 @@ jit_patch_there(jit_state_t* _jit, jit_reloc_t reloc, jit_pointer_t addr)
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jit_bool_t
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jit_bool_t
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jit_gpr_is_callee_save (jit_state_t *_jit, jit_gpr_t reg)
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jit_gpr_is_callee_save (jit_state_t *_jit, jit_gpr_t reg)
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{
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{
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return jit_class(_rvs[jit_regno(reg.bits)].spec) & jit_class_sav;
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return jit_class(reg.bits) & jit_class_sav;
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}
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}
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jit_bool_t
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jit_bool_t
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jit_fpr_is_callee_save (jit_state_t *_jit, jit_fpr_t reg)
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jit_fpr_is_callee_save (jit_state_t *_jit, jit_fpr_t reg)
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{
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{
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return jit_class(_rvs[jit_regno(reg.bits)].spec) & jit_class_sav;
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return jit_class(reg.bits) & jit_class_sav;
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}
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}
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#if defined(__i386__) || defined(__x86_64__)
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#if defined(__i386__) || defined(__x86_64__)
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@ -272,9 +272,9 @@ get_temp_gpr(jit_state_t *_jit)
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_jit->temp_gpr_saved = 1;
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_jit->temp_gpr_saved = 1;
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#if __X32
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#if __X32
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pushr(_jit, _RBP_REGNO);
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pushr(_jit, _RBP_REGNO);
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return JIT_GPR(_RBP);
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return _RBP;
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#else
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#else
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return JIT_GPR(_R8);
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return _R8;
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#endif
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#endif
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}
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}
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@ -193,7 +193,7 @@ get_temp_xpr(jit_state_t *_jit)
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/* Reserve XMM7 for the JIT. */
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/* Reserve XMM7 for the JIT. */
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ASSERT(!_jit->temp_fpr_saved);
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ASSERT(!_jit->temp_fpr_saved);
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_jit->temp_fpr_saved = 1;
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_jit->temp_fpr_saved = 1;
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return JIT_FPR(_XMM7);
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return _XMM7;
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}
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}
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static void
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static void
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137
lightening/x86.c
137
lightening/x86.c
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@ -17,45 +17,6 @@
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* Paulo Cesar Pereira de Andrade
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* Paulo Cesar Pereira de Andrade
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*/
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*/
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#if __X32
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# define jit_arg_reg_p(i) 0
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# define jit_arg_f_reg_p(i) 0
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# define stack_framesize 20
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# define stack_adjust 12
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# define CVT_OFFSET -12
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# define REAL_WORDSIZE 4
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# define va_gp_increment 4
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# define va_fp_increment 8
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#else
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# if __CYGWIN__
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# define jit_arg_reg_p(i) ((i) >= 0 && (i) < 4)
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# define jit_arg_f_reg_p(i) jit_arg_reg_p(i)
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# define stack_framesize 152
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# define va_fp_increment 8
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# else
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# define jit_arg_reg_p(i) ((i) >= 0 && (i) < 6)
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# define jit_arg_f_reg_p(i) ((i) >= 0 && (i) < 8)
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# define stack_framesize 56
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# define first_gp_argument rdi
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# define first_gp_offset offsetof(jit_va_list_t, rdi)
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# define first_gp_from_offset(gp) ((gp) / 8)
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# define last_gp_argument r9
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# define va_gp_max_offset \
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(offsetof(jit_va_list_t, r9) - offsetof(jit_va_list_t, rdi) + 8)
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# define first_fp_argument xmm0
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# define first_fp_offset offsetof(jit_va_list_t, xmm0)
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# define last_fp_argument xmm7
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# define va_fp_max_offset \
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(offsetof(jit_va_list_t, xmm7) - offsetof(jit_va_list_t, rdi) + 16)
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# define va_fp_increment 16
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# define first_fp_from_offset(fp) (((fp) - va_gp_max_offset) / 16)
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# endif
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# define va_gp_increment 8
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# define stack_adjust 8
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# define CVT_OFFSET -8
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# define REAL_WORDSIZE 8
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#endif
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/*
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/*
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* Types
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* Types
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*/
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*/
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@ -94,94 +55,6 @@ typedef struct jit_va_list {
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#endif
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#endif
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jit_cpu_t jit_cpu;
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jit_cpu_t jit_cpu;
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static const jit_register_t _rvs[] = {
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#if __X32
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{ rc(gpr) | rc(rg8) | 0, "%eax" },
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{ rc(gpr) | rc(rg8) | 1, "%ecx" },
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{ rc(gpr) | rc(rg8) | 2, "%edx" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 3, "%ebx" },
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{ rc(sav) | rc(gpr) | 6, "%esi" },
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{ rc(sav) | rc(gpr) | 7, "%edi" },
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{ rc(sav) | 4, "%esp" },
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{ rc(sav) | 5, "%ebp" },
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{ rc(xpr) | rc(fpr) | 0, "%xmm0" },
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{ rc(xpr) | rc(fpr) | 1, "%xmm1" },
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{ rc(xpr) | rc(fpr) | 2, "%xmm2" },
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{ rc(xpr) | rc(fpr) | 3, "%xmm3" },
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{ rc(xpr) | rc(fpr) | 4, "%xmm4" },
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{ rc(xpr) | rc(fpr) | 5, "%xmm5" },
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{ rc(xpr) | rc(fpr) | 6, "%xmm6" },
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{ rc(xpr) | rc(fpr) | 7, "%xmm7" },
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#elif __CYGWIN__
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{ rc(gpr) | rc(rg8) | 0, "%rax" },
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{ rc(gpr) | rc(rg8) | rc(rg8) | 10, "%r10" },
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{ rc(gpr) | rc(rg8) | rc(rg8) | 11, "%r11" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 3, "%rbx" },
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{ rc(sav) | rc(gpr) | 7, "%rdi" },
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{ rc(sav) | rc(gpr) | 6, "%rsi" },
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{ rc(sav) | rc(gpr) | 12, "%r12" },
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{ rc(sav) | rc(gpr) | 13, "%r13" },
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{ rc(sav) | rc(gpr) | 14, "%r14" },
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{ rc(sav) | rc(gpr) | 15, "%r15" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 9, "%r9" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 8, "%r8" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 2, "%rdx" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 1, "%rcx" },
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{ rc(sav) | 4, "%rsp" },
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{ rc(sav) | 5, "%rbp" },
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{ rc(xpr) | rc(fpr) | 4, "%xmm4" },
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{ rc(xpr) | rc(fpr) | 5, "%xmm5" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 6, "%xmm6" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 7, "%xmm7" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 8, "%xmm8" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 9, "%xmm9" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 10, "%xmm10" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 11, "%xmm11" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 12, "%xmm12" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 13, "%xmm13" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 14, "%xmm14" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 15, "%xmm15" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 3, "%xmm3" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 2, "%xmm2" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 1, "%xmm1" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 0, "%xmm0" },
|
|
||||||
#else
|
|
||||||
/* %rax is a pseudo flag argument for varargs functions */
|
|
||||||
{ rc(arg) | rc(gpr) | rc(rg8) | 0, "%rax" },
|
|
||||||
{ rc(gpr) | rc(rg8) | 10, "%r10" },
|
|
||||||
{ rc(gpr) | rc(rg8) | 11, "%r11" },
|
|
||||||
{ rc(gpr) | rc(rg8) | 12, "%r12" },
|
|
||||||
{ rc(sav) | rc(rg8) | rc(gpr) | 3, "%rbx" },
|
|
||||||
{ rc(sav) | rc(rg8) | rc(gpr) | 13, "%r13" },
|
|
||||||
{ rc(sav) | rc(rg8) | rc(gpr) | 14, "%r14" },
|
|
||||||
{ rc(sav) | rc(rg8) | rc(gpr) | 15, "%r15" },
|
|
||||||
{ rc(arg) | rc(rg8) | rc(gpr) | 9, "%r9" },
|
|
||||||
{ rc(arg) | rc(rg8) | rc(gpr) | 8, "%r8" },
|
|
||||||
{ rc(arg) | rc(rg8) | rc(gpr) | 1, "%rcx" },
|
|
||||||
{ rc(arg) | rc(rg8) | rc(gpr) | 2, "%rdx" },
|
|
||||||
{ rc(arg) | rc(rg8) | rc(gpr) | 6, "%rsi" },
|
|
||||||
{ rc(arg) | rc(rg8) | rc(gpr) | 7, "%rdi" },
|
|
||||||
{ rc(sav) | 4, "%rsp" },
|
|
||||||
{ rc(sav) | 5, "%rbp" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 8, "%xmm8" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 9, "%xmm9" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 10, "%xmm10" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 11, "%xmm11" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 12, "%xmm12" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 13, "%xmm13" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 14, "%xmm14" },
|
|
||||||
{ rc(xpr) | rc(fpr) | 15, "%xmm15" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 7, "%xmm7" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 6, "%xmm6" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 5, "%xmm5" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 4, "%xmm4" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 3, "%xmm3" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 2, "%xmm2" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 1, "%xmm1" },
|
|
||||||
{ rc(xpr) | rc(arg) | rc(fpr) | 0, "%xmm0" },
|
|
||||||
#endif
|
|
||||||
{ _NOREG, "<none>" },
|
|
||||||
};
|
|
||||||
|
|
||||||
#include "x86-cpu.c"
|
#include "x86-cpu.c"
|
||||||
#include "x86-sse.c"
|
#include "x86-sse.c"
|
||||||
|
|
@ -800,9 +673,9 @@ static const jit_gpr_t abi_gpr_args[] = {
|
||||||
#if __X32
|
#if __X32
|
||||||
/* No GPRs in args. */
|
/* No GPRs in args. */
|
||||||
#elif __CYGWIN__
|
#elif __CYGWIN__
|
||||||
JIT_GPR(_RCX), JIT_GPR(_RDX), JIT_GPR(_R8), JIT_GPR(_R9)
|
_RCX, _RDX, _R8, _R9
|
||||||
#else
|
#else
|
||||||
JIT_GPR(_RDI), JIT_GPR(_RSI), JIT_GPR(_RDX), JIT_GPR(_RCX), JIT_GPR(_R8), JIT_GPR(_R9)
|
_RDI, _RSI, _RDX, _RCX, _R8, _R9
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -810,9 +683,9 @@ static const jit_fpr_t abi_fpr_args[] = {
|
||||||
#if __X32
|
#if __X32
|
||||||
/* No FPRs in args. */
|
/* No FPRs in args. */
|
||||||
#elif __CYGWIN__
|
#elif __CYGWIN__
|
||||||
JIT_FPR(_XMM0), JIT_FPR(_XMM1), JIT_FPR(_XMM2), JIT_FPR(_XMM3)
|
_XMM0, _XMM1, _XMM2, _XMM3
|
||||||
#else
|
#else
|
||||||
JIT_FPR(_XMM0), JIT_FPR(_XMM1), JIT_FPR(_XMM2), JIT_FPR(_XMM3), JIT_FPR(_XMM4), JIT_FPR(_XMM5), JIT_FPR(_XMM6), JIT_FPR(_XMM7)
|
_XMM0, _XMM1, _XMM2, _XMM3, _XMM4, _XMM5, _XMM6, _XMM7
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -890,7 +763,7 @@ next_abi_arg(struct abi_arg_iterator *iter, jit_operand_t *arg)
|
||||||
iter->gpr_idx++;
|
iter->gpr_idx++;
|
||||||
#endif
|
#endif
|
||||||
} else {
|
} else {
|
||||||
*arg = jit_operand_mem (abi, JIT_GPR(_RSP), iter->stack_size);
|
*arg = jit_operand_mem (abi, JIT_SP, iter->stack_size);
|
||||||
size_t bytes = jit_operand_abi_sizeof (abi);
|
size_t bytes = jit_operand_abi_sizeof (abi);
|
||||||
iter->stack_size += round_size_up_to_words (bytes);
|
iter->stack_size += round_size_up_to_words (bytes);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
272
lightening/x86.h
272
lightening/x86.h
|
|
@ -44,129 +44,161 @@
|
||||||
# define __X32 0
|
# define __X32 0
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define JIT_FP JIT_GPR(_RBP)
|
|
||||||
typedef enum {
|
|
||||||
#if __X32
|
#if __X32
|
||||||
# define jit_r(i) (_RAX + (i))
|
# define _RAX JIT_GPR(0)
|
||||||
# define jit_r_num() 3
|
# define _RCX JIT_GPR(1)
|
||||||
# define jit_v(i) (_RBX + (i))
|
# define _RDX JIT_GPR(2)
|
||||||
# define jit_v_num() 3
|
# define _RBX JIT_GPR(3 | jit_class_sav)
|
||||||
# define jit_f(i) (jit_cpu.sse2 ? _XMM0 + (i) : _ST0 + (i))
|
# define _RSP JIT_GPR(4 | jit_class_sav)
|
||||||
# define jit_f_num() (jit_cpu.sse2 ? 8 : 6)
|
# define _RBP JIT_GPR(5 | jit_class_sav)
|
||||||
# define JIT_R0 JIT_GPR(_RAX)
|
# define _RSI JIT_GPR(6 | jit_class_sav)
|
||||||
# define JIT_R1 JIT_GPR(_RCX)
|
# define _RDI JIT_GPR(7 | jit_class_sav)
|
||||||
# define JIT_R2 JIT_GPR(_RDX)
|
# define _XMM0 JIT_FPR(0)
|
||||||
_RAX, _RCX, _RDX,
|
# define _XMM1 JIT_FPR(1)
|
||||||
# define JIT_V0 JIT_GPR(_RBX)
|
# define _XMM2 JIT_FPR(2)
|
||||||
# define JIT_V1 JIT_GPR(_RSI)
|
# define _XMM3 JIT_FPR(3)
|
||||||
# define JIT_V2 JIT_GPR(_RDI)
|
# define _XMM4 JIT_FPR(4)
|
||||||
_RBX, _RSI, _RDI,
|
# define _XMM5 JIT_FPR(5)
|
||||||
_RSP, _RBP,
|
# define _XMM6 JIT_FPR(6)
|
||||||
# define JIT_F0 JIT_FPR(_XMM0)
|
# define _XMM7 JIT_FPR(7)
|
||||||
# define JIT_F1 JIT_FPR(_XMM1)
|
#elif __CYGWIN__
|
||||||
# define JIT_F2 JIT_FPR(_XMM2)
|
# define _RAX JIT_GPR(0)
|
||||||
# define JIT_F3 JIT_FPR(_XMM3)
|
# define _RCX JIT_GPR(1)
|
||||||
# define JIT_F4 JIT_FPR(_XMM4)
|
# define _RDX JIT_GPR(2)
|
||||||
# define JIT_F5 JIT_FPR(_XMM5)
|
# define _RBX JIT_GPR(3 | jit_class_sav)
|
||||||
# define JIT_F6 JIT_FPR(_XMM6)
|
# define _RSP JIT_GPR(4 | jit_class_sav)
|
||||||
_XMM0, _XMM1, _XMM2, _XMM3, _XMM4, _XMM5, _XMM6, _XMM7,
|
# define _RBP JIT_GPR(5 | jit_class_sav)
|
||||||
# define jit_sse_reg_p(reg) ((reg) >= _XMM0 && (reg) <= _XMM7)
|
# define _RSI JIT_GPR(6 | jit_class_sav)
|
||||||
|
# define _RDI JIT_GPR(7 | jit_class_sav)
|
||||||
|
# define _R8 JIT_GPR(8)
|
||||||
|
# define _R9 JIT_GPR(9)
|
||||||
|
# define _R10 JIT_GPR(10)
|
||||||
|
# define _R11 JIT_GPR(11)
|
||||||
|
# define _R12 JIT_GPR(12 | jit_class_sav)
|
||||||
|
# define _R13 JIT_GPR(13 | jit_class_sav)
|
||||||
|
# define _R14 JIT_GPR(14 | jit_class_sav)
|
||||||
|
# define _R15 JIT_GPR(15 | jit_class_sav)
|
||||||
|
# define _XMM0 JIT_FPR(0)
|
||||||
|
# define _XMM1 JIT_FPR(1)
|
||||||
|
# define _XMM2 JIT_FPR(2)
|
||||||
|
# define _XMM3 JIT_FPR(3)
|
||||||
|
# define _XMM4 JIT_FPR(4)
|
||||||
|
# define _XMM5 JIT_FPR(5)
|
||||||
|
# define _XMM6 JIT_FPR(6 | jit_class_sav)
|
||||||
|
# define _XMM7 JIT_FPR(7 | jit_class_sav)
|
||||||
|
# define _XMM8 JIT_FPR(8 | jit_class_sav)
|
||||||
|
# define _XMM9 JIT_FPR(9 | jit_class_sav)
|
||||||
|
# define _XMM10 JIT_FPR(10 | jit_class_sav)
|
||||||
|
# define _XMM11 JIT_FPR(11 | jit_class_sav)
|
||||||
|
# define _XMM12 JIT_FPR(12 | jit_class_sav)
|
||||||
|
# define _XMM13 JIT_FPR(13 | jit_class_sav)
|
||||||
|
# define _XMM14 JIT_FPR(14 | jit_class_sav)
|
||||||
|
# define _XMM15 JIT_FPR(15 | jit_class_sav)
|
||||||
#else
|
#else
|
||||||
# if __CYGWIN__
|
# define _RAX JIT_GPR(0)
|
||||||
# define jit_r(i) (_RAX + (i))
|
# define _RCX JIT_GPR(1)
|
||||||
# define jit_r_num() 3
|
# define _RDX JIT_GPR(2)
|
||||||
# define jit_v(i) (_RBX + (i))
|
# define _RBX JIT_GPR(3 | jit_class_sav)
|
||||||
# define jit_v_num() 7
|
# define _RSP JIT_GPR(4 | jit_class_sav)
|
||||||
# define jit_f(index) (_XMM4 + (index))
|
# define _RBP JIT_GPR(5 | jit_class_sav)
|
||||||
# define jit_f_num() 12
|
# define _RSI JIT_GPR(6)
|
||||||
# define JIT_R0 JIT_GPR(_RAX)
|
# define _RDI JIT_GPR(7)
|
||||||
# define JIT_R1 JIT_GPR(_R10)
|
# define _R8 JIT_GPR(8)
|
||||||
# define JIT_R2 JIT_GPR(_R11)
|
# define _R9 JIT_GPR(9)
|
||||||
# define JIT_V0 JIT_GPR(_RBX)
|
# define _R10 JIT_GPR(10)
|
||||||
# define JIT_V1 JIT_GPR(_RDI)
|
# define _R11 JIT_GPR(11)
|
||||||
# define JIT_V2 JIT_GPR(_RSI)
|
# define _R12 JIT_GPR(12 | jit_class_sav)
|
||||||
# define JIT_V3 JIT_GPR(_R12)
|
# define _R13 JIT_GPR(13 | jit_class_sav)
|
||||||
# define JIT_V4 JIT_GPR(_R13)
|
# define _R14 JIT_GPR(14 | jit_class_sav)
|
||||||
# define JIT_V5 JIT_GPR(_R14)
|
# define _R15 JIT_GPR(15 | jit_class_sav)
|
||||||
# define JIT_V6 JIT_GPR(_R15)
|
# define _XMM0 JIT_FPR(0)
|
||||||
/* Volatile - Return value register */
|
# define _XMM1 JIT_FPR(1)
|
||||||
_RAX,
|
# define _XMM2 JIT_FPR(2)
|
||||||
/* Volatile */
|
# define _XMM3 JIT_FPR(3)
|
||||||
_R10, _R11,
|
# define _XMM4 JIT_FPR(4)
|
||||||
/* Nonvolatile */
|
# define _XMM5 JIT_FPR(5)
|
||||||
_RBX, _RDI, _RSI,
|
# define _XMM6 JIT_FPR(6)
|
||||||
_R12, _R13, _R14, _R15,
|
# define _XMM7 JIT_FPR(7)
|
||||||
/* Volatile - Integer arguments (4 to 1) */
|
# define _XMM8 JIT_FPR(8)
|
||||||
_R9, _R8, _RDX, _RCX,
|
# define _XMM9 JIT_FPR(9)
|
||||||
/* Nonvolatile */
|
# define _XMM10 JIT_FPR(10)
|
||||||
_RSP, _RBP,
|
# define _XMM11 JIT_FPR(11)
|
||||||
# define JIT_F0 JIT_FPR(_XMM0)
|
# define _XMM12 JIT_FPR(12)
|
||||||
# define JIT_F1 JIT_FPR(_XMM1)
|
# define _XMM13 JIT_FPR(13)
|
||||||
# define JIT_F2 JIT_FPR(_XMM2)
|
# define _XMM14 JIT_FPR(14)
|
||||||
# define JIT_F3 JIT_FPR(_XMM3)
|
# define _XMM15 JIT_FPR(15)
|
||||||
# define JIT_F4 JIT_FPR(_XMM4)
|
#endif
|
||||||
# define JIT_F5 JIT_FPR(_XMM5)
|
|
||||||
# define JIT_F6 JIT_FPR(_XMM6)
|
#define JIT_SP _RSP
|
||||||
# define JIT_F7 JIT_FPR(_XMM7)
|
#define JIT_FP _RBP
|
||||||
# define JIT_F8 JIT_FPR(_XMM8)
|
#if __X32
|
||||||
# define JIT_F9 JIT_FPR(_XMM9)
|
# define JIT_R0 _RAX
|
||||||
# define JIT_F10 JIT_FPR(_XMM10)
|
# define JIT_R1 _RCX
|
||||||
# define JIT_F11 JIT_FPR(_XMM11)
|
# define JIT_R2 _RDX
|
||||||
# define JIT_F12 JIT_FPR(_XMM12)
|
# define JIT_V0 _RBX
|
||||||
# define JIT_F13 JIT_FPR(_XMM13)
|
# define JIT_V1 _RSI
|
||||||
# define JIT_F14 JIT_FPR(_XMM14)
|
# define JIT_V2 _RDI
|
||||||
# define JIT_F15 JIT_FPR(_XMM15)
|
# define JIT_F0 _XMM0
|
||||||
/* Volatile */
|
# define JIT_F1 _XMM1
|
||||||
_XMM4, _XMM5,
|
# define JIT_F2 _XMM2
|
||||||
/* Nonvolatile */
|
# define JIT_F3 _XMM3
|
||||||
_XMM6, _XMM7, _XMM8, _XMM9, _XMM10,
|
# define JIT_F4 _XMM4
|
||||||
_XMM11, _XMM12, _XMM13, _XMM14, _XMM15,
|
# define JIT_F5 _XMM5
|
||||||
/* Volatile - FP arguments (4 to 1) */
|
# define JIT_F6 _XMM6
|
||||||
_XMM3, _XMM2, _XMM1, _XMM0,
|
# define JIT_F7 _XMM6
|
||||||
# define jit_sse_reg_p(reg) ((reg) >= _XMM4 && (reg) <= _XMM0)
|
#elif __CYGWIN__
|
||||||
# else
|
# define JIT_R0 _RAX
|
||||||
# define jit_r(i) (_RAX + (i))
|
# define JIT_R1 _R10
|
||||||
# define jit_r_num() 4
|
# define JIT_R2 _R11
|
||||||
# define jit_v(i) (_RBX + (i))
|
# define JIT_V0 _RBX
|
||||||
# define jit_v_num() 4
|
# define JIT_V1 _RDI
|
||||||
# define jit_f(index) (_XMM8 + (index))
|
# define JIT_V2 _RSI
|
||||||
# define jit_f_num() 8
|
# define JIT_V3 _R12
|
||||||
# define JIT_R0 JIT_GPR(_RAX)
|
# define JIT_V4 _R13
|
||||||
# define JIT_R1 JIT_GPR(_R10)
|
# define JIT_V5 _R14
|
||||||
# define JIT_R2 JIT_GPR(_R11)
|
# define JIT_V6 _R15
|
||||||
# define JIT_R3 JIT_GPR(_R12)
|
# define JIT_F0 _XMM0
|
||||||
_RAX, _R10, _R11, _R12,
|
# define JIT_F1 _XMM1
|
||||||
# define JIT_V0 JIT_GPR(_RBX)
|
# define JIT_F2 _XMM2
|
||||||
# define JIT_V1 JIT_GPR(_R13)
|
# define JIT_F3 _XMM3
|
||||||
# define JIT_V2 JIT_GPR(_R14)
|
# define JIT_F4 _XMM4
|
||||||
# define JIT_V3 JIT_GPR(_R15)
|
# define JIT_F5 _XMM5
|
||||||
_RBX, _R13, _R14, _R15,
|
# define JIT_F6 _XMM6
|
||||||
_R9, _R8, _RCX, _RDX, _RSI, _RDI,
|
# define JIT_F7 _XMM7
|
||||||
_RSP, _RBP,
|
# define JIT_F8 _XMM8
|
||||||
# define JIT_F0 JIT_FPR(_XMM0)
|
# define JIT_F9 _XMM9
|
||||||
# define JIT_F1 JIT_FPR(_XMM1)
|
# define JIT_F10 _XMM10
|
||||||
# define JIT_F2 JIT_FPR(_XMM2)
|
# define JIT_F11 _XMM11
|
||||||
# define JIT_F3 JIT_FPR(_XMM3)
|
# define JIT_F12 _XMM12
|
||||||
# define JIT_F4 JIT_FPR(_XMM4)
|
# define JIT_F13 _XMM13
|
||||||
# define JIT_F5 JIT_FPR(_XMM5)
|
# define JIT_F14 _XMM14
|
||||||
# define JIT_F6 JIT_FPR(_XMM6)
|
# define JIT_F15 _XMM15
|
||||||
# define JIT_F7 JIT_FPR(_XMM7)
|
#else
|
||||||
# define JIT_F8 JIT_FPR(_XMM8)
|
# define JIT_R0 _RAX
|
||||||
# define JIT_F9 JIT_FPR(_XMM9)
|
# define JIT_R1 _R10
|
||||||
# define JIT_F10 JIT_FPR(_XMM10)
|
# define JIT_R2 _R11
|
||||||
# define JIT_F11 JIT_FPR(_XMM11)
|
# define JIT_R3 _R12
|
||||||
# define JIT_F12 JIT_FPR(_XMM12)
|
# define JIT_V0 _RBX
|
||||||
# define JIT_F13 JIT_FPR(_XMM13)
|
# define JIT_V1 _R13
|
||||||
# define JIT_F14 JIT_FPR(_XMM14)
|
# define JIT_V2 _R14
|
||||||
# define JIT_F15 JIT_FPR(_XMM15)
|
# define JIT_V3 _R15
|
||||||
_XMM8, _XMM9, _XMM10, _XMM11, _XMM12, _XMM13, _XMM14, _XMM15,
|
# define JIT_F0 _XMM0
|
||||||
_XMM7, _XMM6, _XMM5, _XMM4, _XMM3, _XMM2, _XMM1, _XMM0,
|
# define JIT_F1 _XMM1
|
||||||
# define jit_sse_reg_p(reg) ((reg) >= _XMM8 && (reg) <= _XMM0)
|
# define JIT_F2 _XMM2
|
||||||
# endif
|
# define JIT_F3 _XMM3
|
||||||
|
# define JIT_F4 _XMM4
|
||||||
|
# define JIT_F5 _XMM5
|
||||||
|
# define JIT_F6 _XMM6
|
||||||
|
# define JIT_F7 _XMM7
|
||||||
|
# define JIT_F8 _XMM8
|
||||||
|
# define JIT_F9 _XMM9
|
||||||
|
# define JIT_F10 _XMM10
|
||||||
|
# define JIT_F11 _XMM11
|
||||||
|
# define JIT_F12 _XMM12
|
||||||
|
# define JIT_F13 _XMM13
|
||||||
|
# define JIT_F14 _XMM14
|
||||||
|
# define JIT_F15 _XMM15
|
||||||
#endif
|
#endif
|
||||||
# define JIT_NOREG _NOREG
|
|
||||||
_NOREG,
|
|
||||||
} jit_reg_t;
|
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
/* x87 present */
|
/* x87 present */
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue