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synced 2025-06-20 18:50:21 +02:00
Pass all but the (not yet implemented) qmul and qdiv tests in sparc
* check/float.tst: Add sparc to list of known NaN and +-Inf to integer conversion. * check/lightning.c: Define __sparc__ to preprocessor in the sparc backend. * include/lightning/jit_private.h: Correct wrong definition of emit_stxi_d, that has lived for a long time, but would cause problems whenever needing to spill/reload a float register. * include/lightning/jit_sparc.h: Can only use %g2,%g3,%g4 for scratch variables, as other "global" registers are reserved for the system, e.g. libc. Reorder float register naming to make it easier to access odd float registers, so that generating code for pusharg and getarg is easier for the IR. * lib/jit_mips-cpu.c, lib/jit_ppc-cpu.c: Update to match new code in jit_sparc-cpu.c. It must call jit_get_reg with jit_class_nospill if using the register to move an unconditional branch address to it, as the reload will not happen (actually could happen in the delay slot...) * lib/jit_sparc-cpu.c: Correct wrong macro definition for ldxr_s. Properly implement div* and implement rem. Div* needs to use the y register, and rem* needs to be synthesized. Correct b?sub* macro definitions. * lib/jit_sparc-fpu.c: Correct reversed float to/from double conversion. Correct wrong jit_get_reg call asking for a gpr and then using the fpr with that number. Correct wrong branch displacement computation for conditional branches. * lib/jit_sparc.c: Correct getarg_d and pushargi_d implementation. Add rem* entries to the switch converting IR to machine code. * lib/lightning.c: Correct a problem detected when adding the jit_class_nospill flag to jit_get_reg, that was caused when having a branch to an "epilog" node, what would cause the code to think all registers in unknown state were live, while in truth, all registers in unknown state in the "just after return" point are actually dead.
This commit is contained in:
pcpa
parent
610a569300
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11 changed files with 238 additions and 81 deletions
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@ -93,7 +93,7 @@ static void _f3a(jit_state_t*,jit_int32_t,
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# define LDSB(rs1, rs2, rd) f3r(3, rd, 9, rs1, rs2)
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# define LDSBI(rs1, imm, rd) f3i(3, rd, 9, rs1, imm)
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# define LDSH(rs1, rs2, rd) f3r(3, rd, 10, rs1, rs2)
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# define LDSHI(rs1, imm, rd) f3r(3, rd, 10, rs1, imm)
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# define LDSHI(rs1, imm, rd) f3i(3, rd, 10, rs1, imm)
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# define LDUB(rs1, rs2, rd) f3r(3, rd, 1, rs1, rs2)
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# define LDUBI(rs1, imm, rd) f3i(3, rd, 1, rs1, imm)
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# define LDUH(rs1, rs2, rd) f3r(3, rd, 2, rs1, rs2)
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@ -461,12 +461,22 @@ static void _subxi(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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# define muli(r0, r1, i0) _muli(_jit, r0, r1, i0)
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static void _muli(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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# define divr(r0, r1, r2) SDIV(r1, r2, r0)
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# define divr(r0, r1, r2) _divr(_jit, r0, r1, r2)
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static void _divr(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
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# define divi(r0, r1, i0) _divi(_jit, r0, r1, i0)
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static void _divi(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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# define divr_u(r0, r1, r2) UDIV(r1, r2, r0)
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# define divr_u(r0, r1, r2) _divr_u(_jit, r0, r1, r2)
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static void _divr_u(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
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# define divi_u(r0, r1, i0) _divi_u(_jit, r0, r1, i0)
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static void _divi_u(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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# define remr(r0, r1, r2) _remr(_jit, r0, r1, r2)
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static void _remr(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
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# define remi(r0, r1, i0) _remi(_jit, r0, r1, i0)
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static void _remi(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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# define remr_u(r0, r1, r2) _remr_u(_jit, r0, r1, r2)
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static void _remr_u(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
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# define remi_u(r0, r1, i0) _remi_u(_jit, r0, r1, i0)
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static void _remi_u(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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# define andr(r0, r1, r2) AND(r1, r2, r0)
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# define andi(r0, r1, i0) _andi(_jit, r0, r1, i0)
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@ -619,14 +629,14 @@ _b_asw(jit_state_t*,jit_bool_t,jit_bool_t,jit_bool_t,
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# define bxaddi(i0, r0, i1) b_asw(0, 1, 1, i0, r0, i1)
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# define bxaddr_u(i0, r0, r1) b_asr(0, 1, 0, i0, r0, r1)
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# define bxaddi_u(i0, r0, i1) b_asw(0, 1, 0, i0, r0, i1)
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# define bosubr(i0, r0, r1) b_asr(1, 1, 1, i0, r0, r1)
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# define bosubi(i0, r0, i1) b_asw(1, 1, 1, i0, r0, i1)
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# define bosubr_u(i0, r0, r1) b_asr(1, 1, 0, i0, r0, r1)
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# define bosubi_u(i0, r0, i1) b_asw(1, 1, 0, i0, r0, i1)
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# define bxsubr(i0, r0, r1) b_asr(0, 1, 1, i0, r0, r1)
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# define bxsubi(i0, r0, i1) b_asw(0, 1, 1, i0, r0, i1)
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# define bxsubr_u(i0, r0, r1) b_asr(0, 1, 0, i0, r0, r1)
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# define bxsubi_u(i0, r0, i1) b_asw(0, 1, 0, i0, r0, i1)
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# define bosubr(i0, r0, r1) b_asr(1, 0, 1, i0, r0, r1)
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# define bosubi(i0, r0, i1) b_asw(1, 0, 1, i0, r0, i1)
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# define bosubr_u(i0, r0, r1) b_asr(1, 0, 0, i0, r0, r1)
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# define bosubi_u(i0, r0, i1) b_asw(1, 0, 0, i0, r0, i1)
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# define bxsubr(i0, r0, r1) b_asr(0, 0, 1, i0, r0, r1)
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# define bxsubi(i0, r0, i1) b_asw(0, 0, 1, i0, r0, i1)
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# define bxsubr_u(i0, r0, r1) b_asr(0, 0, 0, i0, r0, r1)
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# define bxsubi_u(i0, r0, i1) b_asw(0, 0, 0, i0, r0, i1)
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# define bm_r(set, i0, r0, r1) _bm_r(_jit,set,i0,r0,r1)
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static jit_word_t
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_bm_r(jit_state_t*,jit_bool_t,jit_word_t,jit_int32_t,jit_int32_t);
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@ -925,26 +935,49 @@ _muli(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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}
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}
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static void
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_divr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
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{
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jit_int32_t reg;
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reg = jit_get_reg(jit_class_gpr);
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rshi(rn(reg), r1, 31);
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WRY(rn(reg), 0);
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SDIV(r1, r2, r0);
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jit_unget_reg(reg);
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}
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static void
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_divi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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{
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jit_int32_t reg;
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if (s13_p(i0))
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reg = jit_get_reg(jit_class_gpr);
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if (s13_p(i0)) {
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rshi(rn(reg), r1, 31);
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WRY(rn(reg), 0);
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SDIVI(r1, i0, r0);
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}
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else {
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reg = jit_get_reg(jit_class_gpr);
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movi(rn(reg), i0);
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divr(r0, r1, rn(reg));
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jit_unget_reg(reg);
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}
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jit_unget_reg(reg);
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}
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static void
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_divr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
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{
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WRYI(0, 0);
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UDIV(r1, r2, r0);
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}
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static void
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_divi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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{
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jit_int32_t reg;
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if (s13_p(i0))
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if (s13_p(i0)) {
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WRYI(0, 0);
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UDIVI(r1, i0, r0);
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}
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else {
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reg = jit_get_reg(jit_class_gpr);
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movi(rn(reg), i0);
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@ -953,6 +986,62 @@ _divi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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}
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}
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static void
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_remr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
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{
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jit_int32_t reg;
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if (r0 == r1 || r0 == r2) {
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reg = jit_get_reg(jit_class_gpr);
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divr(rn(reg), r1, r2);
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mulr(rn(reg), r2, rn(reg));
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subr(r0, r1, rn(reg));
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jit_unget_reg(reg);
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}
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else {
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divr(r0, r1, r2);
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mulr(r0, r2, r0);
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subr(r0, r1, r0);
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}
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}
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static void
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_remi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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{
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jit_int32_t reg;
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reg = jit_get_reg(jit_class_gpr);
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movi(rn(reg), i0);
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remr(r0, r1, rn(reg));
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jit_unget_reg(reg);
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}
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static void
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_remr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
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{
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jit_int32_t reg;
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if (r0 == r1 || r0 == r2) {
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reg = jit_get_reg(jit_class_gpr);
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divr_u(rn(reg), r1, r2);
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mulr(rn(reg), r2, rn(reg));
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subr(r0, r1, rn(reg));
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jit_unget_reg(reg);
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}
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else {
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divr_u(r0, r1, r2);
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mulr(r0, r2, r0);
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subr(r0, r1, r0);
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}
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}
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static void
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_remi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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{
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jit_int32_t reg;
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reg = jit_get_reg(jit_class_gpr);
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movi(rn(reg), i0);
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remr_u(r0, r1, rn(reg));
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jit_unget_reg(reg);
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}
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static void
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_andi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
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{
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@ -1316,6 +1405,7 @@ _b_asr(jit_state_t *_jit, jit_bool_t jif, jit_bool_t add, jit_bool_t sgn,
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(jif ? SPARC_BVS : SPARC_BVC) :
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(jif ? SPARC_BCS : SPARC_BCC),
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(i0 - w) >> 2);
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NOP();
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return (w);
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}
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@ -1327,14 +1417,15 @@ _b_asw(jit_state_t *_jit, jit_bool_t jif, jit_bool_t add, jit_bool_t sgn,
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jit_int32_t reg;
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if (s13_p(i1)) {
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if (add)
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ADDcc(r0, i1, r0);
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ADDIcc(r0, i1, r0);
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else
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SUBcc(r0, i1, r0);
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SUBIcc(r0, i1, r0);
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w = _jit->pc.w;
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B(sgn ?
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(jif ? SPARC_BVS : SPARC_BVC) :
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(jif ? SPARC_BCS : SPARC_BCC),
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(i0 - w) >> 2);
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NOP();
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}
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else {
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reg = jit_get_reg(jit_class_gpr);
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@ -1396,9 +1487,10 @@ _jmpi(jit_state_t *_jit, jit_word_t i0)
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NOP();
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}
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else {
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reg = jit_get_reg(jit_class_gpr);
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reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
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movi(rn(reg), i0);
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jmpr(rn(reg));
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jit_unget_reg(reg);
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}
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}
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@ -1407,7 +1499,7 @@ _jmpi_p(jit_state_t *_jit, jit_word_t i0)
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{
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jit_word_t w;
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jit_int32_t reg;
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reg = jit_get_reg(jit_class_gpr);
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reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
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w = movi_p(rn(reg), i0);
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jmpr(rn(reg));
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jit_unget_reg(reg);
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@ -1446,8 +1538,9 @@ static void
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_prolog(jit_state_t *_jit, jit_node_t *node)
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{
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/* align at 16 bytes boundary */
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_jit->function->stack = ((stack_framesize - _jit->function->self.aoff)
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+ 15) & -16;
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_jit->function->stack = ((stack_framesize +
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_jit->function->self.alen -
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_jit->function->self.aoff) + 15) & -16;
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SAVEI(_SP_REGNO, -_jit->function->stack, _SP_REGNO);
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/* (most) other backends do not save incoming arguments, so,
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