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Build and pass all test cases on a multiprocessor HP-UX.
* configure.ac, check/Makefile.am, doc/Makefile.am: Do not explicitly link to -ldl, but instead autodetect the library with dlopen, dlsym, etc. * check/lightning.c: Add workaround to apparently buggy getopt in HP-UX that sets optind to the wrong index, and use RTLD_NEXT on HP-UX instead of RTLD_DEFAULT to dlsym global symbols. * include/lightning.h: Rework definitions of wordsize and byte order to detect proper values on HP-UX. * lib/lightning.c: Minor correction to use MAP_ANONYMOUS instead of MAP_ANON on HP-UX. * lib/jit_hppa.c: Float arguments must be passed on integer registers on HP-UX, not only for varargs functions. Add code to properly clear instruction cache. This was not required on Debian hppa port, but may have been working by accident. * lib/jit_hppa-cpu.c: Follow pattern of HP-UX binaries and use bve,n instead of bv,n to return from functions. * lib/jit_hppa-fpu.c: For some reason "fst? frX,rX,(rY)" did not work on the tested computer (HP-UX B.11.23 U 9000/785 HP-UX) so the code was changed, at first for __hpux only to add the base and offset register and use the instruction with an immediate (zero) offset.
This commit is contained in:
pcpa
parent
3e5a12f747
commit
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10 changed files with 244 additions and 30 deletions
102
lib/jit_hppa.c
102
lib/jit_hppa.c
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@ -32,6 +32,9 @@
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#define patch(instr, node) _patch(_jit, instr, node)
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static void _patch(jit_state_t*,jit_word_t,jit_node_t*);
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/* libgcc */
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extern void __clear_cache(void *, void *);
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/*
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* Initialization
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*/
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@ -149,7 +152,7 @@ _jit_prolog(jit_state_t *_jit)
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_jitc->function->self.size = params_offset;
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_jitc->function->self.argi = _jitc->function->self.alen = 0;
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/* float conversion */
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_jitc->function->self.aoff = alloca_offset - 8;
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_jitc->function->self.aoff = alloca_offset;
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_jitc->function->self.call = jit_call_default;
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jit_alloc((jit_pointer_t *)&_jitc->function->regoff,
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_jitc->reglen * sizeof(jit_int32_t));
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@ -409,7 +412,10 @@ _jit_pushargr_f(jit_state_t *_jit, jit_int32_t u)
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_jitc->function->call.size -= sizeof(jit_word_t);
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if (_jitc->function->call.argi < 4) {
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jit_movr_f(_F4 - _jitc->function->call.argi, u);
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if (_jitc->function->call.call & jit_call_varargs) {
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#if !defined(__hpux)
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if (_jitc->function->call.call & jit_call_varargs)
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#endif
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{
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jit_stxi_f(alloca_offset - 8, JIT_FP, u);
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jit_ldxi(_R26 - _jitc->function->call.argi, JIT_FP,
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alloca_offset - 8);
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@ -428,7 +434,10 @@ _jit_pushargi_f(jit_state_t *_jit, jit_float32_t u)
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_jitc->function->call.size -= sizeof(jit_word_t);
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if (_jitc->function->call.argi < 4) {
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jit_movi_f(_F4 - _jitc->function->call.argi, u);
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if (_jitc->function->call.call & jit_call_varargs) {
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#if !defined(__hpux)
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if (_jitc->function->call.call & jit_call_varargs)
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#endif
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{
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jit_stxi_f(alloca_offset - 8, JIT_FP,
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_F4 - _jitc->function->call.argi);
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jit_ldxi(_R26 - _jitc->function->call.argi,
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@ -455,7 +464,10 @@ _jit_pushargr_d(jit_state_t *_jit, jit_int32_t u)
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}
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if (_jitc->function->call.argi < 4) {
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jit_movr_d(_F4 - (_jitc->function->call.argi + 1), u);
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if (_jitc->function->call.call & jit_call_varargs) {
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#if !defined(__hpux)
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if (_jitc->function->call.call & jit_call_varargs)
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#endif
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{
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jit_stxi_d(alloca_offset - 8, JIT_FP, u);
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jit_ldxi(_R26 - _jitc->function->call.argi,
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JIT_FP, alloca_offset - 4);
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@ -484,7 +496,10 @@ _jit_pushargi_d(jit_state_t *_jit, jit_float64_t u)
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}
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if (_jitc->function->call.argi < 4) {
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jit_movi_d(_F4 - (_jitc->function->call.argi + 1), u);
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if (_jitc->function->call.call & jit_call_varargs) {
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#if !defined(__hpux)
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if (_jitc->function->call.call & jit_call_varargs)
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#endif
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{
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jit_stxi_d(alloca_offset - 8, JIT_FP,
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_F4 - (_jitc->function->call.argi + 1));
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jit_ldxi(_R26 - _jitc->function->call.argi,
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@ -1131,6 +1146,83 @@ _emit_code(jit_state_t *_jit)
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patch_at(_jitc->patches.ptr[offset].inst, word);
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}
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#if defined(__hppa)
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/* --- parisc2.0.pdf ---
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Programming Note
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The minimum spacing that is guaranteed to work for "self-modifying code" is
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shown in the code segment below. Since instruction prefetching is permitted,
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any data cache flushes must be separated from any instruction cache flushes
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by a SYNC. This will ensure that the "new" instruction will be written to
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memory prior to any attempts at prefetching it as an instruction.
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LDIL l%newinstr,rnew
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LDW r%newinstr(0,rnew),temp
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LDIL l%instr,rinstr
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STW temp,r%instr(0,rinstr)
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FDC r%instr(0,rinstr)
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SYNC
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FIC r%instr(rinstr)
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SYNC
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instr ...
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(at least seven instructions)
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This sequence assumes a uniprocessor system. In a multiprocessor system,
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software must ensure no processor is executing code which is in the process
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of being modified.
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*/
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/*
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Adapted from ffcall/trampoline/cache-hppa.c:__TR_clear_cache to
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loop over addresses as it is unlikely from and to addresses would fit in
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at most two cachelines.
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*/
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/*
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* Copyright 1995-1997 Bruno Haible, <bruno@clisp.org>
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*
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* This is free software distributed under the GNU General Public Licence
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* described in the file COPYING. Contact the author if you don't have this
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* or can't live with it. There is ABSOLUTELY NO WARRANTY, explicit or implied,
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* on this software.
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*/
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{
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/* FIXME this may be required on Linux or other OSes with
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* multiprocessor support (was not required for the hppa
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* port done on Debian hppa...) */
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jit_word_t f = (jit_word_t)_jit->code.ptr;
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jit_word_t t = f + _jit->code.length;
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register int u, v;
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for (; f <= t; f += 32) {
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asm volatile ("fdc 0(0,%0)"
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"\n\t" "fdc 0(0,%1)"
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"\n\t" "sync"
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:
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: "r" (f), "r" (t)
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);
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asm volatile ("mfsp %%sr0,%1"
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"\n\t" "ldsid (0,%4),%0"
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"\n\t" "mtsp %0,%%sr0"
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"\n\t" "fic 0(%%sr0,%2)"
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"\n\t" "fic 0(%%sr0,%3)"
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"\n\t" "sync"
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"\n\t" "mtsp %1,%%sr0"
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"\n\t" "nop"
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"\n\t" "nop"
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"\n\t" "nop"
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"\n\t" "nop"
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"\n\t" "nop"
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"\n\t" "nop"
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: "=r" (u), "=r" (v)
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: "r" (f), "r" (t), "r" (f)
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);
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}
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}
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#else
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/* This is supposed to work but appears to fail on multiprocessor systems */
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word = sysconf(_SC_PAGE_SIZE);
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__clear_cache(_jit->code.ptr, (void *)((_jit->pc.w + word) & -word));
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#endif
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return (_jit->code.ptr);
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}
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