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New instructions load-f64, load-u64

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* libguile/instructions.c (FOR_EACH_INSTRUCTION_WORD_TYPE): Add word
  types for immediate f64 and u64 values.
  (TYPE_WIDTH): Bump up by a bit, now that we have 32 word types.
  (NOP, parse_instruction): Use 64-bit meta type.

* libguile/vm-engine.c (load-f64, load-u64): New instructions.

* module/language/bytecode.scm (compute-instruction-arity): Add parser
  for new instruction word types.

* module/language/cps/compile-bytecode.scm (compile-function): Add
  special-cased assemblers for new instructions, and also for scm->u64
  and u64->scm which I missed before.

* module/language/cps/effects-analysis.scm (load-f64, load-u64): New
  instructions.

* module/language/cps/slot-allocation.scm (compute-needs-slot): load-f64
  and load-u64 don't need slots.
  (compute-var-representations): Update for new instructions.

* module/language/cps/specialize-primcalls.scm (specialize-primcalls):
  Specialize scm->f64 and scm->u64 to make-f64 and make-u64.

* module/language/cps/types.scm (load-f64, load-u64): Wire up to type
  inference, though currently type inference only runs before
  specialization.

* module/language/cps/utils.scm (compute-defining-expressions): For some
  reason I don't understand, it's possible to see two definitions that
  are equal but not equal? here.  Allow for now.
  (compute-constant-values): Punch through type conversions to get
  constant u64/f64 values.

* module/system/vm/assembler.scm (assembler): Support for new word
  types.  Export the new assemblers.
This commit is contained in:
Andy Wingo 2015-11-20 16:14:32 +01:00
parent bdfa1c1b42
commit f34688ad25
11 changed files with 119 additions and 23 deletions
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37
libguile/vm-engine.c
View file

@ -3495,8 +3495,41 @@ VM_NAME (scm_i_thread *thread, struct scm_vm *vp,
NEXT (1);
}
VM_DEFINE_OP (155, unused_155, NULL, NOP)
VM_DEFINE_OP (156, unused_156, NULL, NOP)
/* load-f64 dst:24 high-bits:32 low-bits:32
*
* Make a double-precision floating-point value with HIGH-BITS and
* LOW-BITS.
*/
VM_DEFINE_OP (155, load_f64, "load-f64", OP3 (X8_S24, AF32, BF32) | OP_DST)
{
scm_t_uint32 dst;
scm_t_uint64 val;
UNPACK_24 (op, dst);
val = ip[1];
val <<= 32;
val |= ip[2];
SP_SET_U64 (dst, val);
NEXT (3);
}
/* load-u64 dst:24 high-bits:32 low-bits:32
*
* Make an unsigned 64-bit integer with HIGH-BITS and LOW-BITS.
*/
VM_DEFINE_OP (156, load_u64, "load-u64", OP3 (X8_S24, AU32, BU32) | OP_DST)
{
scm_t_uint32 dst;
scm_t_uint64 val;
UNPACK_24 (op, dst);
val = ip[1];
val <<= 32;
val |= ip[2];
SP_SET_U64 (dst, val);
NEXT (3);
}
VM_DEFINE_OP (157, unused_157, NULL, NOP)
VM_DEFINE_OP (158, unused_158, NULL, NOP)
VM_DEFINE_OP (159, unused_159, NULL, NOP)