diff --git a/ChangeLog b/ChangeLog index 533fb67c3..80e14b3a4 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,12 @@ +2013-10-28 Paulo Andrade + + * lib/jit_ia64.c: Minor change to force collecting the maximum + instruction length in the --enable-devel-get-jit-size build + mode. The actual generated file did not change because the + sampling was large enough that it had already collected proper + information in the previously slightly buggy code (not forcing + a sync of the instructions that could be combined). + 2013-10-27 Paulo Andrade * lib/jit_arm.c: Correct build when disassembler is diff --git a/lib/jit_ia64.c b/lib/jit_ia64.c index 0894dd0e5..6abf1a7fc 100644 --- a/lib/jit_ia64.c +++ b/lib/jit_ia64.c @@ -849,16 +849,14 @@ _emit_code(jit_state_t *_jit) patch(word, node); \ } \ break -#if GET_JIT_SIZE - /* default of 64 bytes is too low for some possible - * quite long code generation sequences, e.g. qdivi */ - _jitc->code.end = _jit->code.ptr + _jit->code.length - 4096; -#endif for (node = _jitc->head; node; node = node->next) { if (_jit->pc.uc >= _jitc->code.end) return (NULL); value = jit_classify(node->code); +#if GET_JIT_SIZE + sync(); +#endif jit_regarg_set(node, value); switch (node->code) { case jit_code_note: case jit_code_name: @@ -1334,6 +1332,9 @@ _emit_code(jit_state_t *_jit) break; } } +#if GET_JIT_SIZE + sync(); +#endif jit_regarg_clr(node, value); /* update register live state */ jit_reglive(node); diff --git a/size.c b/size.c index 1acbb4fbb..5c56e699d 100644 --- a/size.c +++ b/size.c @@ -71,7 +71,7 @@ main(int argc, char *argv[]) #if defined(__arm__) fprintf(fp, "#undef /* __ARM_PCS_VFP */\n"); #elif defined(__mips__) - fprintf(fp, "#endif /* _ABIN32 */\n"); + fprintf(fp, "#endif /* _ABIN32 */\n"); #elif defined(__ppc__) fprintf(fp, "#endif /* __ppc__ */\n"); #elif defined(__powerpc__)