1
Fork 0
mirror of https://git.savannah.gnu.org/git/guile.git synced 2025-04-30 20:00:19 +02:00
Commit graph

9 commits

Author SHA1 Message Date
Andy Wingo
d59060ce99 Fix prim -> VM op mapping for u8/s8 bytevector ops
* module/language/cps/primitives.scm (*instruction-aliases*): Fix
  aliases for bytevector u8 / s8 operations.

* module/language/cps/compile-bytecode.scm (compile-fun): Fix s8
  operations.
2014-01-11 16:01:10 +01:00
Andy Wingo
691697de09 Rename "RTL" to "bytecode"
"RTL" didn't make any sense, and now that there's no other bytecode to
disambiguate against, just call it bytecode.

* module/Makefile.am:
* module/ice-9/eval-string.scm:
* module/language/bytecode.scm:
* module/language/bytecode/spec.scm:
* module/language/cps/arities.scm:
* module/language/cps/compile-bytecode.scm:
* module/language/cps/compile-rtl.scm:
* module/language/cps/contification.scm:
* module/language/cps/elide-values.scm:
* module/language/cps/primitives.scm:
* module/language/cps/reify-primitives.scm:
* module/language/cps/spec.scm:
* module/language/cps/specialize-primcalls.scm:
* module/language/rtl.scm:
* module/language/rtl/spec.scm:
* module/scripts/compile.scm:
* module/system/base/compile.scm:
* module/system/repl/common.scm:
* module/system/vm/assembler.scm:
* module/system/vm/debug.scm:
* module/system/vm/disassembler.scm:
* module/system/vm/dwarf.scm:
* test-suite/tests/cross-compilation.test:
* test-suite/tests/dwarf.test:
* test-suite/tests/rtl-compilation.test:
* test-suite/tests/rtl.test:
* test-suite/vm/run-vm-tests.scm: Fixups.
2013-12-02 21:31:47 +01:00
Andy Wingo
1b780c134b (system vm instruction) rtl-instruction-list -> (language rtl) instruction-list
* libguile/instructions.c (struct scm_instruction, fetch_instruction_table)
  (scm_instruction_list): Remove rtl_ infix.
* libguile/instructions.h: Adapt.

* module/system/vm/instruction.scm: Remove.

* module/language/rtl.scm: Export instruction-list from here.

* module/Makefile.am:
* module/language/cps/primitives.scm:
* module/system/vm/assembler.scm:
* module/system/vm/disassembler.scm:
* module/system/vm/frame.scm:
* module/system/vm/program.scm:
* module/system/vm/trace.scm:
* module/system/vm/traps.scm: Adapt.
2013-11-19 20:45:57 +01:00
Andy Wingo
d65514a2de RTL compiler supports static bitvectors
* libguile/arrays.c (scm_from_contiguous_typed_array):
* libguile/bytevectors.c (scm_uniform_array_to_bytevector): For
  bitvectors, round up the length to 32-bit units, as they are stored
  internally.  Otherwise I think this probably does the wrong thing for
  the last word on big-endian systems.
* libguile/bitvectors.c (BITVECTOR_LENGTH, BITVECTOR_BITS):
  (scm_c_make_bitvector): Reorder the length and pointer words to match
  the layout of bytevectors.

* module/language/cps/primitives.scm (*branching-primcall-arities*):
* module/system/vm/assembler.scm (br-if-bitvector):
* module/system/vm/disassembler.scm (code-annotation): Add bitvector
  test support.

* module/system/vm/assembler.scm (<uniform-vector-backing-store>): Add
  an element-size field.
  (intern-constant): Adapt make-uniform-vector-backing-store call.  Use
  uniform-array->bytevector, as the old compiler did.
  (link-data): Add bitvector cases.
2013-11-03 21:48:48 +01:00
Andy Wingo
6165d8120d Better aliased primcall compilation
* libguile/vm-engine.c (define!): Rename from define.
* module/language/cps/arities.scm (fix-clause-arities): If a prim
  aliases an RTL instruction with a different name and we reify a
  primcall, reify the instruction name.
* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Update
  emit-define! for new name.
* module/language/cps/primitives.scm (*rtl-instruction-aliases*): Add
  bytevector native accessors.
2013-10-31 12:55:24 +01:00
Andy Wingo
becce37b58 Better compiler support for bytevector ops
* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Add emitters
  for bytevector ops.  Add br-if-bytevector emitter.
* module/language/cps/primitives.scm (*branching-primcall-arities*):
  Mark bytevector? as a branching primitive.
* module/system/vm/assembler.scm (br-if-bytevector): New instruction
* module/system/vm/disassembler.scm (code-annotation): Add support for
  bytevector?.
2013-10-31 12:55:24 +01:00
Andy Wingo
4f406fea7e Compile variable-ref, variable-set!
* libguile/vm-engine (box-ref, box-set!): Instead of aborting if a box
  isn't a var, call out to vm_error_not_a_variable.  This makes these
  instructions equivalent to variable-ref/variable-set!.
  (vector-set!): Rename from vector-set.

* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Add
  variable-set! case, and adapt vector-set!.

* module/language/cps/primitives.scm (*rtl-instruction-aliases*): Add
  variable-ref / variable-set! aliases to box-ref / box-set!.
2013-10-26 15:40:49 +02:00
Andy Wingo
be8b62ca7f RTL compiler: Compile TC7 branches.
* module/system/vm/assembler.scm:
* module/system/vm/disassembler.scm (code-annotation):
* module/language/cps/primitives.scm (*branching-primcall-arities*):
* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Add support
  for compiling symbol?, variable?, vector?, and string? branches.
2013-10-26 15:16:09 +02:00
Andy Wingo
045392f1b2 Add CPS primitives info module
* module/Makefile.am:
* module/language/cps/primitives.scm: New file.
2013-08-31 09:40:56 +02:00