* module/language/cps/compile-bytecode.scm (compile-function):
* module/language/cps/primitives.scm (*branching-primcall-arities*):
* module/language/cps/type-fold.scm (equal?):
* module/language/cps/types.scm (equal?):
* module/language/tree-il/compile-cps.scm (convert): `equal?' is no
longer a branching primcall, because it isn't inline. The
implementation could lead to bad backtraces also, as it didn't save
the IP, and actually could lead to segfaults as it didn't reload the
SP after the return. There is an eqv? fast-path, though.
* module/system/vm/assembler.scm (br-if-equal): Remove interface.
* module/system/vm/disassembler.scm (code-annotation):
(compute-labels): No need to handle br-if-equal.
* libguile/arrays.c (scm_from_contiguous_typed_array):
* libguile/bytevectors.c (scm_uniform_array_to_bytevector): For
bitvectors, round up the length to 32-bit units, as they are stored
internally. Otherwise I think this probably does the wrong thing for
the last word on big-endian systems.
* libguile/bitvectors.c (BITVECTOR_LENGTH, BITVECTOR_BITS):
(scm_c_make_bitvector): Reorder the length and pointer words to match
the layout of bytevectors.
* module/language/cps/primitives.scm (*branching-primcall-arities*):
* module/system/vm/assembler.scm (br-if-bitvector):
* module/system/vm/disassembler.scm (code-annotation): Add bitvector
test support.
* module/system/vm/assembler.scm (<uniform-vector-backing-store>): Add
an element-size field.
(intern-constant): Adapt make-uniform-vector-backing-store call. Use
uniform-array->bytevector, as the old compiler did.
(link-data): Add bitvector cases.
* libguile/vm-engine.c (define!): Rename from define.
* module/language/cps/arities.scm (fix-clause-arities): If a prim
aliases an RTL instruction with a different name and we reify a
primcall, reify the instruction name.
* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Update
emit-define! for new name.
* module/language/cps/primitives.scm (*rtl-instruction-aliases*): Add
bytevector native accessors.
* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Add emitters
for bytevector ops. Add br-if-bytevector emitter.
* module/language/cps/primitives.scm (*branching-primcall-arities*):
Mark bytevector? as a branching primitive.
* module/system/vm/assembler.scm (br-if-bytevector): New instruction
* module/system/vm/disassembler.scm (code-annotation): Add support for
bytevector?.
* libguile/vm-engine (box-ref, box-set!): Instead of aborting if a box
isn't a var, call out to vm_error_not_a_variable. This makes these
instructions equivalent to variable-ref/variable-set!.
(vector-set!): Rename from vector-set.
* module/language/cps/compile-rtl.scm (emit-rtl-sequence): Add
variable-set! case, and adapt vector-set!.
* module/language/cps/primitives.scm (*rtl-instruction-aliases*): Add
variable-ref / variable-set! aliases to box-ref / box-set!.
