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109 commits

Author SHA1 Message Date
Andy Wingo
434fe2b4aa Merge branch 'callr-fix3' into 'main'
Fix some problems with callr and calli.

See merge request wingo/lightening!19
2024-06-03 13:43:19 +00:00
Andy Wingo
436a8b278b aarch64: Fix duplicate declaration 2024-04-22 15:14:13 +02:00
Andy Wingo
43262c0962 aarch64: Add support for LSE atomics
* lightening/aarch64-cpu.c (SWPAL, CASAL): New instructions.
(swap_atomic, cas_atomic): Use better instructions if we have LSE.
* lightening/aarch64.c (get_hwcap, jit_get_cpu): Arrange to detect LSE
availability on GNU/Linux and Darwin.

Based on a patch by Tony Garnock-Jones.  Thanks!
2024-04-22 15:03:01 +02:00
Tony Garnock-Jones
2c0126e3ef aarch64: Fix swap_atomic retry
* lightening/aarch64-cpu.c (swap_atomic): If the swap fails, and the dst
register was the same as the val, we would stomple val during the retry.
Fixes https://github.com/wingo/fibers/issues/83#issuecomment-2068847127.
2024-04-22 15:03:01 +02:00
Helmut Eller
f31fb0044d Fix some problems with callr and calli.
The problem with callr is that the register that contains the
function to be called, can be overwritten by the logic that moves
the values into argument registers.  To fix this, I added a
get_callr_temp function that should return a platform specific
register that is not used to pass arguments.  For Aarch64/Arm the
link registers seems to work; for Amd64/i686 the RAX register.
The function/tmp pair becomes an additional argument to the
parallel assigment; this way the original function register is not
accidentally overwritten.

The problem with calli is that it may not have enough temp
registers to move arguments.  The windmill paper says that at most
one temporary register is needed for the parallel assignment.
However, we also need a temp register for mem-to-mem moves.  So it
seems that we need a second temporary.  For Amd64/i686 we have
only one temporary GPR and one temporary FPR.  To fix this, I
modified the algorithm from the paper a bit: we perform the
mem-to-mem moves before the other moves.  Later when we need the
temp to break cycles, there shouldn't be any mem-to-mem moves
left.  So we should never need two temps at the same time.

* lightening/lightening.c: (get_callr_temp): New function; need
for each platform.
(prepare_call_args): Include the function/callr_temp pair in the
arguments for the parallel assignment.

* lightening/x86.c, lightening/arm.c, lightening/aarch64.c
(get_callr_temp): Implementation for each platform.

* lightening/arm.c (next_abi_arg): Fix the stack size for doubles.

* tests/call_10_2.c, tests/callr_10.c: New tests.
* tests/regarrays.inc: New file. Common code between the above two
tests that would be tedious to duplicate.
2022-06-08 16:20:42 +02:00
Luke Nihlen
3f495cc5d6 set size to known value before init 2022-01-11 09:02:30 -05:00
Luke Nihlen
6cdea3995a replace use of uninitialized variable size in reset_literal_pool 2022-01-10 20:32:00 -05:00
Andy Wingo
35cd7fac8b Fix jmp-shortening on x64 when target within instruction.
* lightening/x86.c (jit_try_shorten): If the address is within the
  last instruction, don't shorten.  If the intstruction is a jump, we
  could elide it entirely in some cases, but we don't know if the user
  captured the PC before calling jit_patch_here.  Better to leave this
  to the user.

Thanks to Helmut Eller for the bug report and test case in
https://gitlab.com/wingo/lightening/-/issues/17.
2021-01-07 11:04:17 +01:00
Andy Wingo
2784bee8e5 Spill whole words to stack, even for uint8_t args
* lightening/lightening.c (abi_gpr_to_mem): Write whole words when
  spilling GPRs to the stack.  Always correct given that all Lightening
  operations that write GPRs write the whole register, and the current
  ABI targets allow writing the extra words.  Closes #15.
2020-07-30 14:26:37 +02:00
Andy Wingo
ca1cc01cdf Literal pools have word-alignment, not u64-alignment
Prevents useless over-alignment for ARM.

* lightening/lightening.c (struct jit_literal_pool_entry): Value is a
  uintptr_t.
  (emit_uintptr): New helper.
  (emit_abs_reloc): Use new helper.
  (patch_pending_literal): Value is a uintptr_t.
  (emit_literal_pool): Adapt to literal entry being uintptr_t.
2020-07-30 14:04:47 +02:00
Andy Wingo
44b07aef4b Allow jit_begin_data to declare max data size
* lightening.h:
* lightening/lightening.c (jit_begin_data): Add max data size
  parameter.  If nonzero, can allow the JIT to avoid prematurely
  emitting a constant pool.
  (jit_end_data): Allow pending literals.
* tests/jmp_table.c (run_test): Use new API.
2020-07-30 13:41:02 +02:00
Andy Wingo
91c1591e41 Add support for emitting inline data and table switches
* lightening.h:
* lightening/lightening.c (jit_begin_data, jit_end_data)
  (jit_emit_u8, jit_emit_u16, jit_emit_u32, jit_emit_u64): Add new raw
  data-emitting primitives, bracketed by begin/end so that we can flush
  constant pools first, if needed.
* lightening/lightening.c (struct jit_state): Add new emitting_data
  flag.
  (jit_begin, jit_reset, jit_end): Handle the new flag.
  (emit_abs_reloc): Move here, from x86.c.
* lightening/x86.c (emit_abs_reloc): Remove.
  (jit_try_shorten): Don't shorten if loc == start; could be raw data.
* tests/jmp_table.c: New test.
2020-07-30 13:02:46 +02:00
Andy Wingo
b2ef1d5fba Fix patch_veneer on aarch64
* lightening/aarch64.c (patch_veneer): Fix absolutely bogus patch_veneer
  implementation.
2020-07-30 11:17:46 +02:00
Andrew Gierth
1bb909a44d Fix ARMv7 THUMB encoding for immediates.
* lightening/arm-cpu.c (encode_thumb_immediate): Fix return value in
third case.

Signed-off-by: Ludovic Courtès <ludo@gnu.org>
2020-06-20 15:57:06 +02:00
Andy Wingo
2c0fdb045e Fix unused variable warning for no-literal-pool targets
* lightening/lightening.c (jit_patch_there): Conditionally define
  flags.
2020-06-19 16:30:12 +02:00
Andy Wingo
6e317e70dd Merge branch 'fix-literal-pool-reset' into 'master'
Fix zeroing of literal pool entries

See merge request wingo/lightening!5
2020-06-19 14:25:36 +00:00
Andy Wingo
97212e87bd Fix zeroing of literal pool entries
* lightening/lightening.c (reset_literal_pool): Zero before setting size
  to 0.  Thanks to Dale Smith for pointing this out!
2020-06-19 16:23:36 +02:00
Andy Wingo
921f13a03b Merge branch 'fix-rotate-by-zero' into 'master'
Fix undefined behavior in ARMv7 assembler

See merge request wingo/lightening!4
2020-06-19 14:18:14 +00:00
Andy Wingo
ffba9b08c4 Fix undefined behavior in ARMv7 assembler
* lightening/arm-cpu.c (rotate_left): Fix the case of rotating by zero,
  which produced undefined behavior.  Many thanks to Andrew
  Gierth (andrew at tao11 riddles org uk) for the debugging and the
  fix.
2020-06-19 16:14:52 +02:00
Icecream95
0ff3b3163c
Convert BLI to BLXI for jumps to ARM code
With this, Guile builds and runs in both ARM and Thumb mode.

Closes: #12
2020-04-09 22:32:30 +12:00
Icecream95
11b9d3744e
Always emit veneers for non-bl jumps to ARM code
It is unlikely for any ARM code to be close enough to not have needed
a veneer, but it is possible, especially if running in a program with
another JIT library.
2020-04-09 22:31:20 +12:00
Icecream95
52ec8aefa0
Remove T2_BLXI 2020-04-09 21:30:40 +12:00
Icecream95
a6fee1add8
Use bx instead of mov for jumps on ARM 2020-04-09 21:30:13 +12:00
Icecream95
7f5f26269f
Stop setting the thumb bit except on jumps to veneers
Thanks to the previous commit, the jump targets should all be correct.
2020-04-09 20:37:12 +12:00
Icecream95
8045386a45
Return a function pointer from jit_address
This will allow supporting ARM code on armv7 without having to change
any users of Lightening.
2020-04-09 20:26:35 +12:00
Icecream95
ba24ce465f
Use an rsh of 0 for jumps on ARM
This will allow supporting jumping to ARM (as opposed to Thumb) code.
2020-04-09 20:24:47 +12:00
Icecream95
aacaa6e38c
Add separate functions for veneer patching 2020-04-06 19:52:29 +12:00
Icecream95
297ae99c3f
Add flag bits to the jit_reloc_kind enum 2020-04-06 16:04:57 +12:00
Andy Wingo
a96c0188f1 Ensure 32 bytes of stack are reserved on 64-bit Windows targets
* lightening/x86.c (reset_abi_arg_iterator): Reserve 32 stack bytes on
  64-bit Windows systems, in accordance with ABI.  Thanks a million to
  Charles Stanhope for the patch and to Mike Gran for testing!
2020-02-17 22:01:14 +01:00
Andy Wingo
2db2b12e85 Fix mips32r6 bug
See also:

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=925129
http://hades.mech.northwestern.edu/images/1/16/MIPS32_Architecture_Volume_II-A_Instruction_Set.pdf
https://lists.gnu.org/archive/html/lightning/2019-08/msg00010.html
https://lists.gnu.org/archive/html/guile-devel/2019-08/msg00030.html

* lightening/mips-cpu.c: Fix encoding of LR.  Thanks to Bruno Haible.
2020-01-06 21:58:04 +01:00
Andy Wingo
1c36f036f6 push/pop of link register does not affect stack size on x86
* lightening/x86-cpu.c (pop_link_register, push_link_register): Don't
  record stack size changes here.
2019-06-20 10:53:12 +02:00
Andy Wingo
62183fb098 Add jmpi_with_link instruction
The existing calli / callr interface is for ABI calls.  Sometimes though
you want to call some of your own code, just to get the current return
address.  ARM's branch-and-link instructions are ideal for this but they
don't exist on x86; there we emulate them by adding corresponding
pop_link_register / push_link_register instructions that are no-ops on
ARM.

* lightening.h (FOR_EACH_INSTRUCTION): Add jit_jmpi_with_link,
  pop_link_register, push_link_register.
* lightening/arm-cpu.c:
* lightening/x86-cpu.c:
* lightening/aarch64-cpu.c (jmpi_with_link, push_link_register)
  (pop_link_register): Add implementations.
* lightening/arm.h:
* lightening/aarch64.h:
* lightening/x86.h (JIT_LR): New definition.
* tests/link-register.c: New test.
2019-06-20 10:13:37 +02:00
Andy Wingo
84b9ef087b Add breakpoint instruction 2019-05-27 18:29:26 +02:00
Andy Wingo
23bfbbaac1 Fix accidental change to ARMv7 ldr 2019-05-27 13:52:36 +02:00
Andy Wingo
bcdde6656b Add atomic operations
These operations emit the same code that GCC does for corresponding
operations under the sequential consistency memory model.  It would be
possible to relax to acquire/release or something in the future.
2019-05-27 11:34:13 +02:00
Andy Wingo
909c0077cc Correctly handle overflow when emitting literal pools 2019-05-27 11:34:13 +02:00
Andy Wingo
ff6ab1d2b1 Silence "unused" warnings 2019-05-22 23:04:30 +02:00
Andy Wingo
0b3393415e Allow add_pending_literal to return false
This avoids invalidating offsets for the reloc.
2019-05-22 17:29:10 +02:00
Andy Wingo
b67c4ed1e1 Avoid recursive pool emit for aarch64; add another overflow check 2019-05-21 16:05:03 +02:00
Andy Wingo
33754ba8c7 AArch64 fix 2019-05-21 15:34:40 +02:00
Andy Wingo
b7f367165f Various fixes for as-needed emission of literal pool 2019-05-21 15:25:08 +02:00
Andy Wingo
568fdecc86 Fix literal pool emission on armv7 2019-05-21 14:19:48 +02:00
Andy Wingo
0518651bfd Expose API to bless function pointers
On ARMv7, we need to set the low bit to indicate that we're in
thumb-land.
2019-05-21 14:00:04 +02:00
Andy Wingo
ef7abb568a Fix typo in previous commit, doh 2019-05-21 12:44:00 +02:00
Andy Wingo
d2c15dd6cd Clear literal pool more thoroughly 2019-05-21 12:38:53 +02:00
Andy Wingo
723f70ee11 Clear missing bit from literal pool 2019-05-21 12:24:20 +02:00
Andy Wingo
f49752eac0 Avoid using x18 on AArch64 2019-05-21 12:02:40 +02:00
Andy Wingo
58fc136722 Fix bounds checking on negative ldr offsets for aarch64 2019-05-20 21:35:42 +02:00
Andy Wingo
0b723c0401 ARMv7 backend passing all tests! 2019-05-20 15:20:33 +02:00
Andy Wingo
7dd18bddd7 ARMv7 backend compiling without warnings 2019-05-20 11:02:21 +02:00