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16 commits

Author SHA1 Message Date
Andy Wingo
43262c0962 aarch64: Add support for LSE atomics
* lightening/aarch64-cpu.c (SWPAL, CASAL): New instructions.
(swap_atomic, cas_atomic): Use better instructions if we have LSE.
* lightening/aarch64.c (get_hwcap, jit_get_cpu): Arrange to detect LSE
availability on GNU/Linux and Darwin.

Based on a patch by Tony Garnock-Jones.  Thanks!
2024-04-22 15:03:01 +02:00
Tony Garnock-Jones
2c0126e3ef aarch64: Fix swap_atomic retry
* lightening/aarch64-cpu.c (swap_atomic): If the swap fails, and the dst
register was the same as the val, we would stomple val during the retry.
Fixes https://github.com/wingo/fibers/issues/83#issuecomment-2068847127.
2024-04-22 15:03:01 +02:00
Andy Wingo
62183fb098 Add jmpi_with_link instruction
The existing calli / callr interface is for ABI calls.  Sometimes though
you want to call some of your own code, just to get the current return
address.  ARM's branch-and-link instructions are ideal for this but they
don't exist on x86; there we emulate them by adding corresponding
pop_link_register / push_link_register instructions that are no-ops on
ARM.

* lightening.h (FOR_EACH_INSTRUCTION): Add jit_jmpi_with_link,
  pop_link_register, push_link_register.
* lightening/arm-cpu.c:
* lightening/x86-cpu.c:
* lightening/aarch64-cpu.c (jmpi_with_link, push_link_register)
  (pop_link_register): Add implementations.
* lightening/arm.h:
* lightening/aarch64.h:
* lightening/x86.h (JIT_LR): New definition.
* tests/link-register.c: New test.
2019-06-20 10:13:37 +02:00
Andy Wingo
84b9ef087b Add breakpoint instruction 2019-05-27 18:29:26 +02:00
Andy Wingo
bcdde6656b Add atomic operations
These operations emit the same code that GCC does for corresponding
operations under the sequential consistency memory model.  It would be
possible to relax to acquire/release or something in the future.
2019-05-27 11:34:13 +02:00
Andy Wingo
ff6ab1d2b1 Silence "unused" warnings 2019-05-22 23:04:30 +02:00
Andy Wingo
b67c4ed1e1 Avoid recursive pool emit for aarch64; add another overflow check 2019-05-21 16:05:03 +02:00
Andy Wingo
33754ba8c7 AArch64 fix 2019-05-21 15:34:40 +02:00
Andy Wingo
b7f367165f Various fixes for as-needed emission of literal pool 2019-05-21 15:25:08 +02:00
Andy Wingo
568fdecc86 Fix literal pool emission on armv7 2019-05-21 14:19:48 +02:00
Andy Wingo
58fc136722 Fix bounds checking on negative ldr offsets for aarch64 2019-05-20 21:35:42 +02:00
Andy Wingo
f2d7321504 Aarch64 backend avoids needless temporary register allocation 2019-05-16 11:31:50 +02:00
Andy Wingo
a643f99d68 Fix compilation on aarch64 2019-05-16 10:19:02 +02:00
Andy Wingo
5b8262e804 Rework register saving to avoid push/pop
Push and pop are not well supported on AArch64, so we might as well just
bump the stack pointer once and fill in by offset.
2019-05-15 15:41:02 +02:00
Andy Wingo
19e7712358 First pass at aarch64 assembler port 2019-05-14 15:46:19 +02:00
Andy Wingo
f348b8ed6d Change headers and files to be named "lightening" instead of "jit"
This improves integration with other projects.  Like for example Guile
already has files named jit.c and jit.h; it's easier to manage if
lightening uses its own file names.
2019-04-03 13:57:48 +02:00
Renamed from jit/aarch64-cpu.c (Browse further)