Andy Wingo
9d4185af2b
Remove jit_nop
...
Instead, jit_align will call nop() internally. You can't nop 3 bytes on
most architectures.
2019-05-16 11:40:24 +02:00
Andy Wingo
5b8262e804
Rework register saving to avoid push/pop
...
Push and pop are not well supported on AArch64, so we might as well just
bump the stack pointer once and fill in by offset.
2019-05-15 15:41:02 +02:00
Andy Wingo
0bfdcc7016
Refactor to add support for constant tables, shifted relocs
2019-05-14 15:53:25 +02:00
Andy Wingo
fc9b474da6
Refactor some bits from x86 to lightening
2019-05-10 14:14:32 +02:00
Andy Wingo
570f361c6c
Remove Sparc support
...
Sadly, this is a dead architecture, without an official Debian port.
Rest in peace!
2019-05-08 21:44:03 +02:00
Andy Wingo
ced3c42dee
Remove hppa support
...
This is a dead architecture without an official Debian port.
2019-05-08 21:44:03 +02:00
Andy Wingo
d51bd7d592
Remove alpha support
...
This is a dead architecture without an official Debian port.
2019-05-08 21:44:01 +02:00
Andy Wingo
80f79fca93
Remove ia64 (itanium) support
...
This is a dead architecture without an official Debian port.
2019-05-08 21:37:40 +02:00
Andy Wingo
42bc762d26
Add facility to enter and leave JIT ABI
...
This allows us to save and restore callee-save temporaries, i.e. RBP on
32-bit x86. Otherwise it's a disaster shuffling stack arguments using
temporaries.
2019-04-26 17:28:29 +02:00
Andy Wingo
e9d1567f7f
Use jit_word_t for register-sized values instead of intmax_t
2019-04-26 15:00:29 +02:00
Andy Wingo
04d89a7ce2
Implement reloc shortening, and remove unused functionality
2019-04-26 12:40:44 +02:00
Andy Wingo
dc28ac03c1
Make jit_align_stack and jit_shrink_stack public
2019-04-26 10:04:04 +02:00
Andy Wingo
e29977a82b
Simplify register representation even more
...
The register structures just contain the regno. Since the only flag is
the callee-save flag, we can punt that to a separate per-backend,
per-target predicate.
2019-04-25 23:22:44 +02:00
Andy Wingo
2602f17fb4
Simplify register representation again
...
There's only one flag, "callee-save". Also the regno range is limited
to 0-63 inclusive, to allow for cheap register sets as uint64_t values.
2019-04-25 19:12:55 +02:00
Andy Wingo
ddd66a2f34
Simplify register representation
...
Instead of JIT_R0 being a wrapped index into a table which then gives
the regno and class, just have JIT_R0 be the wrapped regno and class.
2019-04-25 17:03:46 +02:00
Andy Wingo
4db777e12e
Add support for operand addends
...
This can allow for better register allocation around calls for field
locations.
2019-04-24 15:52:07 +02:00
Andy Wingo
d07dac40ad
Add proper parallel-moves solver
...
Add parallel assignment serializer from Guile, originating in the Caml
paper by Rideau et al.
2019-04-24 15:08:35 +02:00
Andy Wingo
0be4f7a2a1
Simplify API for loading call arguments
2019-04-22 09:15:03 +02:00
Andy Wingo
bbfb03ac30
Fix implementation of jit_{gpr,fpr}_is_callee_save
2019-04-04 11:08:54 +02:00
Andy Wingo
0903a01812
Add jit_same_{gprs,fprs} helpers
2019-04-03 19:23:36 +02:00
Andy Wingo
22d06620ee
Allow users to pass custom allocators
2019-04-03 15:25:21 +02:00
Andy Wingo
f348b8ed6d
Change headers and files to be named "lightening" instead of "jit"
...
This improves integration with other projects. Like for example Guile
already has files named jit.c and jit.h; it's easier to manage if
lightening uses its own file names.
2019-04-03 13:57:48 +02:00
