Shea Levy 08bb462836 Recognize RISC-V compilation targets. ... * module/system/base/target.scm (cpu-endianness): Add case for "riscv" variants. Signed-off-by: Shea Levy <shea@shealevy.com> Signed-off-by: Mark H Weaver <mhw@netris.org>		2018-03-15 23:15:44 -04:00
..
ice-9	Revert "Honor '%fresh-auto-compile'."	2018-01-15 23:17:24 +01:00
language	Avoid generating arity-adapting zero-value conts where possible	2017-12-01 11:01:39 +01:00
oop	Add struct-ref/unboxed, struct-set!/unboxed	2017-09-25 21:54:36 +02:00
rnrs	Use make-struct/no-tail instead of make-struct	2017-09-20 22:07:18 +02:00
scripts	compile: Load language modules upfront.	2017-12-22 17:00:33 +01:00
srfi	srfi-18: 'thread-sleep!' timeout-as-a-number is relative.	2018-02-16 15:29:35 +01:00
sxml	Remove duplicate definitions of call/ec' and let/ec'.	2013-04-06 15:40:19 +02:00
system	Recognize RISC-V compilation targets.	2018-03-15 23:15:44 -04:00
texinfo	texinfo: Remove unnecessary (oop goops) dependency.	2017-03-01 19:28:04 +01:00
web	http: Fix typo in proxy handling in 'write-request-line'.	2017-11-11 15:14:54 +01:00
Makefile.am	Fix sort, sort! for arrays with nonzero lower bound	2017-10-31 13:23:17 +01:00
rnrs.scm	Add R6RS bytevector->string, string->bytevector	2016-06-21 11:29:14 +02:00
statprof.scm	Fixed bug: statprof flat display wasn't writing summary lines to port	2017-04-19 16:25:00 +02:00
texinfo.scm	texinfo: fix @url{@@} parsing	2014-11-09 15:56:33 +00:00