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git-archimport-id: bonzini@gnu.org--2004b/lightning--stable--1.2--patch-15 git-archimport-id: bonzini@gnu.org--2004b/lightning--stable--1.2--patch-16
347 lines
15 KiB
C
347 lines
15 KiB
C
/******************************** -*- C -*- ****************************
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*
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* Run-time assembler & support macros for the i386 math coprocessor
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*
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***********************************************************************/
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/***********************************************************************
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*
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* Copyright 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
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* Written by Paolo Bonzini.
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*
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* This file is part of GNU lightning.
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*
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* GNU lightning is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; either version 2.1, or (at your option)
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* any later version.
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*
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* GNU lightning is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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* License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with GNU lightning; see the file COPYING.LESSER; if not, write to the
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* Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*
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***********************************************************************/
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#ifndef __lightning_asm_fp_h
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#define __lightning_asm_fp_h
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/* We really must map the x87 stack onto a flat register file. In practice,
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we can provide something sensible and make it work on the x86 using the
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stack like a file of eight registers.
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We use six or seven registers so as to have some freedom
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for floor, ceil, round, (and log, tan, atn and exp).
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Not hard at all, basically play with FXCH. FXCH is mostly free,
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so the generated code is not bad. Of course we special case when one
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of the operands turns out to be ST0.
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Here are the macros that actually do the trick. */
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#define JIT_FPR_NUM 6
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#define JIT_FPR(i) (i)
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#define jit_fxch(rs, op) (((rs) != 0 ? FXCHr(rs) : 0), \
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op, ((rs) != 0 ? FXCHr(rs) : 0))
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#define jit_fp_unary(rd, s1, op) \
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((rd) == (s1) ? jit_fxch ((rd), op) \
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: (rd) == 0 ? (FSTPr (0), FLDr ((s1)-1), op) \
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: (FLDr ((s1)), op, FSTPr ((rd))))
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#define jit_fp_binary(rd, s1, s2, op, opr) \
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((rd) == (s1) ? \
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((s2) == 0 ? opr(0, (rd)) \
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: (s2) == (s1) ? jit_fxch((rd), op(0, 0)) \
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: jit_fxch((rd), op((s2), 0))) \
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: (rd) == (s2) ? jit_fxch((s1), opr(0, (rd) == 0 ? (s1) : (rd))) \
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: (FLDr (s1), op(0, (s2)+1), FSTPr((rd)+1)))
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#define jit_addr_d(rd,s1,s2) jit_fp_binary((rd),(s1),(s2),FADDrr,FADDrr)
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#define jit_subr_d(rd,s1,s2) jit_fp_binary((rd),(s1),(s2),FSUBrr,FSUBRrr)
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#define jit_mulr_d(rd,s1,s2) jit_fp_binary((rd),(s1),(s2),FMULrr,FMULrr)
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#define jit_divr_d(rd,s1,s2) jit_fp_binary((rd),(s1),(s2),FDIVrr,FDIVRrr)
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#define jit_abs_d(rd,rs) jit_fp_unary ((rd), (rs), _OO (0xd9e1))
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#define jit_negr_d(rd,rs) jit_fp_unary ((rd), (rs), _OO (0xd9e0))
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#define jit_sqrt_d(rd,rs) jit_fp_unary ((rd), (rs), _OO (0xd9fa))
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/* - moves:
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move FPR0 to FPR3
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FST ST3
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move FPR3 to FPR0
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FXCH ST3
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FST ST3
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move FPR3 to FPR1
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FLD ST1
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FST ST4 Stack is rotated, so FPRn becomes STn+1 */
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#define jit_movr_d(rd,s1) \
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((s1) == (rd) ? 0 \
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: (s1) == 0 ? FSTr ((rd)) \
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: (rd) == 0 ? (FXCHr ((s1)), FSTr ((s1))) \
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: (FLDr ((s1)), FSTr ((rd)+1)))
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/* - loads:
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load into FPR0
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FSTP ST0
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FLD [FUBAR]
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load into FPR3
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FSTP ST3 Save old st0 into destination register
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FLD [FUBAR]
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FXCH ST3 Get back old st0
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(and similarly for immediates, using the stack) */
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#define jit_movi_f(rd,immf) \
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(_O (0x68), \
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*((float *) _jit.x.pc) = (float) immf, \
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_jit.x.uc_pc += sizeof (float), \
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jit_ldr_f((rd), _ESP), \
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ADDLir(4, _ESP))
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union jit_double_imm {
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double d;
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int i[2];
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};
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#define jit_movi_d(rd,immd) \
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(_O (0x68), \
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_jit.x.uc_pc[4] = 0x68, \
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((union jit_double_imm *) (_jit.x.uc_pc + 5))->d = (double) immd, \
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*((int *) _jit.x.uc_pc) = ((union jit_double_imm *) (_jit.x.uc_pc + 5))->i[1], \
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_jit.x.uc_pc += 9, \
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jit_ldr_d((rd), _ESP), \
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ADDLir(8, _ESP))
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#define jit_ldi_f(rd, is) \
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((rd) == 0 ? (FSTPr (0), FLDSm((is), 0, 0, 0)) \
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: (FLDSm((is), 0, 0, 0), FSTPr ((rd) + 1)))
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#define jit_ldi_d(rd, is) \
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((rd) == 0 ? (FSTPr (0), FLDLm((is), 0, 0, 0)) \
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: (FLDLm((is), 0, 0, 0), FSTPr ((rd) + 1)))
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#define jit_ldr_f(rd, rs) \
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((rd) == 0 ? (FSTPr (0), FLDSm(0, (rs), 0, 0)) \
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: (FLDSm(0, (rs), 0, 0), FSTPr ((rd) + 1)))
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#define jit_ldr_d(rd, rs) \
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((rd) == 0 ? (FSTPr (0), FLDLm(0, (rs), 0, 0)) \
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: (FLDLm(0, (rs), 0, 0), FSTPr ((rd) + 1)))
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#define jit_ldxi_f(rd, rs, is) \
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((rd) == 0 ? (FSTPr (0), FLDSm((is), (rs), 0, 0)) \
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: (FLDSm((is), (rs), 0, 0), FSTPr ((rd) + 1)))
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#define jit_ldxi_d(rd, rs, is) \
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((rd) == 0 ? (FSTPr (0), FLDLm((is), (rs), 0, 0)) \
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: (FLDLm((is), (rs), 0, 0), FSTPr ((rd) + 1)))
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#define jit_ldxr_f(rd, s1, s2) \
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((rd) == 0 ? (FSTPr (0), FLDSm(0, (s1), (s2), 1)) \
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: (FLDSm(0, (s1), (s2), 1), FSTPr ((rd) + 1)))
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#define jit_ldxr_d(rd, s1, s2) \
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((rd) == 0 ? (FSTPr (0), FLDLm(0, (s1), (s2), 1)) \
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: (FLDLm(0, (s1), (s2), 1), FSTPr ((rd) + 1)))
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#define jit_extr_i_d(rd, rs) (PUSHLr((rs)), \
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((rd) == 0 ? (FSTPr (0), FILDLm(0, _ESP, 0, 0)) \
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: (FILDLm(0, _ESP, 0, 0), FSTPr ((rd) + 1))), \
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POPLr((rs)))
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#define jit_stxi_f(id, rd, rs) jit_fxch ((rs), FSTSm((id), (rd), 0, 0))
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#define jit_stxr_f(d1, d2, rs) jit_fxch ((rs), FSTSm(0, (d1), (d2), 1))
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#define jit_stxi_d(id, rd, rs) jit_fxch ((rs), FSTLm((id), (rd), 0, 0))
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#define jit_stxr_d(d1, d2, rs) jit_fxch ((rs), FSTLm(0, (d1), (d2), 1))
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#define jit_sti_f(id, rs) jit_fxch ((rs), FSTSm((id), 0, 0, 0))
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#define jit_str_f(rd, rs) jit_fxch ((rs), FSTSm(0, (rd), 0, 0))
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#define jit_sti_d(id, rs) jit_fxch ((rs), FSTLm((id), 0, 0, 0))
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#define jit_str_d(rd, rs) jit_fxch ((rs), FSTLm(0, (rd), 0, 0))
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/* Assume round to near mode */
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#define jit_floorr_d_i(rd, rs) \
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(FLDr (rs), jit_floor2((rd), ((rd) == _EDX ? _EAX : _EDX)))
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#define jit_ceilr_d_i(rd, rs) \
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(FLDr (rs), jit_ceil2((rd), ((rd) == _EDX ? _EAX : _EDX)))
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#define jit_truncr_d_i(rd, rs) \
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(FLDr (rs), jit_trunc2((rd), ((rd) == _EDX ? _EAX : _EDX)))
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#define jit_calc_diff(ofs) \
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FISTLm(ofs, _ESP, 0, 0), \
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FILDLm(ofs, _ESP, 0, 0), \
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FSUBRPr(1), \
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FSTPSm(4+ofs, _ESP, 0, 0) \
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/* The real meat */
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#define jit_floor2(rd, aux) \
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(PUSHLr(aux), \
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SUBLir(8, _ESP), \
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jit_calc_diff(0), \
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POPLr(rd), /* floor in rd */ \
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POPLr(aux), /* x-round(x) in aux */ \
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ADDLir(0x7FFFFFFF, aux), /* carry if x-round(x) < -0 */ \
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SBBLir(0, rd), /* subtract 1 if carry */ \
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POPLr(aux))
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#define jit_ceil2(rd, aux) \
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(PUSHLr(aux), \
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SUBLir(8, _ESP), \
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jit_calc_diff(0), \
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POPLr(rd), /* floor in rd */ \
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POPLr(aux), /* x-round(x) in aux */ \
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TESTLrr(aux, aux), \
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SETGr(jit_reg8(aux)), \
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SHRLir(1, aux), \
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ADCLir(0, rd), \
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POPLr(aux))
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/* a mingling of the two above */
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#define jit_trunc2(rd, aux) \
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(PUSHLr(aux), \
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SUBLir(12, _ESP), \
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FSTSm(0, _ESP, 0, 0), \
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jit_calc_diff(4), \
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POPLr(aux), \
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POPLr(rd), \
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TESTLrr(aux, aux), \
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POPLr(aux), \
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JSSm(_jit.x.pc + 11, 0, 0, 0), \
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ADDLir(0x7FFFFFFF, aux), /* 6 */ \
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SBBLir(0, rd), /* 3 */ \
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JMPSm(_jit.x.pc + 10, 0, 0, 0), /* 2 */ \
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TESTLrr(aux, aux), /* 2 */ \
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SETGr(jit_reg8(aux)), /* 3 */ \
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SHRLir(1, aux), /* 2 */ \
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ADCLir(0, rd), /* 3 */ \
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POPLr(aux))
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/* the easy one */
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#define jit_roundr_d_i(rd, rs) \
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(PUSHLr(_EAX), \
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jit_fxch ((rs), FISTPLm(0, _ESP, 0, 0)), \
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POPLr((rd)))
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#define jit_fp_test(d, s1, s2, n, _and, res) \
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(((s1) == 0 ? FUCOMr((s2)) : (FLDr((s1)), FUCOMPr((s2) + 1))), \
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((d) != _EAX ? MOVLrr(_EAX, (d)) : 0), \
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FNSTSWr(_EAX), \
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SHRLir(n, _EAX), \
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((_and) ? ANDLir((_and), _EAX) : MOVLir(0, _EAX)), \
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res, \
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((d) != _EAX ? _O (0x90 + ((d) & 7)) : 0)) /* xchg */
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#define jit_fp_btest(d, s1, s2, n, _and, cmp, res) \
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(((s1) == 0 ? FUCOMr((s2)) : (FLDr((s1)), FUCOMPr((s2) + 1))), \
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PUSHLr(_EAX), \
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FNSTSWr(_EAX), \
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SHRLir(n, _EAX), \
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((_and) ? ANDLir ((_and), _EAX) : 0), \
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((cmp) ? CMPLir ((cmp), _AL) : 0), \
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POPLr(_EAX), \
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res ((d), 0, 0, 0))
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#define jit_nothing_needed(x)
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/* After FNSTSW we have 1 if <, 40 if =, 0 if >, 45 if unordered. Here
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is how to map the values of the status word's high byte to the
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conditions.
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< = > unord valid values condition
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gt no no yes no 0 STSW & 45 == 0
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lt yes no no no 1 STSW & 45 == 1
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eq no yes no no 40 STSW & 45 == 40
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unord no no no yes 45 bit 2 == 1
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ge no yes no no 0, 40 bit 0 == 0
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unlt yes no no yes 1, 45 bit 0 == 1
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ltgt yes no yes no 0, 1 bit 6 == 0
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uneq no yes no yes 40, 45 bit 6 == 1
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le yes yes no no 1, 40 odd parity for STSW & 41
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ungt no no yes yes 0, 45 even parity for STSW & 41
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unle yes yes no yes 1, 40, 45 STSW & 45 != 0
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unge no yes yes yes 0, 40, 45 STSW & 45 != 1
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ne yes no yes yes 0, 1, 45 STSW & 45 != 40
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ord yes yes yes no 0, 1, 40 bit 2 == 0
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lt, le, ungt, unge are actually computed as gt, ge, unlt, unle with
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the operands swapped; it is more efficient this way. */
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#define jit_gtr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 8, 0x45, SETZr (_AL))
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#define jit_ger_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 9, 0, SBBBir (-1, _AL))
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#define jit_unler_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 8, 0x45, SETNZr (_AL))
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#define jit_unltr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 9, 0, ADCBir (0, _AL))
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#define jit_ltr_d(d, s1, s2) jit_fp_test((d), (s2), (s1), 8, 0x45, SETZr (_AL))
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#define jit_ler_d(d, s1, s2) jit_fp_test((d), (s2), (s1), 9, 0, SBBBir (-1, _AL))
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#define jit_unger_d(d, s1, s2) jit_fp_test((d), (s2), (s1), 8, 0x45, SETNZr (_AL))
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#define jit_ungtr_d(d, s1, s2) jit_fp_test((d), (s2), (s1), 9, 0, ADCBir (0, _AL))
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#define jit_eqr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 8, 0x45, (CMPBir (0x40, _AL), SETEr (_AL)))
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#define jit_ner_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 8, 0x45, (CMPBir (0x40, _AL), SETNEr (_AL)))
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#define jit_ltgtr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 15, 0, SBBBir (-1, _AL))
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#define jit_uneqr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 15, 0, ADCBir (0, _AL))
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#define jit_ordr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 11, 0, SBBBir (-1, _AL))
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#define jit_unordr_d(d, s1, s2) jit_fp_test((d), (s1), (s2), 11, 0, ADCBir (0, _AL))
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#define jit_bgtr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 8, 0x45, 0, JZm)
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#define jit_bger_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 9, 0, 0, JNCm)
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#define jit_bunler_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 8, 0x45, 0, JNZm)
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#define jit_bunltr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 9, 0, 0, JCm)
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#define jit_bltr_d(d, s1, s2) jit_fp_btest((d), (s2), (s1), 8, 0x45, 0, JZm)
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#define jit_bler_d(d, s1, s2) jit_fp_btest((d), (s2), (s1), 9, 0, 0, JNCm)
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#define jit_bunger_d(d, s1, s2) jit_fp_btest((d), (s2), (s1), 8, 0x45, 0, JNZm)
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#define jit_bungtr_d(d, s1, s2) jit_fp_btest((d), (s2), (s1), 9, 0, 0, JCm)
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#define jit_beqr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 8, 0x45, 0x40, JZm)
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#define jit_bner_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 8, 0x45, 0x40, JNZm)
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#define jit_bltgtr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 15, 0, 0, JNCm)
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#define jit_buneqr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 15, 0, 0, JCm)
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#define jit_bordr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 11, 0, 0, JNCm)
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#define jit_bunordr_d(d, s1, s2) jit_fp_btest((d), (s1), (s2), 11, 0, 0, JCm)
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#define jit_getarg_f(rd, ofs) jit_ldxi_f((rd), JIT_FP,(ofs))
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#define jit_getarg_d(rd, ofs) jit_ldxi_d((rd), JIT_FP,(ofs))
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#define jit_pusharg_d(rs) (jit_subi_i(JIT_SP,JIT_SP,sizeof(double)), jit_str_d(JIT_SP,(rs)))
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#define jit_pusharg_f(rs) (jit_subi_i(JIT_SP,JIT_SP,sizeof(float)), jit_str_f(JIT_SP,(rs)))
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#define jit_retval_d(op1) jit_movr_d(0, (op1))
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#if 0
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#define jit_sin() _OO(0xd9fe) /* fsin */
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#define jit_cos() _OO(0xd9ff) /* fcos */
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#define jit_tan() (_OO(0xd9f2), /* fptan */ \
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FSTPr(0)) /* fstp st */
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#define jit_atn() (_OO(0xd9e8), /* fld1 */ \
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_OO(0xd9f3)) /* fpatan */
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#define jit_exp() (_OO(0xd9ea), /* fldl2e */ \
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FMULPr(1), /* fmulp */ \
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_OO(0xd9c0), /* fld st */ \
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_OO(0xd9fc), /* frndint */ \
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_OO(0xdce9), /* fsubr */ \
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FXCHr(1), /* fxch st(1) */ \
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_OO(0xd9f0), /* f2xm1 */ \
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_OO(0xd9e8), /* fld1 */ \
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_OO(0xdec1), /* faddp */ \
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_OO(0xd9fd), /* fscale */ \
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FSTPr(1)) /* fstp st(1) */
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#define jit_log() (_OO(0xd9ed), /* fldln2 */ \
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FXCHr(1), /* fxch st(1) */ \
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_OO(0xd9f1)) /* fyl2x */
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#endif
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#endif /* __lightning_asm_h */
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