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f31fb0044d
The problem with callr is that the register that contains the function to be called, can be overwritten by the logic that moves the values into argument registers. To fix this, I added a get_callr_temp function that should return a platform specific register that is not used to pass arguments. For Aarch64/Arm the link registers seems to work; for Amd64/i686 the RAX register. The function/tmp pair becomes an additional argument to the parallel assigment; this way the original function register is not accidentally overwritten. The problem with calli is that it may not have enough temp registers to move arguments. The windmill paper says that at most one temporary register is needed for the parallel assignment. However, we also need a temp register for mem-to-mem moves. So it seems that we need a second temporary. For Amd64/i686 we have only one temporary GPR and one temporary FPR. To fix this, I modified the algorithm from the paper a bit: we perform the mem-to-mem moves before the other moves. Later when we need the temp to break cycles, there shouldn't be any mem-to-mem moves left. So we should never need two temps at the same time. * lightening/lightening.c: (get_callr_temp): New function; need for each platform. (prepare_call_args): Include the function/callr_temp pair in the arguments for the parallel assignment. * lightening/x86.c, lightening/arm.c, lightening/aarch64.c (get_callr_temp): Implementation for each platform. * lightening/arm.c (next_abi_arg): Fix the stack size for doubles. * tests/call_10_2.c, tests/callr_10.c: New tests. * tests/regarrays.inc: New file. Common code between the above two tests that would be tedious to duplicate.
66 lines
2 KiB
C
66 lines
2 KiB
C
#include "test.h"
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#include "regarrays.inc"
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static int32_t f(int32_t a, int32_t b, int32_t c, int32_t d, int32_t e,
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int32_t f, int32_t g, int32_t h, int32_t i, int32_t j) {
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ASSERT(a == 0);
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ASSERT(b == 1);
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ASSERT(c == 2);
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ASSERT(d == 3);
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ASSERT(e == 4);
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ASSERT(f == 5);
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ASSERT(g == 6);
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ASSERT(h == 7);
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ASSERT(i == 8);
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ASSERT(j == 9);
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return 42;
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}
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static void
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run_test_2 (jit_state_t *j, uint8_t *arena_base, size_t arena_size,
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jit_gpr_t base, jit_gpr_t fun)
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{
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jit_begin(j, arena_base, arena_size);
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size_t align = jit_enter_jit_abi(j, v_count, 0, 0);
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jit_load_args_1(j, jit_operand_gpr (JIT_OPERAND_ABI_POINTER, base));
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jit_operand_t args[10] = {
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 0 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 1 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 2 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 3 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 4 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 5 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 6 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 7 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 8 * sizeof(int32_t)),
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jit_operand_mem(JIT_OPERAND_ABI_INT32, base, 9 * sizeof(int32_t))
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};
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jit_movi(j, fun, (uintptr_t)f);
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jit_callr(j, fun, 10, args);
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jit_leave_jit_abi(j, v_count, 0, align);
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jit_ret(j);
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size_t size = 0;
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void* ret = jit_end(j, &size);
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int32_t (*f)(int32_t*) = ret;
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int32_t iargs[10] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
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ASSERT(f(iargs) == 42);
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}
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static void
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run_test (jit_state_t *jit, uint8_t *arena_base, size_t arena_size)
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{
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for (unsigned i = 0; i < gpr_count; i++)
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for (unsigned j = 0; j < gpr_count; j++)
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if (i != j)
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run_test_2 (jit, arena_base, arena_size, gpr_ref(i), gpr_ref(j));
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}
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int
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main (int argc, char *argv[])
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{
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return main_helper(argc, argv, run_test);
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}
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