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66c8a682af
2008-06-17 Paolo Bonzini <bonzini@gnu.org> * lightning/i386/asm-64.h: Forward IMULQir to IMULQirr, fix REXQ order for IMULQirr.
386 lines
18 KiB
C
386 lines
18 KiB
C
/******************************** -*- C -*- ****************************
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*
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* Run-time assembler for the x86-64
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*
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***********************************************************************/
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/***********************************************************************
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*
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* Copyright 2003 Gwenole Beauchesne
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* Copyright 2006 Free Software Foundation, Inc.
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*
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* This file is part of GNU lightning.
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*
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* GNU lightning is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* GNU lightning is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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* License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with GNU lightning; see the file COPYING.LESSER; if not, write to the
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* Free Software Foundation, 59 Temple Place - Suite 330, Boston,
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* MA 02111-1307, USA.
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*
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***********************************************************************/
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#ifndef __lightning_asm_h
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#define __lightning_asm_h
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#ifndef LIGHTNING_DEBUG
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/* OPCODE + i = immediate operand
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* + r = register operand
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* + m = memory operand (disp,base,index,scale)
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* + sr/sm = a star preceding a register or memory
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*/
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#define _rA(R) _r8(R)
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/* Use RIP-addressing in 64-bit mode, if possible */
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#if 0
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#define _x86_RIP_addressing_possible(D,O) (X86_RIP_RELATIVE_ADDR && \
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((unsigned long)x86_get_target() + 4 + (O) - (D) <= 0xffffffff))
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#define _r_X( R, D,B,I,S,O) (_r0P(I) ? (_r0P(B) ? (!X86_TARGET_64BIT ? _r_D(R,D) : \
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(_x86_RIP_addressing_possible(D, O) ? \
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_r_D(R, (D) - ((unsigned long)x86_get_target() + 4 + (O))) : \
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_r_DSIB(R,D))) : \
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_r_DSIB(R,D )) : \
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(_rIP(B) ? _r_D (R,D ) : \
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(_rsp12P(B) ? _r_DBIS(R,D,_RSP,_RSP,1) : \
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_r_DB (R,D, B )))) : \
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(_r0P(B) ? _r_4IS (R,D, I,S) : \
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(!_rspP(I) ? _r_DBIS(R,D, B, I,S) : \
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JITFAIL("illegal index register: %esp"))))
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#else
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#define _r_X( R, D,B,I,S,O) (_r0P(I) ? (_r0P(B) ? _r_DSIB(R,D ) : \
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(_rIP(B) ? _r_D (R,D ) : \
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(_rsp12P(B) ? _r_DBIS(R,D,_RSP,_RSP,1) : \
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_r_DB (R,D, B )))) : \
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(_r0P(B) ? _r_4IS (R,D, I,S) : \
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(!_rspP(I) ? _r_DBIS(R,D, B, I,S) : \
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JITFAIL("illegal index register: %esp"))))
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#endif
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#define _m32only(X) (JITFAIL("invalid instruction in 64-bit mode"))
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#define _m64only(X) (X)
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#define _m64(X) (X)
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#define _SPL 0x14
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#define _BPL 0x15
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#define _SIL 0x16
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#define _DIL 0x17
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#define _R8B 0x18
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#define _R9B 0x19
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#define _R10B 0x1A
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#define _R11B 0x1B
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#define _R12B 0x1C
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#define _R13B 0x1D
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#define _R14B 0x1E
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#define _R15B 0x1F
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#define _R8W 0x38
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#define _R9W 0x39
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#define _R10W 0x3A
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#define _R11W 0x3B
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#define _R12W 0x3C
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#define _R13W 0x3D
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#define _R14W 0x3E
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#define _R15W 0x3F
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#define _R8D 0x48
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#define _R9D 0x49
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#define _R10D 0x4A
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#define _R11D 0x4B
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#define _R12D 0x4C
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#define _R13D 0x4D
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#define _R14D 0x4E
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#define _R15D 0x4F
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#define _RAX 0x50
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#define _RCX 0x51
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#define _RDX 0x52
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#define _RBX 0x53
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#define _RSP 0x54
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#define _RBP 0x55
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#define _RSI 0x56
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#define _RDI 0x57
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#define _R8 0x48
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#define _R9 0x49
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#define _R10 0x4A
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#define _R11 0x4B
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#define _R12 0x4C
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#define _R13 0x4D
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#define _R14 0x4E
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#define _R15 0x4F
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#define _RIP -2
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#if defined(_ASM_SAFETY)
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#define _r1(R) ( ((unsigned) _rC((R) - 16)) < (0x30 - 16) ? _rN(R) : JITFAIL( "8-bit register required"))
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#if 0
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#define _r8(R) ( (_rC(R) == 0x50) ? _rN(R) : JITFAIL("64-bit register required"))
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#else
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#define _r8(R) ( (_rC(R) == 0x50) ? _rN(R) : _r4(R))
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#endif
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#endif
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#define _r1e8lP(R) ((int)(R) >= _SPL && (int)(R) <= _DIL)
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#define DECWr(RD) (_d16(), _REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b001 ,_r2(RD) ))
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#define DECLr(RD) (_REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b001 ,_r4(RD) ))
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#define INCWr(RD) (_d16(), _REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b000 ,_r2(RD) ))
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#define INCLr(RD) (_REXLrr(0, RD), _O_Mrm (0xff ,_b11,_b000 ,_r4(RD) ))
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#define ADCQrr(RS, RD) _ALUQrr(X86_ADC, RS, RD)
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#define ADCQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_ADC, MD, MB, MI, MS, RD)
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#define ADCQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_ADC, RS, MD, MB, MI, MS)
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#define ADCQir(IM, RD) _ALUQir(X86_ADC, IM, RD)
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#define ADCQim(IM, MD, MB, MI, MS) _ALUQim(X86_ADC, IM, MD, MB, MI, MS)
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#define ADDQrr(RS, RD) _ALUQrr(X86_ADD, RS, RD)
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#define ADDQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_ADD, MD, MB, MI, MS, RD)
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#define ADDQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_ADD, RS, MD, MB, MI, MS)
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#define ADDQir(IM, RD) _ALUQir(X86_ADD, IM, RD)
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#define ADDQim(IM, MD, MB, MI, MS) _ALUQim(X86_ADD, IM, MD, MB, MI, MS)
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#define ANDQrr(RS, RD) _ALUQrr(X86_AND, RS, RD)
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#define ANDQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_AND, MD, MB, MI, MS, RD)
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#define ANDQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_AND, RS, MD, MB, MI, MS)
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#define ANDQir(IM, RD) _ALUQir(X86_AND, IM, RD)
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#define ANDQim(IM, MD, MB, MI, MS) _ALUQim(X86_AND, IM, MD, MB, MI, MS)
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#define CMPQrr(RS, RD) _ALUQrr(X86_CMP, RS, RD)
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#define CMPQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_CMP, MD, MB, MI, MS, RD)
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#define CMPQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_CMP, RS, MD, MB, MI, MS)
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#define CMPQir(IM, RD) _ALUQir(X86_CMP, IM, RD)
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#define CMPQim(IM, MD, MB, MI, MS) _ALUQim(X86_CMP, IM, MD, MB, MI, MS)
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#define ORQrr(RS, RD) _ALUQrr(X86_OR, RS, RD)
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#define ORQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_OR, MD, MB, MI, MS, RD)
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#define ORQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_OR, RS, MD, MB, MI, MS)
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#define ORQir(IM, RD) _ALUQir(X86_OR, IM, RD)
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#define ORQim(IM, MD, MB, MI, MS) _ALUQim(X86_OR, IM, MD, MB, MI, MS)
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#define SBBQrr(RS, RD) _ALUQrr(X86_SBB, RS, RD)
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#define SBBQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_SBB, MD, MB, MI, MS, RD)
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#define SBBQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_SBB, RS, MD, MB, MI, MS)
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#define SBBQir(IM, RD) _ALUQir(X86_SBB, IM, RD)
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#define SBBQim(IM, MD, MB, MI, MS) _ALUQim(X86_SBB, IM, MD, MB, MI, MS)
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#define SUBQrr(RS, RD) _ALUQrr(X86_SUB, RS, RD)
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#define SUBQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_SUB, MD, MB, MI, MS, RD)
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#define SUBQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_SUB, RS, MD, MB, MI, MS)
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#define SUBQir(IM, RD) _ALUQir(X86_SUB, IM, RD)
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#define SUBQim(IM, MD, MB, MI, MS) _ALUQim(X86_SUB, IM, MD, MB, MI, MS)
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#define XORQrr(RS, RD) _ALUQrr(X86_XOR, RS, RD)
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#define XORQmr(MD, MB, MI, MS, RD) _ALUQmr(X86_XOR, MD, MB, MI, MS, RD)
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#define XORQrm(RS, MD, MB, MI, MS) _ALUQrm(X86_XOR, RS, MD, MB, MI, MS)
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#define XORQir(IM, RD) _ALUQir(X86_XOR, IM, RD)
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#define XORQim(IM, MD, MB, MI, MS) _ALUQim(X86_XOR, IM, MD, MB, MI, MS)
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#define ROLQir(IM, RD) _ROTSHIQir(X86_ROL, IM, RD)
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#define ROLQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_ROL, IM, MD, MB, MI, MS)
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#define ROLQrr(RS, RD) _ROTSHIQrr(X86_ROL, RS, RD)
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#define ROLQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_ROL, RS, MD, MB, MI, MS)
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#define RORQir(IM, RD) _ROTSHIQir(X86_ROR, IM, RD)
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#define RORQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_ROR, IM, MD, MB, MI, MS)
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#define RORQrr(RS, RD) _ROTSHIQrr(X86_ROR, RS, RD)
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#define RORQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_ROR, RS, MD, MB, MI, MS)
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#define RCLQir(IM, RD) _ROTSHIQir(X86_RCL, IM, RD)
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#define RCLQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_RCL, IM, MD, MB, MI, MS)
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#define RCLQrr(RS, RD) _ROTSHIQrr(X86_RCL, RS, RD)
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#define RCLQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_RCL, RS, MD, MB, MI, MS)
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#define RCRQir(IM, RD) _ROTSHIQir(X86_RCR, IM, RD)
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#define RCRQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_RCR, IM, MD, MB, MI, MS)
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#define RCRQrr(RS, RD) _ROTSHIQrr(X86_RCR, RS, RD)
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#define RCRQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_RCR, RS, MD, MB, MI, MS)
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#define SHLQir(IM, RD) _ROTSHIQir(X86_SHL, IM, RD)
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#define SHLQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_SHL, IM, MD, MB, MI, MS)
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#define SHLQrr(RS, RD) _ROTSHIQrr(X86_SHL, RS, RD)
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#define SHLQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_SHL, RS, MD, MB, MI, MS)
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#define SHRQir(IM, RD) _ROTSHIQir(X86_SHR, IM, RD)
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#define SHRQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_SHR, IM, MD, MB, MI, MS)
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#define SHRQrr(RS, RD) _ROTSHIQrr(X86_SHR, RS, RD)
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#define SHRQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_SHR, RS, MD, MB, MI, MS)
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#define SALQir SHLQir
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#define SALQim SHLQim
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#define SALQrr SHLQrr
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#define SALQrm SHLQrm
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#define SARQir(IM, RD) _ROTSHIQir(X86_SAR, IM, RD)
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#define SARQim(IM, MD, MB, MI, MS) _ROTSHIQim(X86_SAR, IM, MD, MB, MI, MS)
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#define SARQrr(RS, RD) _ROTSHIQrr(X86_SAR, RS, RD)
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#define SARQrm(RS, MD, MB, MI, MS) _ROTSHIQrm(X86_SAR, RS, MD, MB, MI, MS)
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#define BTQir(IM, RD) _BTQir(X86_BT, IM, RD)
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#define BTQim(IM, MD, MB, MI, MS) _BTQim(X86_BT, IM, MD, MB, MI, MS)
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#define BTQrr(RS, RD) _BTQrr(X86_BT, RS, RD)
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#define BTQrm(RS, MD, MB, MI, MS) _BTQrm(X86_BT, RS, MD, MB, MI, MS)
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#define BTCQir(IM, RD) _BTQir(X86_BTC, IM, RD)
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#define BTCQim(IM, MD, MB, MI, MS) _BTQim(X86_BTC, IM, MD, MB, MI, MS)
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#define BTCQrr(RS, RD) _BTQrr(X86_BTC, RS, RD)
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#define BTCQrm(RS, MD, MB, MI, MS) _BTQrm(X86_BTC, RS, MD, MB, MI, MS)
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#define BTRQir(IM, RD) _BTQir(X86_BTR, IM, RD)
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#define BTRQim(IM, MD, MB, MI, MS) _BTQim(X86_BTR, IM, MD, MB, MI, MS)
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#define BTRQrr(RS, RD) _BTQrr(X86_BTR, RS, RD)
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#define BTRQrm(RS, MD, MB, MI, MS) _BTQrm(X86_BTR, RS, MD, MB, MI, MS)
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#define BTSQir(IM, RD) _BTQir(X86_BTS, IM, RD)
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#define BTSQim(IM, MD, MB, MI, MS) _BTQim(X86_BTS, IM, MD, MB, MI, MS)
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#define BTSQrr(RS, RD) _BTQrr(X86_BTS, RS, RD)
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#define BTSQrm(RS, MD, MB, MI, MS) _BTQrm(X86_BTS, RS, MD, MB, MI, MS)
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#define LEAQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _O_r_X (0x8d ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVQrr(RS, RD) (_REXQrr(RS, RD), _O_Mrm (0x89 ,_b11,_r8(RS),_r8(RD) ))
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#define MOVQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _O_r_X (0x8b ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVQrm(RS, MD, MB, MI, MS) (_REXQrm(RS, MB, MI), _O_r_X (0x89 ,_r8(RS) ,MD,MB,MI,MS ))
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#define MOVQir(IM, R) (_REXQrr(0, R), _Or_Q (0xb8,_r8(R) ,IM ))
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#define MOVQim(IM, MD, MB, MI, MS) (_REXQrm(0, MB, MI), _O_X_L (0xc7 ,MD,MB,MI,MS ,IM ))
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#define NOTQr(RS) _UNARYQr(X86_NOT, RS)
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#define NOTQm(MD, MB, MI, MS) _UNARYQm(X86_NOT, MD, MB, MI, MS)
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#define NEGQr(RS) _UNARYQr(X86_NEG, RS)
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#define NEGQm(MD, MB, MI, MS) _UNARYQm(X86_NEG, MD, MB, MI, MS)
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#define MULQr(RS) _UNARYQr(X86_MUL, RS)
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#define MULQm(MD, MB, MI, MS) _UNARYQm(X86_MUL, MD, MB, MI, MS)
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#define IMULQr(RS) _UNARYQr(X86_IMUL, RS)
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#define IMULQm(MD, MB, MI, MS) _UNARYQm(X86_IMUL, MD, MB, MI, MS)
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#define DIVQr(RS) _UNARYQr(X86_DIV, RS)
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#define DIVQm(MD, MB, MI, MS) _UNARYQm(X86_DIV, MD, MB, MI, MS)
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#define IDIVQr(RS) _UNARYQr(X86_IDIV, RS)
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#define IDIVQm(MD, MB, MI, MS) _UNARYQm(X86_IDIV, MD, MB, MI, MS)
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#define IMULQir(IM, RD) IMULQirr(IM, RD, RD)
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#define IMULQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0faf ,_b11,_r8(RD),_r8(RS) ))
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#define IMULQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0faf ,_r8(RD) ,MD,MB,MI,MS ))
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#define IMULQirr(IM,RS,RD) (_REXQrr(RD, RS), _Os_Mrm_sL (0x69 ,_b11,_r8(RS),_r8(RD) ,IM ))
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#define IMULQimr(IM,MD,MB,MI,MS,RD) (_REXQmr(MB, MI, RD), _Os_r_X_sL (0x69 ,_r8(RD) ,MD,MB,MI,MS ,IM ))
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#define CALLQsr(R) (_REXQrr(0, R), _O_Mrm (0xff ,_b11,_b010,_r8(R) ))
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#define JMPQsr(R) (_REXQrr(0, R), _O_Mrm (0xff ,_b11,_b100,_r8(R) ))
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#define CMOVQrr(CC,RS,RD) (_REXQrr(RD, RS), _OO_Mrm (0x0f40|(CC) ,_b11,_r8(RD),_r8(RS) ))
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#define CMOVQmr(CC,MD,MB,MI,MS,RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0f40|(CC) ,_r8(RD) ,MD,MB,MI,MS ))
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#define POPQr(RD) _m64only((_REXQr(RD), _Or (0x58,_r8(RD) )))
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#define POPQm(MD, MB, MI, MS) _m64only((_REXQm(MB, MI), _O_r_X (0x8f ,_b000 ,MD,MB,MI,MS )))
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#define PUSHQr(RS) _m64only((_REXQr(RS), _Or (0x50,_r8(RS) )))
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#define PUSHQm(MD, MB, MI, MS) _m64only((_REXQm(MB, MI), _O_r_X (0xff ,_b110 ,MD,MB,MI,MS )))
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#define PUSHQi(IM) _m64only( _Os_sL (0x68 ,IM ))
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#define TESTQrr(RS, RD) (_REXQrr(RS, RD), _O_Mrm (0x85 ,_b11,_r8(RS),_r8(RD) ))
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#define TESTQrm(RS, MD, MB, MI, MS) (_REXQrm(RS, MB, MI), _O_r_X (0x85 ,_r8(RS) ,MD,MB,MI,MS ))
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#define TESTQir(IM, RD) (!_s8P(IM) && (RD) == _RAX ? \
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(_REXQrr(0, RD), _O_L (0xa9 ,IM )) : \
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(_REXQrr(0, RD), _O_Mrm_L (0xf7 ,_b11,_b000 ,_r8(RD) ,IM )) )
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#define TESTQim(IM, MD, MB, MI, MS) (_REXQrm(0, MB, MI), _O_r_X_L (0xf7 ,_b000 ,MD,MB,MI,MS ,IM ))
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#define CMPXCHGQrr(RS, RD) (_REXQrr(RS, RD), _OO_Mrm (0x0fb1 ,_b11,_r8(RS),_r8(RD) ))
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#define CMPXCHGQrm(RS, MD, MB, MI, MS) (_REXQrm(RS, MB, MI), _OO_r_X (0x0fb1 ,_r8(RS) ,MD,MB,MI,MS ))
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#define XADDQrr(RS, RD) (_REXQrr(RS, RD), _OO_Mrm (0x0fc1 ,_b11,_r8(RS),_r8(RD) ))
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#define XADDQrm(RS, MD, MB, MI, MS) (_REXQrm(RS, MB, MI), _OO_r_X (0x0fc1 ,_r8(RS) ,MD,MB,MI,MS ))
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#define XCHGQrr(RS, RD) (_REXQrr(RS, RD), _O_Mrm (0x87 ,_b11,_r8(RS),_r8(RD) ))
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#define XCHGQrm(RS, MD, MB, MI, MS) (_REXQrm(RS, MB, MI), _O_r_X (0x87 ,_r8(RS) ,MD,MB,MI,MS ))
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#define DECQm(MD, MB, MI, MS) (_REXQrm(0, MB, MI), _O_r_X (0xff ,_b001 ,MD,MB,MI,MS ))
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#define DECQr(RD) (_REXQrr(0, RD), _O_Mrm (0xff ,_b11,_b001 ,_r8(RD) ))
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#define INCQm(MD, MB, MI, MS) (_REXQrm(0, MB, MI), _O_r_X (0xff ,_b000 ,MD,MB,MI,MS ))
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#define INCQr(RD) (_REXQrr(0, RD), _O_Mrm (0xff ,_b11,_b000 ,_r8(RD) ))
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#define BSFQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0fbc ,_b11,_r8(RD),_r8(RS) ))
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#define BSFQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0fbc ,_r8(RD) ,MD,MB,MI,MS ))
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#define BSRQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0fbd ,_b11,_r8(RD),_r8(RS) ))
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#define BSRQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0fbd ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVSBQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0fbe ,_b11,_r8(RD),_r1(RS) ))
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#define MOVSBQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0fbe ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVZBQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0fb6 ,_b11,_r8(RD),_r1(RS) ))
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#define MOVZBQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0fb6 ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVSWQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0fbf ,_b11,_r8(RD),_r2(RS) ))
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#define MOVSWQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0fbf ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVZWQrr(RS, RD) (_REXQrr(RD, RS), _OO_Mrm (0x0fb7 ,_b11,_r8(RD),_r2(RS) ))
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#define MOVZWQmr(MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _OO_r_X (0x0fb7 ,_r8(RD) ,MD,MB,MI,MS ))
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#define MOVSLQrr(RS, RD) _m64only((_REXQrr(RD, RS), _O_Mrm (0x63 ,_b11,_r8(RD),_r4(RS) )))
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#define MOVSLQmr(MD, MB, MI, MS, RD) _m64only((_REXQmr(MB, MI, RD), _O_r_X (0x63 ,_r8(RD) ,MD,MB,MI,MS )))
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#define BSWAPQr(R) (_REXQrr(0, R), _OOr (0x0fc8,_r8(R) ))
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#define __SSEQrr(OP,RS,RSA,RD,RDA) (_REXQrr(RD, RS), _OO_Mrm (0x0f00|(OP) ,_b11,RDA(RD),RSA(RS) ))
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#define __SSEQmr(OP,MD,MB,MI,MS,RD,RDA) (_REXQmr(MB, MI, RD), _OO_r_X (0x0f00|(OP) ,RDA(RD) ,MD,MB,MI,MS ))
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#define __SSEQrm(OP,RS,RSA,MD,MB,MI,MS) (_REXQrm(RS, MB, MI), _OO_r_X (0x0f00|(OP) ,RSA(RS) ,MD,MB,MI,MS ))
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#define __SSEQ1rm(OP,RS,RSA,MD,MB,MI,MS) (_REXQrm(RS, MB, MI), _OO_r_X (0x0f01|(OP) ,RSA(RS) ,MD,MB,MI,MS ))
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#define _SSEQrr(PX,OP,RS,RSA,RD,RDA) (_jit_B(PX), __SSEQrr(OP, RS, RSA, RD, RDA))
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#define _SSEQmr(PX,OP,MD,MB,MI,MS,RD,RDA) (_jit_B(PX), __SSEQmr(OP, MD, MB, MI, MS, RD, RDA))
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#define _SSEQrm(PX,OP,RS,RSA,MD,MB,MI,MS) (_jit_B(PX), __SSEQrm(OP, RS, RSA, MD, MB, MI, MS))
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#define _SSEQ1rm(PX,OP,RS,RSA,MD,MB,MI,MS) (_jit_B(PX), __SSEQ1rm(OP, RS, RSA, MD, MB, MI, MS))
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#define CVTTSS2SIQrr(RS, RD) _SSEQrr(0xf3, X86_SSE_CVTTSI, RS,_rX, RD,_r8)
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#define CVTTSS2SIQmr(MD, MB, MI, MS, RD) _SSEQmr(0xf3, X86_SSE_CVTTSI, MD, MB, MI, MS, RD,_r8)
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#define CVTTSD2SIQrr(RS, RD) _SSEQrr(0xf2, X86_SSE_CVTTSI, RS,_rX, RD,_r8)
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#define CVTTSD2SIQmr(MD, MB, MI, MS, RD) _SSEQmr(0xf2, X86_SSE_CVTTSI, MD, MB, MI, MS, RD,_r8)
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#define CVTSS2SIQrr(RS, RD) _SSEQrr(0xf3, X86_SSE_CVTSI, RS,_rX, RD,_r8)
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#define CVTSS2SIQmr(MD, MB, MI, MS, RD) _SSEQmr(0xf3, X86_SSE_CVTSI, MD, MB, MI, MS, RD,_r8)
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#define CVTSD2SIQrr(RS, RD) _SSEQrr(0xf2, X86_SSE_CVTSI, RS,_rX, RD,_r8)
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#define CVTSD2SIQmr(MD, MB, MI, MS, RD) _SSEQmr(0xf2, X86_SSE_CVTSI, MD, MB, MI, MS, RD,_r8)
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#define CVTSI2SSQrr(RS, RD) _SSEQrr(0xf3, X86_SSE_CVTIS, RS,_r8, RD,_rX)
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#define CVTSI2SSQmr(MD, MB, MI, MS, RD) _SSEQmr(0xf3, X86_SSE_CVTIS, MD, MB, MI, MS, RD,_rX)
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#define CVTSI2SDQrr(RS, RD) _SSEQrr(0xf2, X86_SSE_CVTIS, RS,_r8, RD,_rX)
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#define CVTSI2SDQmr(MD, MB, MI, MS, RD) _SSEQmr(0xf2, X86_SSE_CVTIS, MD, MB, MI, MS, RD,_rX)
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#define MOVDQXrr(RS, RD) _SSEQrr(0x66, 0x6e, RS,_r8, RD,_rX)
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#define MOVDQXmr(MD, MB, MI, MS, RD) _SSEQmr(0x66, 0x6e, MD, MB, MI, MS, RD,_rX)
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#define MOVDXQrr(RS, RD) _SSEQrr(0x66, 0x7e, RS,_rX, RD,_r8)
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#define MOVDXQrm(RS, MD, MB, MI, MS) _SSEQrm(0x66, 0x7e, RS,_rX, MD, MB, MI, MS)
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#define MOVDQMrr(RS, RD) __SSEQrr( 0x6e, RS,_r8, RD,_rM)
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#define MOVDQMmr(MD, MB, MI, MS, RD) __SSEQmr( 0x6e, MD, MB, MI, MS, RD,_rM)
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#define MOVDMQrr(RS, RD) __SSEQrr( 0x7e, RS,_rM, RD,_r8)
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#define MOVDMQrm(RS, MD, MB, MI, MS) __SSEQrm( 0x7e, RS,_rM, MD, MB, MI, MS)
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#define CALLsr(R) CALLQsr(R)
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#define JMPsr(R) JMPQsr(R)
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#endif
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#endif /* __lightning_asm_h */
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