mirror of
https://git.savannah.gnu.org/git/guile.git
synced 2025-05-07 08:40:21 +02:00
2475ae88d4
* lib/jit_ia64-cpu.c: Correct X2 pattern matching by preventing it to attempt to require a stop between the L and the X instruction; that is, check the registers and predicates before emitting the L instruction, not after. * lib/jit_ia64-fpu.c: Slightly simplify and correct divr_f and divrd_d implementation. * check/lightning.c: Add __ia64__ preprocessor define on Itanium. * check/alu.inc, check/clobber.tst, check/float.tst: Define several macros conditionally to __ia64__. This is required because __ia64__ jit generation can use way too many memory, due to not implementing instruction reordering to avoid as much as possible "stops", what causes way too many nops to be generated, as well as the fact that division and remainder requires function calls, and float division requires significant code to implement.
360 lines
9.3 KiB
C++
360 lines
9.3 KiB
C++
.data 8
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ok:
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.c "ok\n"
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/* ia64 code generation is not optimized for size, and also some
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* codes generate quite long sequences due to need for stops causing
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* no code template match and needing to add nops, and other cases
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* are division/remainder that needs function calls, or float division
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* that requires a quite long sequence.
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* (the brute force tests of all register combinations can easily
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* generate several GB of jit).
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*/
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/* 3 operand */
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/* reg0 = reg1 op reg2 */
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#define ALUR(N, T, OP, I0, I1, V, R0, R1, R2) \
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movi %R1 I0 \
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movi %R2 I1 \
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OP##r##T %R0 %R1 %R2 \
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beqi OP##T##N##r_##R0##R1##R2 %R0 V \
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calli @abort \
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OP##T##N##r_##R0##R1##R2:
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/* reg0 = reg1 op im */
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#define ALUI(N, T, OP, I0, I1, V, R0, R1, R2) \
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movi %R1 I0 \
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movi %R2 V \
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OP##i##T %R0 %R1 I1 \
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beqr OP##T##N##i_##R0##R1##R2 %R0 %R2 \
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calli @abort \
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OP##T##N##i_##R0##R1##R2:
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/* reg0 = reg0 op reg1 */
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#define ALUR0(N, T, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I0 \
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movi %R1 I1 \
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movi %R2 V \
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OP##r##T %R0 %R0 %R1 \
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beqr OP##T##N##r_0##R0##R1##R2 %R0 %R2 \
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calli @abort \
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OP##T##N##r_0##R0##R1##R2:
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/* reg0 = reg1 op reg0 */
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#define ALUR1(N, T, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I1 \
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movi %R1 I0 \
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movi %R2 V \
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OP##r##T %R0 %R1 %R0 \
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beqr OP##T##N##r_1##R0##R1##R2 %R0 %R2 \
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calli @abort \
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OP##T##N##r_1##R0##R1##R2:
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/* reg0 = reg0 op im */
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#define ALUI0(N, T, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I0 \
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movi %R1 V \
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OP##i##T %R0 %R0 I1 \
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beqr OP##T##N##i_0##R0##R1##R2 %R0 %R1 \
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calli @abort \
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OP##T##N##i_0##R0##R1##R2:
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#define ALU3(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALUR(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALUI(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALUR0(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALUR1(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALUI0(N, T, OP, I0, I1, V, R0, R1, R2)
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#define ALU2(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALU3(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALU3(N, T, OP, I0, I1, V, R0, R2, R1)
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#define ALU1(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALU2(N, T, OP, I0, I1, V, R0, R1, R2) \
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ALU2(N, T, OP, I0, I1, V, R1, R0, R2) \
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ALU2(N, T, OP, I0, I1, V, R2, R1, R0)
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#if __ia64__
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# define ALU(N, T, OP, I0, I1, V) \
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ALU3(N, T, OP, I0, I1, V, r0, r1, r2) \
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ALU3(N, T, OP, I0, I1, V, v0, v1, v2)
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#else
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# define ALU(N, T, OP, I0, I1, V) \
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ALU1(N, T, OP, I0, I1, V, v0, v1, v2) \
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ALU1(N, T, OP, I0, I1, V, v0, v1, r0) \
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ALU1(N, T, OP, I0, I1, V, v0, v1, r1) \
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ALU1(N, T, OP, I0, I1, V, v0, v1, r2) \
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ALU1(N, T, OP, I0, I1, V, v1, v2, r1) \
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ALU1(N, T, OP, I0, I1, V, v1, v2, r2) \
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ALU1(N, T, OP, I0, I1, V, v2, r0, r1) \
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ALU1(N, T, OP, I0, I1, V, v2, r0, r2) \
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ALU1(N, T, OP, I0, I1, V, r0, r1, r2)
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#endif
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/* 3 carry set/propagate */
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/*
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* r0 = i0
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* r1 = i1
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* r2 = 0
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* r0 = r0 opc r1 <only want carry>
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* r2 = r2 opx r2 <r2 must match v>
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*/
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#define ALUXII(N, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I0 \
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movi %R2 0 \
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OP##ci %R0 %R0 I1 \
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OP##xi %R2 %R2 0 \
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beqi OP##N##ii##R0##R1##R2 %R2 V \
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calli @abort \
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OP##N##ii##R0##R1##R2:
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#define ALUXIR(N, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I0 \
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movi %R2 0 \
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OP##ci %R0 %R0 I1 \
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OP##xr %R2 %R2 %R2 \
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beqi OP##N##ir##R0##R1##R2 %R2 V \
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calli @abort \
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OP##N##ir##R0##R1##R2:
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#define ALUXRI(N, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I0 \
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movi %R1 I1 \
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movi %R2 0 \
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OP##cr %R0 %R0 %R1 \
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OP##xi %R2 %R2 0 \
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beqi OP##N##ri##R0##R1##R2 %R2 V \
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calli @abort \
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OP##N##ri##R0##R1##R2:
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#define ALUXRR(N, OP, I0, I1, V, R0, R1, R2) \
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movi %R0 I0 \
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movi %R1 I1 \
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movi %R2 0 \
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OP##cr %R0 %R0 %R1 \
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OP##xr %R2 %R2 %R2 \
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beqi OP##N##rr##R0##R1##R2 %R2 V \
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calli @abort \
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OP##N##rr##R0##R1##R2:
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#define ALUX2(N, OP, I0, I1, V, R0, R1, R2) \
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ALUXII(N, OP, I0, I1, V, R0, R1, R2) \
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ALUXIR(N, OP, I0, I1, V, R0, R1, R2) \
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ALUXRI(N, OP, I0, I1, V, R0, R1, R2) \
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ALUXRR(N, OP, I0, I1, V, R0, R1, R2)
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#define ALUX1(N, OP, I0, I1, V, R0, R1, R2) \
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ALUX2(N, OP, I0, I1, V, R0, R1, R2) \
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ALUX2(N, OP, I0, I1, V, R0, R2, R1)
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#define ALUX0(N, OP, I0, I1, V, R0, R1, R2) \
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ALUX1(N, OP, I0, I1, V, R0, R1, R2) \
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ALUX1(N, OP, I0, I1, V, R1, R0, R2) \
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ALUX1(N, OP, I0, I1, V, R2, R1, R0)
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#if __ia64__
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# define ALUX(N, OP, I0, I1, V) \
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ALUX2(N, OP, I0, I1, V, r0, r1, r2) \
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ALUX2(N, OP, I0, I1, V, v0, v1, v2)
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#else
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# define ALUX(N, OP, I0, I1, V) \
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ALUX0(N, OP, I0, I1, V, v0, v1, v2) \
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ALUX0(N, OP, I0, I1, V, v0, v1, r0) \
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ALUX0(N, OP, I0, I1, V, v0, v1, r1) \
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ALUX0(N, OP, I0, I1, V, v0, v1, r2) \
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ALUX0(N, OP, I0, I1, V, v1, v2, r0) \
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ALUX0(N, OP, I0, I1, V, v1, v2, r1) \
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ALUX0(N, OP, I0, I1, V, v1, v2, r2) \
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ALUX0(N, OP, I0, I1, V, v2, r0, r1) \
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ALUX0(N, OP, I0, I1, V, v2, r0, r2) \
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ALUX0(N, OP, I0, I1, V, r0, r1, r2)
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#endif
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/* unary int */
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#define UNR(N, OP, I, V, R0, R1) \
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movi %R1 I \
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OP##r %R0 %R1 \
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beqi OP##N##R0##R1 %R0 V \
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calli @abort \
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OP##N##R0##R1:
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#define UNRC(N, OP, I, V, R0, R1) \
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movi %R0 I \
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OP##r %R0 %R0 \
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beqi OP##N##c##R0##R1 %R0 V \
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calli @abort \
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OP##N##c##R0##R1:
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#define UN2(N, OP, I, V, R0, R1) \
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UNR(N, OP, I, V, R0, R1) \
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UNRC(N, OP, I, V, R0, R1)
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#define UN1(N, OP, I, V, R0, R1) \
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UN2(N, OP, I, V, R0, R1) \
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UN2(N, OP, I, V, R1, R0)
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#if __ia64__
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# define UN(N, OP, I, V) \
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UN2(N, OP, I, V, r0, r1) \
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UN2(N, OP, I, V, v0, v1)
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#else
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# define UN(N, OP, I, V) \
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UN1(N, OP, I, V, v0, v1) \
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UN1(N, OP, I, V, v0, v2) \
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UN1(N, OP, I, V, v0, r0) \
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UN1(N, OP, I, V, v0, r1) \
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UN1(N, OP, I, V, v0, r2) \
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UN1(N, OP, I, V, v1, v2) \
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UN1(N, OP, I, V, v1, r0) \
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UN1(N, OP, I, V, v1, r1) \
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UN1(N, OP, I, V, v1, r2) \
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UN1(N, OP, I, V, v2, r0) \
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UN1(N, OP, I, V, v2, r1) \
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UN1(N, OP, I, V, v2, r2) \
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UN1(N, OP, I, V, r0, r1) \
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UN1(N, OP, I, V, r0, r2) \
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UN1(N, OP, I, V, r1, r2)
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#endif
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/* reg0 = reg1 op reg2 */
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#define FOPR(N, T, OP, I0, I1, V, F0, F1, F2) \
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movi##T %F1 I0 \
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movi##T %F2 I1 \
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OP##r##T %F0 %F1 %F2 \
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beqi##T OP##T##N##F0##F1##F2 %F0 V \
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calli @abort \
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OP##T##N##F0##F1##F2:
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/* reg0 = reg0 op reg1 */
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#define FOPR0(N, T, OP, I0, I1, V, F0, F1, F2) \
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movi##T %F0 I0 \
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movi##T %F1 I1 \
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OP##r##T %F0 %F0 %F1 \
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beqi##T OP##T##N##0##F0##F1##F2 %F0 V \
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calli @abort \
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OP##T##N##0##F0##F1##F2:
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/* reg1 = reg0 op reg1 */
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#define FOPR1(N, T, OP, I0, I1, V, F0, F1, F2) \
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movi##T %F0 I0 \
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movi##T %F1 I1 \
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OP##r##T %F1 %F0 %F1 \
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beqi##T OP##T##N##1##F0##F1##F2 %F1 V \
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calli @abort \
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OP##T##N##1##F0##F1##F2:
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/* reg0 = reg1 op im */
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#define FOPI(N, T, OP, I0, I1, V, F0, F1, F2) \
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movi##T %F1 I0 \
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movi##T %F2 V \
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OP##i##T %F0 %F1 I1 \
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beqr##T OP##T##N##i##F0##F1##F2 %F0 %F2 \
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calli @abort \
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OP##T##N##i##F0##F1##F2:
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/* reg0 = reg0 op im */
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#define FOPI0(N, T, OP, I0, I1, V, F0, F1, F2) \
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movi##T %F0 I0 \
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movi##T %F2 V \
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OP##i##T %F0 %F0 I1 \
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beqr##T OP##T##N##i0##F0##F1##F2 %F0 %F2 \
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calli @abort \
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OP##T##N##i0##F0##F1##F2:
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#define FOP1(N, T, OP, I0, I1, V, F0, F1, F2) \
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FOPR(N, T, OP, I0, I1, V, F0, F1, F2) \
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FOPR0(N, T, OP, I0, I1, V, F0, F1, F2) \
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FOPR1(N, T, OP, I0, I1, V, F0, F1, F2) \
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FOPI(N, T, OP, I0, I1, V, F0, F1, F2) \
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FOPI0(N, T, OP, I0, I1, V, F0, F1, F2)
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#if __ia64__
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# define FOP(N, T, OP, I0, I1, V) \
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FOP1(N, T, OP, I0, I1, V, f0, f1, f2)
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#else
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# define FOP(N, T, OP, I0, I1, V) \
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FOP1(N, T, OP, I0, I1, V, f0, f1, f2) \
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FOP1(N, T, OP, I0, I1, V, f0, f2, f3) \
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FOP1(N, T, OP, I0, I1, V, f0, f3, f4) \
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FOP1(N, T, OP, I0, I1, V, f0, f5, f1)
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#endif
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/* unary float */
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#define FUNR(N, T, OP, I, V, R0, R1) \
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movi##T %R1 I \
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OP##r##T %R0 %R1 \
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beqi##T OP##N##T##R0##R1 %R0 V \
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calli @abort \
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OP##N##T##R0##R1:
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#define FUNRC(N, T, OP, I, V, R0, R1) \
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movi##T %R0 I \
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OP##r##T %R0 %R0 \
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beqi##T OP##N##T##c##R0##R1 %R0 V \
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calli @abort \
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OP##N##T##c##R0##R1:
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#define FUN2(N, T, OP, I, V, R0, R1) \
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FUNR(N, T, OP, I, V, R0, R1) \
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FUNRC(N, T, OP, I, V, R0, R1)
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#define FUN1(N, T, OP, I, V, R0, R1) \
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FUN2(N, T, OP, I, V, R0, R1) \
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FUN2(N, T, OP, I, V, R1, R0)
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#if __ia64__
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# define FUN(N, T, OP, I, V) \
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FUN2(N, T, OP, I, V, f0, f1)
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#else
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# define FUN(N, T, OP, I, V) \
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FUN1(N, T, OP, I, V, f0, f1) \
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FUN1(N, T, OP, I, V, f0, f2) \
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FUN1(N, T, OP, I, V, f0, f3) \
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FUN1(N, T, OP, I, V, f0, f4) \
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FUN1(N, T, OP, I, V, f0, f5)
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#endif
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/* unordered comparison unary float */
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#define UFUNR(N, T, OP, I, V, R0, R1) \
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movi##T %R1 I \
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OP##r##T %R0 %R1 \
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buneqi##T OP##N##T##u##R0##R1 %R0 V \
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calli @abort \
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OP##N##T##u##R0##R1:
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#define UFUNRC(N, T, OP, I, V, R0, R1) \
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movi##T %R0 I \
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OP##r##T %R0 %R0 \
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buneqi##T OP##N##T##uc##R0##R1 %R0 V \
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calli @abort \
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OP##N##T##uc##R0##R1:
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#define UFUN2(N, T, OP, I, V, R0, R1) \
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UFUNR(N, T, OP, I, V, R0, R1) \
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UFUNRC(N, T, OP, I, V, R0, R1)
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#define UFUN1(N, T, OP, I, V, R0, R1) \
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UFUN2(N, T, OP, I, V, R0, R1) \
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UFUN2(N, T, OP, I, V, R1, R0)
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#if __ia64__
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# define UFUN(N, T, OP, I, V) \
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UFUN2(N, T, OP, I, V, f0, f1)
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#else
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# define UFUN(N, T, OP, I, V) \
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UFUN1(N, T, OP, I, V, f0, f1) \
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UFUN1(N, T, OP, I, V, f0, f2) \
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UFUN1(N, T, OP, I, V, f0, f3) \
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UFUN1(N, T, OP, I, V, f0, f4) \
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UFUN1(N, T, OP, I, V, f0, f5)
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#endif
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. $( $NaN = 0.0/0.0)
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. $( $Inf = 1.0/0.0)
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. $($nInf = -1.0/0.0)
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