mirror of
https://git.savannah.gnu.org/git/guile.git
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f469a5c87b
* check/lightning.c: Add a hopefully temporary kludge to not use
sprintf and sscanf returned by dlsym. This is required to pass
the varargs test.
* include/lightning/jit_private.h: Use symbolic name for first
integer register argument, as this is different in sysv and
win64 abi.
* include/lightning/jit_x86.h: Add conditionals and definitions
for Windows x64 (under __CYGWIN__ preprocessor conditional).
* lib/jit_x86-cpu.c: Correct one instruction encoding bug, that
was working by accident. Only use rax to rdx for some byte
operations to work on compatibility mode (that is, to generate
the proper encoding, instead of actually generating encoding
for high byte registers, e.g. %bh).
Add proper prolog and epilog for windows x64.
* lib/jit_x86-sse.c: Correct a swapped rex prefix for float
operations.
* lib/jit_x86.c: Adjust to support Windows x64 abi.
* check/check.x87.nodata.sh: New file, previously used but that
was missing git.
196 lines
5.7 KiB
C
196 lines
5.7 KiB
C
/*
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* Copyright (C) 2012, 2013 Free Software Foundation, Inc.
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*
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* This file is part of GNU lightning.
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*
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* GNU lightning is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* GNU lightning is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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* License for more details.
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*
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* Authors:
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* Paulo Cesar Pereira de Andrade
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*/
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#ifndef _jit_x86_h
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#define _jit_x86_h
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#define JIT_HASH_CONSTS 1
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#define JIT_NUM_OPERANDS 2
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/*
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* Types
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*/
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#define jit_sse2_p() jit_cpu.sse2
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#define jit_x87_reg_p(reg) ((reg) >= _ST0 && (reg) <= _ST7)
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#define JIT_FP _RBP
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typedef enum {
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#if __WORDSIZE == 32
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# define jit_arg_reg_p(i) 0
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# define jit_r(i) (_RAX + (i))
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# define jit_r_num() 3
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# define jit_v(i) (_RBX + (i))
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# define jit_v_num() 3
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# define jit_arg_f_reg_p(i) 0
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# define jit_f(i) (jit_cpu.sse2 ? _XMM0 + (i) : _ST0 + (i))
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# define jit_f_num() (jit_cpu.sse2 ? 8 : 6)
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# define JIT_R0 _RAX
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# define JIT_R1 _RCX
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# define JIT_R2 _RDX
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_RAX, _RCX, _RDX,
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# define JIT_V0 _RBX
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# define JIT_V1 _RSI
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# define JIT_V2 _RDI
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_RBX, _RSI, _RDI,
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_RSP, _RBP,
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# define JIT_F0 (jit_sse2_p() ? _XMM0 : _ST0)
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# define JIT_F1 (jit_sse2_p() ? _XMM1 : _ST1)
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# define JIT_F2 (jit_sse2_p() ? _XMM2 : _ST2)
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# define JIT_F3 (jit_sse2_p() ? _XMM3 : _ST3)
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# define JIT_F4 (jit_sse2_p() ? _XMM4 : _ST4)
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# define JIT_F5 (jit_sse2_p() ? _XMM5 : _ST5)
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# define JIT_F6 (jit_sse2_p() ? _XMM6 : _ST6)
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# define JIT_F7 (jit_sse2_p() ? _XMM7 : _ST7)
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_XMM0, _XMM1, _XMM2, _XMM3, _XMM4, _XMM5, _XMM6, _XMM7,
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# define jit_sse_reg_p(reg) ((reg) >= _XMM0 && (reg) <= _XMM7)
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#else
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# if __CYGWIN__
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# define jit_arg_reg_p(i) ((i) >= 0 && (i) < 4)
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# define jit_r(i) (_RAX + (i))
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# define jit_r_num() 3
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# define jit_v(i) (_RBX + (i))
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# define jit_v_num() 7
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# define jit_arg_f_reg_p(i) jit_arg_reg_p(i)
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# define jit_f(index) (_XMM4 + (index))
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# define jit_f_num() 12
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# define JIT_R0 _RAX
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# define JIT_R1 _R10
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# define JIT_R2 _R11
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# define JIT_V0 _RBX
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# define JIT_V1 _RDI
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# define JIT_V2 _RSI
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# define JIT_V3 _R12
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# define JIT_V4 _R13
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# define JIT_V5 _R14
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# define JIT_V6 _R15
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/* Volatile - Return value register */
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_RAX,
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/* Volatile */
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_R10, _R11,
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/* Nonvolatile */
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_RBX, _RDI, _RSI,
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_R12, _R13, _R14, _R15,
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/* Volatile - Integer arguments (4 to 1) */
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_R9, _R8, _RDX, _RCX,
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/* Nonvolatile */
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_RSP, _RBP,
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# define JIT_F0 _XMM4
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# define JIT_F1 _XMM5
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# define JIT_F2 _XMM6
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# define JIT_F3 _XMM7
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# define JIT_F4 _XMM8
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# define JIT_F5 _XMM9
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# define JIT_F6 _XMM10
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# define JIT_F7 _XMM11
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# define JIT_F8 _XMM12
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# define JIT_F9 _XMM13
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# define JIT_F10 _XMM14
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# define JIT_F11 _XMM15
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/* Volatile */
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_XMM4, _XMM5,
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/* Nonvolatile */
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_XMM6, _XMM7, _XMM8, _XMM9, _XMM10,
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_XMM11, _XMM12, _XMM13, _XMM14, _XMM15,
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/* Volatile - FP arguments (4 to 1) */
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_XMM3, _XMM2, _XMM1, _XMM0,
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# define jit_sse_reg_p(reg) ((reg) >= _XMM4 && (reg) <= _XMM0)
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# else
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# define jit_arg_reg_p(i) ((i) >= 0 && (i) < 6)
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# define jit_r(i) (_RAX + (i))
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# define jit_r_num() 4
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# define jit_v(i) (_RBX + (i))
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# define jit_v_num() 4
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# define jit_arg_f_reg_p(i) ((i) >= 0 && (i) < 8)
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# define jit_f(index) (_XMM8 + (index))
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# define jit_f_num() 8
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# define JIT_R0 _RAX
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# define JIT_R1 _R10
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# define JIT_R2 _R11
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# define JIT_R3 _R12
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_RAX, _R10, _R11, _R12,
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# define JIT_V0 _RBX
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# define JIT_V1 _R13
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# define JIT_V2 _R14
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# define JIT_V3 _R15
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_RBX, _R13, _R14, _R15,
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_R9, _R8, _RCX, _RDX, _RSI, _RDI,
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_RSP, _RBP,
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# define JIT_F0 _XMM8
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# define JIT_F1 _XMM9
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# define JIT_F2 _XMM10
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# define JIT_F3 _XMM11
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# define JIT_F4 _XMM12
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# define JIT_F5 _XMM13
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# define JIT_F6 _XMM14
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# define JIT_F7 _XMM15
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_XMM8, _XMM9, _XMM10, _XMM11, _XMM12, _XMM13, _XMM14, _XMM15,
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_XMM7, _XMM6, _XMM5, _XMM4, _XMM3, _XMM2, _XMM1, _XMM0,
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# define jit_sse_reg_p(reg) ((reg) >= _XMM8 && (reg) <= _XMM0)
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# endif
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#endif
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_ST0, _ST1, _ST2, _ST3, _ST4, _ST5, _ST6, _ST7,
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# define JIT_NOREG _NOREG
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_NOREG,
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} jit_reg_t;
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typedef struct {
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/* x87 present */
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jit_uint32_t fpu : 1;
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/* cmpxchg8b instruction */
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jit_uint32_t cmpxchg8b : 1;
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/* cmov and fcmov branchless conditional mov */
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jit_uint32_t cmov : 1;
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/* mmx registers/instructions available */
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jit_uint32_t mmx : 1;
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/* sse registers/instructions available */
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jit_uint32_t sse : 1;
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/* sse2 registers/instructions available */
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jit_uint32_t sse2 : 1;
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/* sse3 instructions available */
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jit_uint32_t sse3 : 1;
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/* pcmulqdq instruction */
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jit_uint32_t pclmulqdq : 1;
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/* ssse3 suplemental sse3 instructions available */
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jit_uint32_t ssse3 : 1;
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/* fused multiply/add using ymm state */
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jit_uint32_t fma : 1;
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/* cmpxchg16b instruction */
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jit_uint32_t cmpxchg16b : 1;
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/* sse4.1 instructions available */
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jit_uint32_t sse4_1 : 1;
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/* sse4.2 instructions available */
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jit_uint32_t sse4_2 : 1;
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/* movbe instruction available */
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jit_uint32_t movbe : 1;
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/* popcnt instruction available */
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jit_uint32_t popcnt : 1;
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/* aes instructions available */
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jit_uint32_t aes : 1;
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/* avx instructions available */
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jit_uint32_t avx : 1;
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/* lahf/sahf available in 64 bits mode */
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jit_uint32_t lahf : 1;
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} jit_cpu_t;
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/*
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* Initialization
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*/
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extern jit_cpu_t jit_cpu;
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#endif /* _jit_x86_h */
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