1
Fork 0
mirror of https://git.savannah.gnu.org/git/guile.git synced 2025-06-29 06:20:30 +02:00
guile/lib
pcpa b663d29bea Correct race condition if register is written more than once
* lib/jit_ia64-cpu.c, lib/jit_ia64-fpu.c: Correct code to
	also insert a stop to break an instruction group if a
	register is written more than once in the same group.
	This may happen if a register is argument and result of
	some lightning call (not a real instruction). The most
	common case should be code in the pattern:
		movl rn=largenum
		...
		mov rn=smallnum
	where "rn" would end up holding "largenum".
	But the problem possibly could happen in other circumstances.
2013-04-26 21:26:00 -03:00
..
jit_arm-cpu.c Rework to better describe what is used only during jit generation. 2013-03-06 16:49:26 -03:00
jit_arm-swf.c Test and correct test cases in all current backends. 2013-01-02 17:53:51 -02:00
jit_arm-vfp.c Make current test cases pass in armv7l. 2012-12-05 23:48:40 -02:00
jit_arm.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_disasm.c Add a simple memory management wrapper. 2013-03-29 12:10:36 -03:00
jit_ia64-cpu.c Correct race condition if register is written more than once 2013-04-26 21:26:00 -03:00
jit_ia64-fpu.c Correct race condition if register is written more than once 2013-04-26 21:26:00 -03:00
jit_ia64.c Correct jit implementation to pass several test cases. 2013-04-26 21:07:40 -03:00
jit_memory.c Do not start over jit generation if can safely grow buffer size. 2013-03-29 12:53:40 -03:00
jit_mips-cpu.c Add basic Itanium port infrastructure. 2013-04-25 21:56:32 -03:00
jit_mips-fpu.c Rework {get,push}arg{,i,r}_{f,d} to a more descriptive name and usage. 2013-01-09 17:14:51 -02:00
jit_mips.c Add basic Itanium port infrastructure. 2013-04-25 21:56:32 -03:00
jit_note.c Add a simple memory management wrapper. 2013-03-29 12:10:36 -03:00
jit_ppc-cpu.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_ppc-fpu.c Adapt PowerPC port to work in Darwin 32 bit and Linux 64 bit. 2013-03-10 15:36:25 -03:00
jit_ppc.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_print.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_sparc-cpu.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_sparc-fpu.c Pass all but the (not yet implemented) qmul and qdiv tests in sparc 2013-02-19 01:06:18 -03:00
jit_sparc.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_x86-cpu.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
jit_x86-sse.c Add new extensive float comparison and conversion test case 2012-12-29 14:16:45 -02:00
jit_x86-x87.c Add new extensive float comparison and conversion test case 2012-12-29 14:16:45 -02:00
jit_x86.c Make it simpler to add support for more than 64 registers. 2013-04-10 15:07:01 -03:00
lightning.c Properly split instruction groups for predicate registers. 2013-04-26 06:02:29 -03:00
Makefile.am Add basic Itanium port infrastructure. 2013-04-25 21:56:32 -03:00