mirror of
https://git.savannah.gnu.org/git/guile.git
synced 2025-05-04 14:20:26 +02:00
443 lines
14 KiB
C
443 lines
14 KiB
C
/*
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* Copyright (C) 2012-2018 Free Software Foundation, Inc.
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*
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* This file is part of GNU lightning.
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*
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* GNU lightning is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* GNU lightning is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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* License for more details.
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*
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* Authors:
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* Paulo Cesar Pereira de Andrade
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*/
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#if __X32
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# define jit_arg_reg_p(i) 0
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# define jit_arg_f_reg_p(i) 0
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# define stack_framesize 20
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# define stack_adjust 12
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# define CVT_OFFSET -12
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# define REAL_WORDSIZE 4
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# define va_gp_increment 4
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# define va_fp_increment 8
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#else
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# if __CYGWIN__
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# define jit_arg_reg_p(i) ((i) >= 0 && (i) < 4)
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# define jit_arg_f_reg_p(i) jit_arg_reg_p(i)
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# define stack_framesize 152
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# define va_fp_increment 8
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# else
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# define jit_arg_reg_p(i) ((i) >= 0 && (i) < 6)
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# define jit_arg_f_reg_p(i) ((i) >= 0 && (i) < 8)
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# define stack_framesize 56
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# define first_gp_argument rdi
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# define first_gp_offset offsetof(jit_va_list_t, rdi)
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# define first_gp_from_offset(gp) ((gp) / 8)
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# define last_gp_argument r9
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# define va_gp_max_offset \
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(offsetof(jit_va_list_t, r9) - offsetof(jit_va_list_t, rdi) + 8)
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# define first_fp_argument xmm0
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# define first_fp_offset offsetof(jit_va_list_t, xmm0)
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# define last_fp_argument xmm7
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# define va_fp_max_offset \
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(offsetof(jit_va_list_t, xmm7) - offsetof(jit_va_list_t, rdi) + 16)
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# define va_fp_increment 16
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# define first_fp_from_offset(fp) (((fp) - va_gp_max_offset) / 16)
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# endif
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# define va_gp_increment 8
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# define stack_adjust 8
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# define CVT_OFFSET -8
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# define REAL_WORDSIZE 8
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#endif
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/*
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* Types
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*/
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#if __X32 || __CYGWIN__
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typedef jit_pointer_t jit_va_list_t;
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#else
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typedef struct jit_va_list {
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int32_t gpoff;
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int32_t fpoff;
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jit_pointer_t over;
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jit_pointer_t save;
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/* Declared explicitly as int64 for the x32 abi */
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int64_t rdi;
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int64_t rsi;
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int64_t rdx;
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int64_t rcx;
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int64_t r8;
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int64_t r9;
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jit_float64_t xmm0;
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jit_float64_t _up0;
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jit_float64_t xmm1;
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jit_float64_t _up1;
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jit_float64_t xmm2;
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jit_float64_t _up2;
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jit_float64_t xmm3;
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jit_float64_t _up3;
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jit_float64_t xmm4;
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jit_float64_t _up4;
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jit_float64_t xmm5;
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jit_float64_t _up5;
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jit_float64_t xmm6;
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jit_float64_t _up6;
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jit_float64_t xmm7;
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jit_float64_t _up7;
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} jit_va_list_t;
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#endif
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jit_cpu_t jit_cpu;
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static const jit_register_t _rvs[] = {
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#if __X32
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{ rc(gpr) | rc(rg8) | 0, "%eax" },
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{ rc(gpr) | rc(rg8) | 1, "%ecx" },
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{ rc(gpr) | rc(rg8) | 2, "%edx" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 3, "%ebx" },
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{ rc(sav) | rc(gpr) | 6, "%esi" },
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{ rc(sav) | rc(gpr) | 7, "%edi" },
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{ rc(sav) | 4, "%esp" },
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{ rc(sav) | 5, "%ebp" },
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{ rc(xpr) | rc(fpr) | 0, "%xmm0" },
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{ rc(xpr) | rc(fpr) | 1, "%xmm1" },
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{ rc(xpr) | rc(fpr) | 2, "%xmm2" },
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{ rc(xpr) | rc(fpr) | 3, "%xmm3" },
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{ rc(xpr) | rc(fpr) | 4, "%xmm4" },
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{ rc(xpr) | rc(fpr) | 5, "%xmm5" },
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{ rc(xpr) | rc(fpr) | 6, "%xmm6" },
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{ rc(xpr) | rc(fpr) | 7, "%xmm7" },
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#elif __CYGWIN__
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{ rc(gpr) | rc(rg8) | 0, "%rax" },
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{ rc(gpr) | rc(rg8) | rc(rg8) | 10, "%r10" },
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{ rc(gpr) | rc(rg8) | rc(rg8) | 11, "%r11" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 3, "%rbx" },
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{ rc(sav) | rc(gpr) | 7, "%rdi" },
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{ rc(sav) | rc(gpr) | 6, "%rsi" },
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{ rc(sav) | rc(gpr) | 12, "%r12" },
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{ rc(sav) | rc(gpr) | 13, "%r13" },
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{ rc(sav) | rc(gpr) | 14, "%r14" },
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{ rc(sav) | rc(gpr) | 15, "%r15" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 9, "%r9" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 8, "%r8" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 2, "%rdx" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 1, "%rcx" },
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{ rc(sav) | 4, "%rsp" },
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{ rc(sav) | 5, "%rbp" },
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{ rc(xpr) | rc(fpr) | 4, "%xmm4" },
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{ rc(xpr) | rc(fpr) | 5, "%xmm5" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 6, "%xmm6" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 7, "%xmm7" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 8, "%xmm8" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 9, "%xmm9" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 10, "%xmm10" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 11, "%xmm11" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 12, "%xmm12" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 13, "%xmm13" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 14, "%xmm14" },
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{ rc(sav) | rc(xpr) | rc(fpr) | 15, "%xmm15" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 3, "%xmm3" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 2, "%xmm2" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 1, "%xmm1" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 0, "%xmm0" },
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#else
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/* %rax is a pseudo flag argument for varargs functions */
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{ rc(arg) | rc(gpr) | rc(rg8) | 0, "%rax" },
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{ rc(gpr) | rc(rg8) | 10, "%r10" },
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{ rc(gpr) | rc(rg8) | 11, "%r11" },
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{ rc(gpr) | rc(rg8) | 12, "%r12" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 3, "%rbx" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 13, "%r13" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 14, "%r14" },
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{ rc(sav) | rc(rg8) | rc(gpr) | 15, "%r15" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 9, "%r9" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 8, "%r8" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 1, "%rcx" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 2, "%rdx" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 6, "%rsi" },
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{ rc(arg) | rc(rg8) | rc(gpr) | 7, "%rdi" },
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{ rc(sav) | 4, "%rsp" },
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{ rc(sav) | 5, "%rbp" },
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{ rc(xpr) | rc(fpr) | 8, "%xmm8" },
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{ rc(xpr) | rc(fpr) | 9, "%xmm9" },
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{ rc(xpr) | rc(fpr) | 10, "%xmm10" },
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{ rc(xpr) | rc(fpr) | 11, "%xmm11" },
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{ rc(xpr) | rc(fpr) | 12, "%xmm12" },
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{ rc(xpr) | rc(fpr) | 13, "%xmm13" },
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{ rc(xpr) | rc(fpr) | 14, "%xmm14" },
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{ rc(xpr) | rc(fpr) | 15, "%xmm15" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 7, "%xmm7" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 6, "%xmm6" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 5, "%xmm5" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 4, "%xmm4" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 3, "%xmm3" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 2, "%xmm2" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 1, "%xmm1" },
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{ rc(xpr) | rc(arg) | rc(fpr) | 0, "%xmm0" },
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#endif
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{ _NOREG, "<none>" },
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};
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#include "x86-cpu.c"
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#include "x86-sse.c"
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jit_bool_t
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jit_get_cpu(void)
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{
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union {
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struct {
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uint32_t sse3 : 1;
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uint32_t pclmulqdq : 1;
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uint32_t dtes64 : 1; /* amd reserved */
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uint32_t monitor : 1;
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uint32_t ds_cpl : 1; /* amd reserved */
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uint32_t vmx : 1; /* amd reserved */
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uint32_t smx : 1; /* amd reserved */
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uint32_t est : 1; /* amd reserved */
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uint32_t tm2 : 1; /* amd reserved */
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uint32_t ssse3 : 1;
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uint32_t cntx_id : 1; /* amd reserved */
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uint32_t __reserved0 : 1;
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uint32_t fma : 1;
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uint32_t cmpxchg16b : 1;
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uint32_t xtpr : 1; /* amd reserved */
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uint32_t pdcm : 1; /* amd reserved */
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uint32_t __reserved1 : 1;
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uint32_t pcid : 1; /* amd reserved */
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uint32_t dca : 1; /* amd reserved */
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uint32_t sse4_1 : 1;
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uint32_t sse4_2 : 1;
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uint32_t x2apic : 1; /* amd reserved */
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uint32_t movbe : 1; /* amd reserved */
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uint32_t popcnt : 1;
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uint32_t tsc : 1; /* amd reserved */
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uint32_t aes : 1;
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uint32_t xsave : 1;
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uint32_t osxsave : 1;
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uint32_t avx : 1;
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uint32_t __reserved2 : 1; /* amd F16C */
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uint32_t __reserved3 : 1;
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uint32_t __alwayszero : 1; /* amd RAZ */
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} bits;
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jit_uword_t cpuid;
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} ecx;
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union {
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struct {
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uint32_t fpu : 1;
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uint32_t vme : 1;
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uint32_t de : 1;
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uint32_t pse : 1;
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uint32_t tsc : 1;
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uint32_t msr : 1;
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uint32_t pae : 1;
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uint32_t mce : 1;
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uint32_t cmpxchg8b : 1;
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uint32_t apic : 1;
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uint32_t __reserved0 : 1;
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uint32_t sep : 1;
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uint32_t mtrr : 1;
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uint32_t pge : 1;
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uint32_t mca : 1;
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uint32_t cmov : 1;
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uint32_t pat : 1;
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uint32_t pse36 : 1;
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uint32_t psn : 1; /* amd reserved */
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uint32_t clfsh : 1;
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uint32_t __reserved1 : 1;
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uint32_t ds : 1; /* amd reserved */
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uint32_t acpi : 1; /* amd reserved */
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uint32_t mmx : 1;
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uint32_t fxsr : 1;
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uint32_t sse : 1;
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uint32_t sse2 : 1;
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uint32_t ss : 1; /* amd reserved */
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uint32_t htt : 1;
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uint32_t tm : 1; /* amd reserved */
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uint32_t __reserved2 : 1;
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uint32_t pbe : 1; /* amd reserved */
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} bits;
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jit_uword_t cpuid;
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} edx;
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#if __X32
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int ac, flags;
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#endif
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jit_uword_t eax, ebx;
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#if __X32
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/* adapted from glibc __sysconf */
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__asm__ volatile ("pushfl;\n\t"
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"popl %0;\n\t"
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"movl $0x240000, %1;\n\t"
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"xorl %0, %1;\n\t"
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"pushl %1;\n\t"
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"popfl;\n\t"
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"pushfl;\n\t"
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"popl %1;\n\t"
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"xorl %0, %1;\n\t"
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"pushl %0;\n\t"
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"popfl"
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: "=r" (flags), "=r" (ac));
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/* i386 or i486 without cpuid */
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if ((ac & (1 << 21)) == 0)
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/* probably without x87 as well */
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return false;
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#endif
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/* query %eax = 1 function */
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__asm__ volatile (
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#if __X32 || __X64_32
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"xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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#else
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"xchgq %%rbx, %1; cpuid; xchgq %%rbx, %1"
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#endif
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: "=a" (eax), "=r" (ebx),
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"=c" (ecx.cpuid), "=d" (edx.cpuid)
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: "0" (1));
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jit_cpu.fpu = edx.bits.fpu;
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jit_cpu.cmpxchg8b = edx.bits.cmpxchg8b;
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jit_cpu.cmov = edx.bits.cmov;
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jit_cpu.mmx = edx.bits.mmx;
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jit_cpu.sse = edx.bits.sse;
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jit_cpu.sse2 = edx.bits.sse2;
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jit_cpu.sse3 = ecx.bits.sse3;
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jit_cpu.pclmulqdq = ecx.bits.pclmulqdq;
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jit_cpu.ssse3 = ecx.bits.ssse3;
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jit_cpu.fma = ecx.bits.fma;
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jit_cpu.cmpxchg16b = ecx.bits.cmpxchg16b;
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jit_cpu.sse4_1 = ecx.bits.sse4_1;
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jit_cpu.sse4_2 = ecx.bits.sse4_2;
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jit_cpu.movbe = ecx.bits.movbe;
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jit_cpu.popcnt = ecx.bits.popcnt;
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jit_cpu.aes = ecx.bits.aes;
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jit_cpu.avx = ecx.bits.avx;
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/* query %eax = 0x80000001 function */
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__asm__ volatile (
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#if __X64
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# if __X64_32
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"xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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# else
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"xchgq %%rbx, %1; cpuid; xchgq %%rbx, %1"
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# endif
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: "=a" (eax), "=r" (ebx),
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"=c" (ecx.cpuid), "=d" (edx.cpuid)
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: "0" (0x80000001));
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jit_cpu.lahf = ecx.cpuid & 1;
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#endif
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return jit_cpu.sse2;
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}
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jit_bool_t
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jit_init(jit_state_t *_jit)
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{
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return jit_cpu.sse2;
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}
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void
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jit_epilog(jit_state_t *_jit)
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{
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/* TODO: Restore registers. */
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}
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void
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jit_calli(jit_state_t *_jit, jit_pointer_t f,
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size_t argc, const jit_arg_abi_t abi[], const jit_arg_t args[])
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{
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/* TODO: Do the call! */
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calli(_jit, (jit_word_t)f);
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}
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void
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jit_callr(jit_state_t *_jit, jit_gpr_t f,
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size_t argc, const jit_arg_abi_t abi[], const jit_arg_t args[])
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{
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/* TODO: Do the call! */
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callr(_jit, f);
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}
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void
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jit_receive(jit_state_t *_jit,
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size_t argc, const jit_arg_abi_t abi[], jit_arg_t args[])
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{
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const jit_reg_t gpr_args[] = {
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#if __X32
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/* No GPRs in args. */
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#elif __CYGWIN__
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_RCX, _RDX, _R8, _R9
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#else
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_RDI, _RSI, _RDX, _RCX, _R8, _R9
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#endif
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};
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const jit_reg_t fpr_args[] = {
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#if __X32
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/* No FPRs in args. */
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#elif __CYGWIN__
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_XMM0, _XMM1, _XMM2, _XMM3
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#else
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_XMM0, _XMM1, _XMM2, _XMM3, _XMM4, _XMM5, _XMM6, _XMM7
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#endif
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};
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size_t gpr_arg_idx = 0;
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size_t fpr_arg_idx = 0;
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/* size_t stack_offset = 0; */
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size_t gpr_arg_count = sizeof(gpr_args) / sizeof(jit_reg_t);
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size_t fpr_arg_count = sizeof(fpr_args) / sizeof(jit_reg_t);
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#if __CYGWIN__
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#define NEXT_GPR() do { gpr_arg_idx++; fpr_arg_idx++; } while (0)
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#define NEXT_FPR() do { gpr_arg_idx++; fpr_arg_idx++; } while (0)
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#else
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#define NEXT_GPR() do { gpr_arg_idx++; } while (0)
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#define NEXT_FPR() do { fpr_arg_idx++; } while (0)
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|
#endif
|
|
|
|
for (size_t i = 0; i < argc; i++) {
|
|
switch (abi[i]) {
|
|
case JIT_ARG_ABI_UINT8:
|
|
case JIT_ARG_ABI_INT8:
|
|
case JIT_ARG_ABI_UINT16:
|
|
case JIT_ARG_ABI_INT16:
|
|
case JIT_ARG_ABI_UINT32:
|
|
case JIT_ARG_ABI_INT32:
|
|
case JIT_ARG_ABI_UINT64:
|
|
case JIT_ARG_ABI_INT64:
|
|
case JIT_ARG_ABI_POINTER:
|
|
if (gpr_arg_idx < gpr_arg_count) {
|
|
args[i].kind = JIT_ARG_LOC_GPR;
|
|
args[i].loc.gpr = gpr_args[gpr_arg_idx];
|
|
NEXT_GPR();
|
|
} else {
|
|
abort();
|
|
}
|
|
break;
|
|
case JIT_ARG_ABI_FLOAT:
|
|
case JIT_ARG_ABI_DOUBLE:
|
|
if (fpr_arg_idx < fpr_arg_count) {
|
|
args[i].kind = JIT_ARG_LOC_FPR;
|
|
args[i].loc.fpr = fpr_args[fpr_arg_idx];
|
|
NEXT_FPR();
|
|
} else {
|
|
abort();
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
jit_flush(void *fptr, void *tptr)
|
|
{
|
|
}
|
|
|
|
static void
|
|
jit_try_shorten(jit_state_t *_jit, jit_reloc_t reloc)
|
|
{
|
|
}
|