mirror of
https://git.savannah.gnu.org/git/guile.git
synced 2025-05-02 13:00:26 +02:00
e304bc8bf9
* check/float.tst: Add sparc to list of known NaN and +-Inf to integer conversion. * check/lightning.c: Define __sparc__ to preprocessor in the sparc backend. * include/lightning/jit_private.h: Correct wrong definition of emit_stxi_d, that has lived for a long time, but would cause problems whenever needing to spill/reload a float register. * include/lightning/jit_sparc.h: Can only use %g2,%g3,%g4 for scratch variables, as other "global" registers are reserved for the system, e.g. libc. Reorder float register naming to make it easier to access odd float registers, so that generating code for pusharg and getarg is easier for the IR. * lib/jit_mips-cpu.c, lib/jit_ppc-cpu.c: Update to match new code in jit_sparc-cpu.c. It must call jit_get_reg with jit_class_nospill if using the register to move an unconditional branch address to it, as the reload will not happen (actually could happen in the delay slot...) * lib/jit_sparc-cpu.c: Correct wrong macro definition for ldxr_s. Properly implement div* and implement rem. Div* needs to use the y register, and rem* needs to be synthesized. Correct b?sub* macro definitions. * lib/jit_sparc-fpu.c: Correct reversed float to/from double conversion. Correct wrong jit_get_reg call asking for a gpr and then using the fpr with that number. Correct wrong branch displacement computation for conditional branches. * lib/jit_sparc.c: Correct getarg_d and pushargi_d implementation. Add rem* entries to the switch converting IR to machine code. * lib/lightning.c: Correct a problem detected when adding the jit_class_nospill flag to jit_get_reg, that was caused when having a branch to an "epilog" node, what would cause the code to think all registers in unknown state were live, while in truth, all registers in unknown state in the "just after return" point are actually dead.
465 lines
13 KiB
C
465 lines
13 KiB
C
/*
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* Copyright (C) 2012 Free Software Foundation, Inc.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Authors:
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* Paulo Cesar Pereira de Andrade
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*/
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#ifndef _jit_private_h
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#define _jit_private_h
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#if HAVE_CONFIG_H
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# include "config.h"
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#endif
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#include <assert.h>
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#include <limits.h>
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#include <stdio.h>
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#include <gmp.h>
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#if defined(__GNUC__)
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# define maybe_unused __attribute__ ((unused))
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# define unlikely(exprn) __builtin_expect(!!(exprn), 0)
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# define likely(exprn) __builtin_expect(!!(exprn), 1)
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# if (__GNUC__ >= 4)
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# define PUBLIC __attribute__ ((visibility("default")))
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# define HIDDEN __attribute__ ((visibility("hidden")))
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# else
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# define PUBLIC /**/
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# define HIDDEN /**/
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# endif
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#else
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# define maybe_unused /**/
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# define unlikely(exprn) exprn
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# define likely(exprn) exprn
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# define PUBLIC /**/
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# define HIDDEN /**/
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#endif
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#if defined(__i386__) || defined(__x86_64__)
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# define JIT_SP _RSP
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# define JIT_RET _RAX
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# if __WORDSIZE == 32
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# define JIT_FRET _ST0
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# else
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# define JIT_FRET _XMM0
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# endif
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#elif defined(__mips__)
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# define JIT_SP _SP
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# define JIT_RET _V0
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# define JIT_FRET _F0
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#elif defined(__arm__)
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# define JIT_SP _R13
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# define JIT_RET _R0
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# if defined(__ARM_PCS_VFP)
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# define JIT_FRET _D0
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# else
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# define JIT_FRET _R0
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# endif
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#elif defined(__ppc__)
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# define JIT_SP _R1
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# define JIT_RET _R3
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# define JIT_FRET _F1
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#elif defined(__sparc__)
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# define JIT_SP _SP
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# define JIT_RET _I0
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# define JIT_FRET _F0
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#endif
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#define jit_size(vector) (sizeof(vector) / sizeof((vector)[0]))
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#define jit_reg_free_p(regno) \
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(!jit_regset_tstbit(_jit->reglive, regno) && \
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!jit_regset_tstbit(_jit->regarg, regno) && \
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!jit_regset_tstbit(_jit->regsav, regno))
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/*
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* Private jit_class bitmasks
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*/
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#define jit_class_named 0x00400000 /* hit must be the named reg */
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#define jit_class_nospill 0x00800000 /* hint to fail if need spill */
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#define jit_class_sft 0x01000000 /* not a hardware register */
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#define jit_class_rg8 0x04000000 /* x86 8 bits */
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#define jit_class_xpr 0x80000000 /* float / vector */
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#define jit_regno_patch 0x00008000 /* this is a register
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* returned by a "user" call
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* to jit_get_reg() */
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#define jit_call_default 0
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#define jit_call_varargs 1
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#define jit_kind_register 1
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#define jit_kind_code 2
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#define jit_kind_word 3
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#define jit_kind_float32 4
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#define jit_kind_float64 5
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#define jit_cc_a0_reg 0x00000001 /* arg0 is a register */
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#define jit_cc_a0_chg 0x00000002 /* arg0 is modified */
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#define jit_cc_a0_jmp 0x00000004 /* arg0 is a jump target */
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#define jit_cc_a0_rlh 0x00000008 /* arg0 is a register pair */
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#define jit_cc_a0_int 0x00000010 /* arg0 is immediate word */
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#define jit_cc_a0_flt 0x00000020 /* arg0 is immediate float */
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#define jit_cc_a0_dbl 0x00000040 /* arg0 is immediate double */
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#define jit_cc_a1_reg 0x00000100 /* arg1 is a register */
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#define jit_cc_a1_chg 0x00000200 /* arg1 is modified */
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#define jit_cc_a1_int 0x00001000 /* arg1 is immediate word */
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#define jit_cc_a1_flt 0x00002000 /* arg1 is immediate float */
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#define jit_cc_a1_dbl 0x00004000 /* arg1 is immediate double */
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#define jit_cc_a2_reg 0x00010000 /* arg2 is a register */
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#define jit_cc_a2_chg 0x00020000 /* arg2 is modified */
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#define jit_cc_a2_int 0x00100000 /* arg2 is immediate word */
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#define jit_cc_a2_flt 0x00200000 /* arg2 is immediate float */
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#define jit_cc_a2_dbl 0x00400000 /* arg2 is immediate double */
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#define jit_regset_com(u, v) ((u) = ~(v))
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#define jit_regset_and(u, v, w) ((u) = (v) & (w))
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#define jit_regset_ior(u, v, w) ((u) = (v) | (w))
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#define jit_regset_xor(u, v, w) ((u) = (v) ^ (w))
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#define jit_regset_set(u, v) ((u) = (v))
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#define jit_regset_cmp_ui(u, v) ((u) != (v))
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#define jit_regset_set_ui(u, v) ((u) = (v))
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#define jit_regset_set_p(set) (set)
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#if DEBUG
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# define jit_regset_clrbit(set, bit) \
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(assert(bit >= 0 && bit < (sizeof(jit_regset_t) << 3)), \
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(set) &= ~(1LL << (bit)))
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# define jit_regset_setbit(set, bit) \
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(assert(bit >= 0 && bit < (sizeof(jit_regset_t) << 3)), \
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(set) |= 1LL << (bit))
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# define jit_regset_tstbit(set, bit) \
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(assert(bit >= 0 && bit < (sizeof(jit_regset_t) << 3)), \
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(set) & (1LL << (bit)))
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#else
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# define jit_regset_clrbit(set, bit) ((set) &= ~(1LL << (bit)))
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# define jit_regset_setbit(set, bit) ((set) |= 1LL << (bit))
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# define jit_regset_tstbit(set, bit) ((set) & (1LL << (bit)))
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#endif
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#define jit_regset_new(set) ((set) = 0)
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#define jit_regset_del(set) ((set) = 0)
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extern unsigned long
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jit_regset_scan1(jit_regset_t, jit_int32_t);
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#define jit_reglive_setup() \
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do { \
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jit_regset_set_ui(_jit->reglive, 0); \
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jit_regset_set_ui(_jit->regmask, 0); \
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} while (0)
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/*
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* Types
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*/
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typedef union jit_data jit_data_t;
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typedef struct jit_note jit_note_t;
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typedef struct jit_line jit_line_t;
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typedef struct jit_block jit_block_t;
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typedef struct jit_value jit_value_t;
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typedef struct jit_function jit_function_t;
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typedef struct jit_register jit_register_t;
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#if __arm__
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# if DISASSEMBLER
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typedef struct jit_data_info jit_data_info_t;
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# endif
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#endif
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union jit_data {
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struct {
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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jit_int32_t l;
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jit_int32_t h;
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#else
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jit_int32_t h;
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jit_int32_t l;
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#endif
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} q;
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jit_word_t w;
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jit_float32_t f;
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jit_float64_t d;
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jit_pointer_t p;
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jit_node_t *n;
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};
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struct jit_note {
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jit_uint8_t *code;
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char *name;
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jit_line_t *lines;
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jit_word_t length;
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jit_word_t size; /* of code */
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};
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struct jit_line {
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char *file;
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jit_int32_t *linenos;
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jit_int32_t *offsets;
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jit_word_t length;
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};
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struct jit_node {
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jit_node_t *next;
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jit_code_t code;
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jit_int32_t flag;
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jit_data_t u;
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jit_data_t v;
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jit_data_t w;
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jit_node_t *link;
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};
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struct jit_block {
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jit_node_t *label;
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jit_regset_t reglive;
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jit_regset_t regmask;
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};
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struct jit_value {
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jit_int32_t kind;
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jit_code_t code;
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jit_data_t base;
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jit_data_t disp;
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};
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typedef struct {
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#if __arm__
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jit_word_t kind;
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#endif
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jit_word_t inst;
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jit_node_t *node;
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} jit_patch_t;
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#if __arm__ && DISASSEMBLER
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struct jit_data_info {
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jit_uword_t code; /* pointer in code buffer */
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jit_word_t length; /* length of constant vector */
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};
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#endif
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struct jit_function {
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struct {
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jit_int32_t argi;
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jit_int32_t argf;
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jit_int32_t size;
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jit_int32_t aoff;
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jit_int32_t alen;
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jit_int32_t call;
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} self;
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struct {
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jit_int32_t argi;
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jit_int32_t argf;
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jit_int32_t size;
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jit_int32_t call;
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} call;
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jit_node_t *prolog;
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jit_node_t *epilog;
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jit_int32_t *regoff;
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jit_regset_t regset;
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jit_int32_t stack;
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};
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struct jit_state {
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union {
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jit_uint8_t *uc;
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jit_uint16_t *us;
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jit_uint32_t *ui;
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jit_uint64_t *ul;
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jit_word_t w;
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} pc;
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jit_node_t *head;
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jit_node_t *tail;
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jit_uint32_t done : 1; /* emit state finished */
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jit_uint32_t emit : 1; /* emit state entered */
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jit_uint32_t again : 1; /* start over emiting function */
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jit_uint32_t prepare : 1; /* inside prepare/finish* block */
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jit_int32_t reglen; /* number of registers */
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jit_regset_t regarg; /* cannot allocate */
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jit_regset_t regsav; /* automatic spill only once */
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jit_regset_t reglive; /* known live registers at some point */
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jit_regset_t regmask; /* register mask to update reglive */
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mpz_t blockmask; /* mask of visited basic blocks */
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struct {
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jit_uint8_t *ptr;
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jit_uint8_t *end;
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jit_word_t length;
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} code;
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struct {
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jit_uint8_t *ptr; /* constant pool */
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jit_node_t **table; /* very simple hash table */
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jit_word_t size; /* number of vectors in table */
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jit_word_t count; /* number of hash table entries */
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jit_word_t offset; /* offset in bytes in ptr */
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jit_word_t length; /* length in bytes of ptr */
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} data;
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jit_node_t **spill;
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jit_int32_t *gen; /* ssa like "register version" */
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jit_value_t *values; /* temporary jit_value_t vector */
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struct {
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jit_block_t *ptr;
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jit_word_t offset;
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jit_word_t length;
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} blocks; /* basic blocks */
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struct {
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jit_patch_t *ptr;
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jit_word_t offset;
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jit_word_t length;
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} patches; /* forward patch information */
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jit_function_t *function; /* current function */
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struct {
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jit_function_t *ptr;
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jit_word_t offset;
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jit_word_t length;
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} functions; /* prolog/epilogue offsets in code */
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struct {
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jit_node_t **ptr;
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jit_word_t offset;
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jit_word_t length;
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} pool;
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jit_node_t *list;
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struct {
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jit_note_t *ptr;
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jit_node_t *head; /* first note node */
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jit_node_t *tail; /* linked list insertion */
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jit_word_t length;
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/* fields to store temporary state information */
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jit_word_t size;
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jit_node_t *name;
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jit_node_t *note;
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jit_uint8_t *base;
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} note;
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#if __arm__
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# if DISASSEMBLER
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struct {
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jit_data_info_t *ptr;
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jit_word_t offset;
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jit_word_t length;
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} data_info; /* constant pools information */
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# endif
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/* Note that this field is somewhat hackish, but required by most
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* ways to implement jit, unless implementing a pure one function
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* per jit, as most times it needs to start the jit buffer with a
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* jump where the "main" prolog starts, and because the initial
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* code is in "arm mode", need to make an "arm mode" patch on that
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* jump. A good example is the test suite assembler, where most
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* test cases start with a "jmpi main" call. */
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jit_uword_t thumb;
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struct {
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jit_uint8_t *data; /* pointer to code */
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jit_word_t size; /* size data */
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jit_word_t offset; /* pending patches */
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jit_word_t length; /* number of pending constants */
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jit_int32_t values[1024]; /* pending constants */
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jit_word_t patches[2048];
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} consts;
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#endif
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};
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struct jit_register {
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jit_reg_t spec;
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char *name;
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};
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/*
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* Prototypes
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*/
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extern void jit_get_cpu(void);
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#define jit_init() _jit_init(_jit)
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extern void _jit_init(jit_state_t*);
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#define jit_new_node_no_link(u) _jit_new_node_no_link(_jit, u)
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extern jit_node_t *_jit_new_node_no_link(jit_state_t*, jit_code_t);
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#define jit_link_node(u) _jit_link_node(_jit, u)
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extern void _jit_link_node(jit_state_t*, jit_node_t*);
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#define jit_link_label(l) _jit_link_label(_jit,l)
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extern void
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_jit_link_label(jit_state_t*,jit_node_t*);
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#define jit_reglive(node) _jit_reglive(_jit, node)
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extern void
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_jit_reglive(jit_state_t*, jit_node_t*);
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#define jit_regarg_set(n,v) _jit_regarg_set(_jit,n,v)
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extern void
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_jit_regarg_set(jit_state_t*, jit_node_t*, jit_int32_t);
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#define jit_regarg_clr(n,v) _jit_regarg_clr(_jit,n,v)
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extern void
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_jit_regarg_clr(jit_state_t*, jit_node_t*, jit_int32_t);
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#define jit_get_reg(s) _jit_get_reg(_jit,s)
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extern jit_int32_t
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_jit_get_reg(jit_state_t*, jit_int32_t);
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#define jit_unget_reg(r) _jit_unget_reg(_jit,r)
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extern void
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_jit_unget_reg(jit_state_t*, jit_int32_t);
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#define jit_save(reg) _jit_save(_jit, reg)
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extern void
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_jit_save(jit_state_t*, jit_int32_t);
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#define jit_load(reg) _jit_load(_jit, reg)
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extern void
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_jit_load(jit_state_t*, jit_int32_t);
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#define jit_optimize() _jit_optimize(_jit)
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extern void
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_jit_optimize(jit_state_t*);
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#define jit_classify(code) _jit_classify(_jit, code)
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extern jit_int32_t
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_jit_classify(jit_state_t*, jit_code_t);
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#define jit_regarg_p(n, r) _jit_regarg_p(_jit, n, r)
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extern jit_bool_t
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_jit_regarg_p(jit_state_t*, jit_node_t*, jit_int32_t);
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#define emit_code() _emit_code(_jit)
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extern jit_pointer_t
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_emit_code(jit_state_t*);
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#define emit_ldxi(r0, r1, i0) _emit_ldxi(_jit, r0, r1, i0)
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extern void
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_emit_ldxi(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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#define emit_stxi(i0, r0, r1) _emit_stxi(_jit, i0, r0, r1)
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extern void
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_emit_stxi(jit_state_t*, jit_word_t, jit_int32_t, jit_int32_t);
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#define emit_ldxi_d(r0, r1, i0) _emit_ldxi_d(_jit, r0, r1, i0)
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extern void
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_emit_ldxi_d(jit_state_t*, jit_int32_t, jit_int32_t, jit_word_t);
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#define emit_stxi_d(i0, r0, r1) _emit_stxi_d(_jit, i0, r0, r1)
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extern void
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_emit_stxi_d(jit_state_t*, jit_word_t, jit_int32_t, jit_int32_t);
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extern void jit_init_debug(void);
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extern void jit_finish_debug(void);
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extern void jit_init_note(void);
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extern void jit_finish_note(void);
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#define jit_set_note(n,u,v,w) _jit_set_note(_jit, n, u, v, w)
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extern void _jit_set_note(jit_state_t*, jit_note_t*, char*, int, jit_int32_t);
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#define jit_get_note(n,u,v,w) _jit_get_note(_jit, n, u, v, w)
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extern jit_bool_t _jit_get_note(jit_state_t*,jit_uint8_t*,char**,char**,int*);
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#define jit_annotate() _jit_annotate(_jit)
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extern void _jit_annotate(jit_state_t*);
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/*
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* Externs
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*/
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extern jit_register_t _rvs[];
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extern const char *jit_progname;
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#endif /* _jit_private_h */
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