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e304bc8bf9
* check/float.tst: Add sparc to list of known NaN and +-Inf to integer conversion. * check/lightning.c: Define __sparc__ to preprocessor in the sparc backend. * include/lightning/jit_private.h: Correct wrong definition of emit_stxi_d, that has lived for a long time, but would cause problems whenever needing to spill/reload a float register. * include/lightning/jit_sparc.h: Can only use %g2,%g3,%g4 for scratch variables, as other "global" registers are reserved for the system, e.g. libc. Reorder float register naming to make it easier to access odd float registers, so that generating code for pusharg and getarg is easier for the IR. * lib/jit_mips-cpu.c, lib/jit_ppc-cpu.c: Update to match new code in jit_sparc-cpu.c. It must call jit_get_reg with jit_class_nospill if using the register to move an unconditional branch address to it, as the reload will not happen (actually could happen in the delay slot...) * lib/jit_sparc-cpu.c: Correct wrong macro definition for ldxr_s. Properly implement div* and implement rem. Div* needs to use the y register, and rem* needs to be synthesized. Correct b?sub* macro definitions. * lib/jit_sparc-fpu.c: Correct reversed float to/from double conversion. Correct wrong jit_get_reg call asking for a gpr and then using the fpr with that number. Correct wrong branch displacement computation for conditional branches. * lib/jit_sparc.c: Correct getarg_d and pushargi_d implementation. Add rem* entries to the switch converting IR to machine code. * lib/lightning.c: Correct a problem detected when adding the jit_class_nospill flag to jit_get_reg, that was caused when having a branch to an "epilog" node, what would cause the code to think all registers in unknown state were live, while in truth, all registers in unknown state in the "just after return" point are actually dead.
2563 lines
70 KiB
C
2563 lines
70 KiB
C
/*
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* Copyright (C) 2012 Free Software Foundation, Inc.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Authors:
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* Paulo Cesar Pereira de Andrade
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*/
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#if PROTO
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# define gpr_save_area 72 /* r14~r31 = 18 * 4 */
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# define fpr_save_area 64
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# define alloca_offset -(gpr_save_area + fpr_save_area)
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# define params_offset 24
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# define ii(i) *_jit->pc.ui++ = i
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# define can_sign_extend_short_p(im) ((im) >= -32768 && (im) <= 32767)
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# define can_zero_extend_short_p(im) ((im) >= 0 && (im) <= 65535)
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# define can_sign_extend_jump_p(im) ((im) >= -33554432 && (im) <= 33554431)
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# define _R0_REGNO 0
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# define _SP_REGNO 1
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# define _FP_REGNO 31
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# define ldxi(r0,r1,i0) ldxi_i(r0,r1,i0)
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# define stxi(i0,r0,r1) stxi_i(i0,r0,r1)
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# define FXO(o,d,a,b,e,x) _FXO(_jit,o,d,a,b,e,x,0)
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# define FXO_(o,d,a,b,e,x) _FXO(_jit,o,d,a,b,e,x,1)
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static void _FXO(jit_state_t*,int,int,int,int,int,int,int);
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# define FDs(o,d,a,s) _FDs(_jit,o,d,a,s)
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static void _FDs(jit_state_t*,int,int,int,int);
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# define FDu(o,d,a,s) _FDu(_jit,o,d,a,s)
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static void _FDu(jit_state_t*,int,int,int,int);
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# define FX(o,d,a,b,x) _FX(_jit,o,d,a,b,x,0)
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# define FX_(o,d,a,b,x) _FX_(_jit,o,d,a,b,x,1)
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static void _FX(jit_state_t*,int,int,int,int,int,int);
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# define FI(o,t,a,k) _FI(_jit,o,t,a,k)
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static void _FI(jit_state_t*,int,int,int,int);
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# define FB(o,bo,bi,t,a,k) _FB(_jit,o,bo,bi,t,a,k)
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static void _FB(jit_state_t*,int,int,int,int,int,int);
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# define FXL(o,bo,bi,x) _FXL(_jit,o,bo,bi,x,0)
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# define FXL_(o,bo,bi,x) _FXL(_jit,o,bo,bi,x,1)
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static void _FXL(jit_state_t*,int,int,int,int,int);
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# define FC(o,d,l,a,b,x) _FC(_jit,o,d,l,a,b,x)
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static void _FC(jit_state_t*,int,int,int,int,int,int);
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# define FCI(o,d,l,a,s) _FCI(_jit,o,d,l,a,s)
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static void _FCI(jit_state_t*,int,int,int,int,int);
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# define FXFX(o,s,x,f) _FXFX(_jit,o,s,x,f)
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static void _FXFX(jit_state_t*,int,int,int,int);
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# define FM(o,s,a,h,b,e,r) _FM(_jit,o,s,a,h,b,e,r)
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static void _FM(jit_state_t*,int,int,int,int,int,int,int);
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# define CR_0 0
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# define CR_1 1
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# define CR_2 2
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# define CR_3 3
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# define CR_4 4
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# define CR_5 5
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# define CR_6 6
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# define CR_7 7
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# define CR_LT 0
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# define CR_GT 1
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# define CR_EQ 2
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# define CR_SO 3
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# define CR_UN 3
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# define BCC_F 4
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# define BCC_T 12
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# define ADD(d,a,b) FXO(31,d,a,b,0,266)
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# define ADD_(d,a,b) FXO_(31,d,a,b,0,266)
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# define ADDO(d,a,b) FXO(31,d,a,b,1,266)
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# define ADDO_(d,a,b) FXO_(31,d,a,b,1,266)
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# define ADDC(d,a,b) FXO_(31,d,a,b,0,10)
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# define ADDC_(d,a,b) FXO_(31,d,a,b,0,10)
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# define ADDCO(d,a,b) FXO(31,d,a,b,1,10)
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# define ADDCO_(d,a,b) FXO_(31,d,a,b,1,10)
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# define ADDE(d,a,b) FXO(31,d,a,b,0,138)
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# define ADDE_(d,a,b) FXO_(31,d,a,b,0,138)
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# define ADDEO(d,a,b) FXO(31,d,a,b,1,138)
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# define ADDEO_(d,a,b) FXO_(31,d,a,b,1,138)
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# define ADDI(d,a,s) FDs(14,d,a,s)
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# define ADDIC(d,a,s) FDs(12,d,a,s)
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# define ADDIC_(d,a,s) FDs(13,d,a,s)
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# define ADDIS(d,a,s) FDs(15,d,a,s)
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# define LIS(d,s) ADDIS(d,0,s)
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# define ADDME(d,a) FXO(31,d,a,0,0,234)
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# define ADDME_(d,a) FXO_(31,d,a,0,0,234)
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# define ADDMEO(d,a) FXO(31,d,a,0,1,234)
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# define ADDMEO_(d,a) FXO_(31,d,a,0,1,234)
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# define ADDZE(d,a) FXO(31,d,a,0,0,202)
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# define ADDZE_(d,a) FXO_(31,d,a,0,0,202)
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# define ADDZEO(d,a) FXO(31,d,a,0,1,202)
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# define ADDZEO_(d,a) FXO_(31,d,a,0,1,202)
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# define AND(d,a,b) FX(31,a,d,b,28)
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# define ANDC(d,a,b) FXO(31,a,d,b,0,60)
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# define ANDC_(d,a,b) FXO_(31,a,d,b,0,60)
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# define AND_(d,a,b) FX_(31,a,b,d,28)
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# define ANDI_(d,a,u) FDu(28,a,d,u)
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# define ANDIS_(d,a,u) FDu(29,a,d,u)
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# define B(t) FI(18,t,0,0)
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# define BA(t) FI(18,t,1,0)
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# define BL(t) FI(18,t,0,1)
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# define BLA(t) FI(18,t,1,1)
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# define BC(o,i,t) FB(16,o,i,t,0,0)
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# define BCA(o,i,t) FB(16,o,i,t,1,0)
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# define BCL(o,i,t) FB(16,o,i,t,0,1)
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# define BCLA(o,i,t) FB(16,o,i,t,1,1)
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# define BLT(t) BC(BCC_T,CR_LT,t)
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# define BLE(t) BC(BCC_F,CR_GT,t)
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# define BEQ(t) BC(BCC_T,CR_EQ,t)
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# define BGE(t) BC(BCC_F,CR_LT,t)
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# define BGT(t) BC(BCC_T,CR_GT,t)
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# define BNE(t) BC(BCC_F,CR_EQ,t)
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# define BUN(t) BC(BCC_T,CR_UN,t)
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# define BNU(t) BC(BCC_F,CR_UN,t)
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# define BCCTR(o,i) FXL(19,o,i,528)
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# define BCCTRL(o,i) FXL_(19,o,i,528)
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# define BLTCTR() BCCTR(BCC_T,CR_LT)
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# define BLECTR() BCCTR(BCC_F,CR_GT)
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# define BEQCTR() BCCTR(BCC_T,CR_EQ)
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# define BGECTR() BCCTR(BCC_F,CR_LT)
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# define BGTCTR() BCCTR(BCC_T,CR_GT)
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# define BNECTR() BCCTR(BCC_F,CR_EQ)
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# define BCTR() BCCTR(20,0)
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# define BCTRL() BCCTRL(20,0)
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# define BCLR(o,i) FXL(19,o,i,16)
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# define BCLRL(o,i) FXL_(19,o,i,16)
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# define BLTLR() BCLR(BCC_T,CR_LT)
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# define BLELR() BCLR(BCC_F,CR_GT)
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# define BEQLR() BCLR(BCC_T,CR_EQ)
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# define BGELR() BCLR(BCC_F,CR_LT)
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# define BGTLR() BCLR(BCC_T,CR_GT)
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# define BNELR() BCLR(BCC_F,CR_EQ)
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# define BLR() BCLR(20,0)
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# define BLRL() BCLRL(20,0)
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# define XCMP(cr,l,a,b) FC(31,cr,l,a,b,0)
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# define CMPD(a,b) XCMP(0,1,a,b)
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# define CMPW(a,b) XCMP(0,0,a,b)
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# define XCMPI(cr,l,a,s) FCI(11,cr,l,a,s)
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# define CMPDI(a,s) XCMPI(0,1,a,s)
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# define CMPWI(a,s) XCMPI(0,0,a,s)
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# define XCMPL(cr,l,a,b) FC(31,cr,l,a,b,32)
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# define CMPLD(a,b) XCMPL(0,1,a,b)
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# define CMPLW(a,b) XCMPL(0,0,a,b)
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# define XCMPLI(cr,l,a,u) FCI(10,cr,l,a,u)
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# define CMPLDI(a,s) XCMPLI(0,1,a,s)
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# define CMPLWI(a,s) XCMPLI(0,0,a,s)
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# define CNTLZW(a,s) FX(31,s,a,0,26)
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# define CNTLZW_(a,s) FX_(31,s,a,0,26)
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# define CRAND(d,a,b) FX(19,d,a,b,257)
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# define CRANDC(d,a,b) FX(19,d,a,b,129)
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# define CREQV(d,a,b) FX(19,d,a,b,289)
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# define CRSET(d) CREQV(d,d,d)
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# define CRNAND(d,a,b) FX(19,d,a,b,225)
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# define CRNOR(d,a,b) FX(19,d,a,b,33)
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# define CRNOT(d,a) CRNOR(d,a,a)
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# define CROR(d,a,b) FX(19,d,a,b,449)
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# define CRMOVE(d,a) CROR(d,a,a)
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# define CRORC(d,a,b) FX(19,d,a,b,417)
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# define CRXOR(d,a,b) FX(19,d,a,b,193)
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# define CRCLR(d) CRXOR(d,d,d)
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# define DCBA(a,b) FX(31,0,a,b,758)
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# define DCBF(a,b) FX(31,0,a,b,86)
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# define DCBI(a,b) FX(31,0,a,b,470)
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# define DCBST(a,b) FX(31,0,a,b,54)
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# define DCBT(a,b) FX(31,0,a,b,278)
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# define DCBTST(a,b) FX(31,0,a,b,246)
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# define DCBZ(a,b) FX(31,0,a,b,1014)
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# define DIVW(d,a,b) FXO(31,d,a,b,0,491)
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# define DIVW_(d,a,b) FXO_(31,d,a,b,0,491)
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# define DIVWO(d,a,b) FXO(31,d,a,b,1,491)
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# define DIVWO_(d,a,b) FXO_(31,d,a,b,1,491)
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# define DIVWU(d,a,b) FXO(31,d,a,b,0,459)
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# define DIVWU_(d,a,b) FXO_(31,d,a,b,0,459)
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# define DIVWUO(d,a,b) FXO(31,d,a,b,1,459)
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# define DIVWUO_(d,a,b) FXO_(31,d,a,b,1,459)
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# define ECIWX(d,a,b) FX(31,d,a,b,310)
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# define ECOWX(s,a,b) FX(31,s,a,b,438)
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# define EIEIO() FX(31,0,0,0,854)
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# define EQV(d,a,b) FX(31,a,d,b,284)
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# define EQV_(d,a,b) FX_(31,a,d,b,284)
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# define EXTSB(d,a) FX(31,a,d,0,954)
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# define EXTSB_(d,a) FX_(31,a,d,0,954)
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# define EXTSH(d,a) FX(31,a,d,0,922)
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# define EXTSH_(d,a) FX_(31,a,d,0,922)
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# define ICIB(a,b) FX(31,0,a,b,982)
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# define ISYNC() FXL(19,0,0,150)
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# define LBZ(d,a,s) FDs(34,d,a,s)
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# define LBZU(d,a,s) FDs(35,d,a,s)
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# define LBZUX(d,a,b) FX(31,d,a,b,119)
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# define LBZX(d,a,b) FX(31,d,a,b,87)
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# define LHA(d,a,s) FDs(42,d,a,s)
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# define LHAU(d,a,s) FDs(43,d,a,s)
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# define LHAUX(d,a,b) FX(31,d,a,b,375)
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# define LHAX(d,a,b) FX(31,d,a,b,343)
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# define LHRBX(d,a,b) FX(31,d,a,b,790)
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# define LHZ(d,a,s) FDs(40,d,a,s)
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# define LHZU(d,a,s) FDs(41,d,a,s)
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# define LHZUX(d,a,b) FX(31,d,a,b,311)
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# define LHZX(d,a,b) FX(31,d,a,b,279)
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# define LA(d,a,s) ADDI(d,a,s)
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# define LI(d,s) ADDI(d,0,s)
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# define LMW(d,a,s) FDs(46,d,a,s)
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# define LSWI(d,a,n) FX(31,d,a,n,597)
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# define LSWX(d,a,b) FX(31,d,a,b,533)
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# define LWARX(d,a,b) FX(31,d,a,b,20)
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# define LWBRX(d,a,b) FX(31,d,a,b,534)
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# define LWZ(d,a,s) FDs(32,d,a,s)
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# define LWZU(d,a,s) FDs(33,d,a,s)
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# define LWZUX(d,a,b) FX(31,d,a,b,55)
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# define LWZX(d,a,b) FX(31,d,a,b,23)
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# define MCRF(d,s) FXL(19,d<<2,(s)<<2,0)
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# define MCRXR(d) FX(31,d<<2,0,0,512)
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# define MFCR(d) FX(31,d,0,0,19)
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# define MFMSR(d) FX(31,d,0,0,83)
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# define MFSPR(d,s) FXFX(31,d,s<<5,339)
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# define MFXER(d) MFSPR(d,1)
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# define MFLR(d) MFSPR(d,8)
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# define MFCTR(d) MFSPR(d,9)
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# define MFSR(d,s) FX(31,d,s,0,595)
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# define MFSRIN(d,b) FX(31,d,0,b,659)
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# define MFTB(d,x,y) FXFX(31,d,(x)|((y)<<5),371)
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# define MFTBL(d) MFTB(d,8,12)
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# define MFTBU(d) MFTB(d,8,13)
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# define MTCRF(c,s) FXFX(31,s,c<<1,144)
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# define MTCR(s) MTCRF(0xff,s)
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# define MTMSR(s) FX(31,s,0,0,146)
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# define MTSPR(d,s) FXFX(31,d,s<<5,467)
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# define MTXER(d) MTSPR(d,1)
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# define MTLR(d) MTSPR(d,8)
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# define MTCTR(d) MTSPR(d,9)
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# define MTSR(r,s) FX(31,s<<1,r,0,210)
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# define MTSRIN(r,b) FX(31,r<<1,0,b,242)
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# define MULHW(d,a,b) FXO(31,d,a,b,0,75)
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# define MULHW_(d,a,b) FXO_(31,d,a,b,0,75)
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# define MULHWU(d,a,b) FXO(31,d,a,b,0,11)
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# define MULHWU_(d,a,b) FXO_(31,d,a,b,0,11)
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# define MULLI(d,a,s) FDs(07,d,a,s)
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# define MULLW(d,a,b) FXO(31,d,a,b,0,235)
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# define MULLW_(d,a,b) FXO_(31,d,a,b,0,235)
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# define MULLWO(d,a,b) FXO(31,d,a,b,1,235)
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# define MULLWO_(d,a,b) FXO_(31,d,a,b,1,235)
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# define NAND(d,a,b) FX(31,a,d,b,476)
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# define NAND_(d,a,b) FX_(31,a,d,b,476)
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# define NEG(d,a) FXO(31,d,a,0,0,104)
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# define NEG_(d,a) FXO_(31,d,a,0,0,104)
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# define NEGO(d,a) FXO(31,d,a,0,1,104)
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# define NEGO_(d,a) FXO_(31,d,a,0,1,104)
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# define NOR(d,a,b) FX(31,a,d,b,124)
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# define NOR_(d,a,b) FX_(31,a,d,b,124)
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# define NOT(d,s) NOR(d,s,s)
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# define OR(d,a,b) FX(31,a,d,b,444)
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# define OR_(d,a,b) FX_(31,a,d,b,444)
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# define MR(d,a) OR(d,a,a)
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# define ORC(d,a,b) FX(31,a,d,b,412)
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# define ORC_(d,a,b) FX_(31,a,d,b,412)
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# define ORI(d,a,u) FDu(24,a,d,u)
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# define NOP() ORI(0,0,0)
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# define ORIS(d,a,u) FDu(25,a,d,u)
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# define RFI() FXL(19,0,0,50)
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# define RLWIMI(d,s,h,b,e) FM(20,s,a,h,b,e,0)
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# define RLWIMI_(d,s,h,b,e) FM(20,s,a,h,b,e,1)
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# define INSLWI(a,s,n,b) RLWIMI(a,s,32-b,b,b+n-1)
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# define INSRWI(a,s,n,b) RLWIMI(a,s,32-(b+n),b,(b+n)-1)
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# define RLWINM(a,s,h,b,e) FM(21,s,a,h,b,e,0)
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# define RLWINM_(a,s,h,b,e) FM(21,s,a,h,b,e,1)
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# define EXTLWI(a,s,n,b) RLWINM(a,s,b,0,n-1)
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# define EXTRWI(a,s,n,b) RLWINM(a,s,b+n,32-n,31)
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# define ROTLWI(a,s,n) RLWINM(a,s,n,0,31)
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# define ROTRWI(a,s,n) RLWINM(a,s,32-n,0,31)
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# define SLWI(a,s,n) RLWINM(a,s,n,0,31-n)
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# define SRWI(a,s,n) RLWINM(a,s,32-n,n,31)
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# define CLRLWI(a,s,n) RLWINM(a,s,0,n,31)
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# define CLRRWI(a,s,n) RLWINM(a,s,0,0,31-n)
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# define CLRLSWI(a,s,b,n) RLWINM(a,s,n,b-n,31-n)
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# define RLWNM(a,s,b,m,e) FM(23,s,a,b,m,e,0)
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# define RLWNM_(a,s,b,m,e) FM(23,s,a,b,m,e,1)
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# define ROTLW(a,s,b) RLWNM(a,s,b,0,31)
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# define SC() FDu(17,0,0,2)
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# define SLW(a,s,b) FX(31,s,a,b,24)
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# define SLW_(a,s,b) FX_(31,s,a,b,24)
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# define SRAW(a,s,b) FX(31,s,a,b,792)
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# define SRAW_(a,s,b) FX_(31,s,a,b,792)
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# define SRAWI(a,s,h) FX(31,s,a,h,824)
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# define SRAWI_(a,s,h) FX_(31,s,a,h,824)
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# define SRW(a,s,b) FX(31,s,a,b,536)
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# define SRW_(a,s,b) FX_(31,s,a,b,536)
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# define STB(s,a,d) FDs(38,s,a,d)
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# define STBU(s,a,d) FDs(39,s,a,d)
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# define STBUX(s,a,b) FX(31,s,a,b,247)
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# define STBX(s,a,b) FX(31,s,a,b,215)
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# define STH(s,a,d) FDs(44,s,a,d)
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# define STHBRX(s,a,b) FX(31,s,a,b,918)
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# define STHU(s,a,d) FDs(45,s,a,d)
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# define STHUX(s,a,b) FX(31,s,a,b,439)
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# define STHX(s,a,b) FX(31,s,a,b,407)
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# define STMW(s,a,d) FDs(47,s,a,d)
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# define STWSI(s,a,nb) FX(31,s,a,nb,725)
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# define STSWX(s,a,b) FX(31,s,a,b,661)
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# define STW(s,a,d) FDs(36,s,a,d)
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# define STWBRX(s,a,b) FX(31,s,a,b,662)
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# define STWCX_(s,a,b) FX_(31,s,a,b,150)
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# define STWU(s,a,d) FDs(37,s,a,d)
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# define STWUX(s,a,b) FX(31,s,a,b,183)
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# define STWX(s,a,b) FX(31,s,a,b,151)
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# define SUBF(d,a,b) FXO(31,d,a,b,0,40)
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# define SUBF_(d,a,b) FXO_(31,d,a,b,0,40)
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# define SUBFO(d,a,b) FXO(31,d,a,b,1,40)
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# define SUBFO_(d,a,b) FXO_(31,d,a,b,1,40)
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# define SUB(d,a,b) SUBF(d,b,a)
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# define SUB_(d,a,b) SUBF_(d,b,a)
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# define SUBO(d,a,b) SUBFO(d,b,a)
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# define SUBO_(d,a,b) SUBFO_(d,b,a)
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# define SUBI(d,a,s) ADDI(d,a,-s)
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# define SUBIS(d,a,s) ADDIS(d,a,-s)
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# define SUBFC(d,a,b) FXO(31,d,a,b,0,8)
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# define SUBFC_(d,a,b) FXO_(31,d,a,b,0,8)
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# define SUBFCO(d,a,b) FXO(31,d,a,b,1,8)
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# define SUBFCO_(d,a,b) FXO_(31,d,a,b,1,8)
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# define SUBC(d,a,b) SUBFC(d,b,a)
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# define SUBIC(d,a,s) ADDIC(d,a,-s)
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# define SUBIC_(d,a,s) ADDIC_(d,a,-s)
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# define SUBFE(d,a,b) FXO(31,d,a,b,0,136)
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# define SUBFE_(d,a,b) FXO_(31,d,a,b,0,136)
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# define SUBFEO(d,a,b) FXO(31,d,a,b,1,136)
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# define SUBFEO_(d,a,b) FXO_(31,d,a,b,1,136)
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# define SUBE(d,a,b) SUBFE(d,b,a)
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# define SUBFIC(d,a,s) FDs(8,d,a,s)
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# define SUBFME(d,a) FXO(31,d,a,0,0,232)
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# define SUBFME_(d,a) FXO_(31,d,a,0,0,232)
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# define SUBFMEO(d,a) FXO(31,d,a,0,1,232)
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# define SUBFMEO_(d,a) FXO_(31,d,a,0,1,232)
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# define SUBFZE(d,a) FXO(31,d,a,0,0,200)
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# define SUBFZE_(d,a) FXO_(31,d,a,0,0,200)
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# define SUBFZEO(d,a) FXO(31,d,a,0,1,200)
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# define SUBFZEO_(d,a) FXO_(31,d,a,0,1,200)
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# define SYNC() FX(31,0,0,0,598)
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# define TLBIA() FX(31,0,0,0,370)
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# define TLBIE(b) FX(31,0,0,b,306)
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# define TLBSYNC() FX(31,0,0,0,566)
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# define TW(t,a,b) FX(31,t,a,b,4)
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# define TWEQ(a,b) FX(31,4,a,b,4)
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# define TWLGE(a,b) FX(31,5,a,b,4)
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# define TRAP() FX(31,31,0,0,4)
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# define TWI(t,a,s) FDs(3,t,a,s)
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# define TWGTI(a,s) TWI(8,a,s)
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# define TWLLEI(a,s) TWI(6,a,s)
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# define XOR(d,a,b) FXO(31,a,d,b,0,316)
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# define XOR_(d,a,b) FXO_(31,a,d,b,0,316)
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# define XORI(s,a,u) FDu(26,s,a,u)
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# define XORIS(s,a,u) FDu(27,s,a,u)
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|
# define movr(r0,r1) _movr(_jit,r0,r1)
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|
static void _movr(jit_state_t*,jit_int32_t,jit_int32_t);
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|
# define movi(r0,i0) _movi(_jit,r0,i0)
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|
static void _movi(jit_state_t*,jit_int32_t,jit_word_t);
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|
# define movi_p(r0,i0) _movi_p(_jit,r0,i0)
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static jit_word_t _movi_p(jit_state_t*,jit_int32_t,jit_word_t);
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|
# define negr(r0,r1) NEG(r0,r1)
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|
# define comr(r0,r1) NOT(r0,r1)
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|
# define extr_c(r0,r1) EXTSB(r0,r1)
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|
# define extr_uc(r0,r1) ANDI_(r0,r1,0xff)
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|
# define extr_s(r0,r1) EXTSH(r0,r1)
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|
# define extr_us(r0,r1) ANDI_(r0,r1,0xffff)
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|
# if __BYTE_ORDER == __BIG_ENDIAN
|
|
# define htonr(r0,r1) movr(r0,r1)
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|
# else
|
|
# error need htonr implementation
|
|
# endif
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|
# define addr(r0,r1,r2) ADD(r0,r1,r2)
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|
# define addi(r0,r1,i0) _addi(_jit,r0,r1,i0)
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static void _addi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define addcr(r0,r1,r2) ADDC(r0,r1,r2)
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|
# define addci(r0,r1,i0) _addci(_jit,r0,r1,i0)
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|
static void _addci(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define addxr(r0,r1,r2) ADDE(r0,r1,r2)
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|
# define addxi(r0,r1,i0) _addxi(_jit,r0,r1,i0)
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static void _addxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define subr(r0,r1,r2) SUB(r0,r1,r2)
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|
# define subi(r0,r1,i0) _subi(_jit,r0,r1,i0)
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static void _subi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define subcr(r0,r1,r2) SUBC(r0,r1,r2)
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|
# define subci(r0,r1,i0) _subci(_jit,r0,r1,i0)
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static void _subci(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define subxr(r0,r1,r2) SUBFE(r0,r2,r1)
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|
# define subxi(r0,r1,i0) _subxi(_jit,r0,r1,i0)
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|
static void _subxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define mulr(r0,r1,r2) MULLW(r0,r1,r2)
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|
# define muli(r0,r1,i0) _muli(_jit,r0,r1,i0)
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static void _muli(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
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|
# define qmulr(r0,r1,r2,r3) iqmulr(r0,r1,r2,r3,1)
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|
# define qmulr_u(r0,r1,r2,r3) iqmulr(r0,r1,r2,r3,0)
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|
# define iqmulr(r0,r1,r2,r3,cc) _iqmulr(_jit,r0,r1,r2,r3,cc)
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|
static void _iqmulr(jit_state_t*,jit_int32_t,jit_int32_t,
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|
jit_int32_t,jit_int32_t,jit_bool_t);
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|
# define qmuli(r0,r1,r2,i0) iqmuli(r0,r1,r2,i0,1)
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|
# define qmuli_u(r0,r1,r2,i0) iqmuli(r0,r1,r2,i0,0)
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|
# define iqmuli(r0,r1,r2,i0,cc) _iqmuli(_jit,r0,r1,r2,i0,cc)
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|
static void _iqmuli(jit_state_t*,jit_int32_t,jit_int32_t,
|
|
jit_int32_t,jit_word_t,jit_bool_t);
|
|
# define divr(r0,r1,r2) DIVW(r0,r1,r2)
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|
# define divi(r0,r1,i0) _divi(_jit,r0,r1,i0)
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|
static void _divi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define divr_u(r0,r1,r2) DIVWU(r0,r1,r2)
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|
# define divi_u(r0,r1,i0) _divi_u(_jit,r0,r1,i0)
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|
static void _divi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define qdivr(r0,r1,r2,r3) iqdivr(r0,r1,r2,r3,1)
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|
# define qdivr_u(r0,r1,r2,r3) iqdivr(r0,r1,r2,r3,0)
|
|
# define iqdivr(r0,r1,r2,r3,cc) _iqdivr(_jit,r0,r1,r2,r3,cc)
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|
static void _iqdivr(jit_state_t*,jit_int32_t,jit_int32_t,
|
|
jit_int32_t,jit_int32_t,jit_bool_t);
|
|
# define qdivi(r0,r1,r2,i0) iqdivi(r0,r1,r2,i0,1)
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|
# define qdivi_u(r0,r1,r2,i0) iqdivi(r0,r1,r2,i0,0)
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|
# define iqdivi(r0,r1,r2,i0,cc) _iqdivi(_jit,r0,r1,r2,i0,cc)
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|
static void _iqdivi(jit_state_t*,jit_int32_t,jit_int32_t,
|
|
jit_int32_t,jit_word_t,jit_bool_t);
|
|
# define remr(r0,r1,r2) _remr(_jit,r0,r1,r2)
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|
static void _remr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define remi(r0,r1,i0) _remi(_jit,r0,r1,i0)
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|
static void _remi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define remr_u(r0,r1,r2) _remr_u(_jit,r0,r1,r2)
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|
static void _remr_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define remi_u(r0,r1,i0) _remi_u(_jit,r0,r1,i0)
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|
static void _remi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define andr(r0,r1,r2) AND(r0,r1,r2)
|
|
# define andi(r0,r1,i0) _andi(_jit,r0,r1,i0)
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|
static void _andi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define orr(r0,r1,r2) OR(r0,r1,r2)
|
|
# define ori(r0,r1,i0) _ori(_jit,r0,r1,i0)
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|
static void _ori(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define xorr(r0,r1,r2) XOR(r0,r1,r2)
|
|
# define xori(r0,r1,i0) _xori(_jit,r0,r1,i0)
|
|
static void _xori(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define lshr(r0,r1,r2) SLW(r0,r1,r2)
|
|
# define lshi(r0,r1,i0) _lshi(_jit,r0,r1,i0)
|
|
static void _lshi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define rshr(r0,r1,r2) SRAW(r0,r1,r2)
|
|
# define rshi(r0,r1,i0) _rshi(_jit,r0,r1,i0)
|
|
static void _rshi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define rshr_u(r0,r1,r2) SRW(r0,r1,r2)
|
|
# define rshi_u(r0,r1,i0) _rshi_u(_jit,r0,r1,i0)
|
|
static void _rshi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ltr(r0,r1,r2) _ltr(_jit,r0,r1,r2)
|
|
static void _ltr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define lti(r0,r1,i0) _lti(_jit,r0,r1,i0)
|
|
static void _lti(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ltr_u(r0,r1,r2) _ltr_u(_jit,r0,r1,r2)
|
|
static void _ltr_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define lti_u(r0,r1,i0) _lti_u(_jit,r0,r1,i0)
|
|
static void _lti_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ler(r0,r1,r2) _ler(_jit,r0,r1,r2)
|
|
static void _ler(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define lei(r0,r1,i0) _lei(_jit,r0,r1,i0)
|
|
static void _lei(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ler_u(r0,r1,r2) _ler_u(_jit,r0,r1,r2)
|
|
static void _ler_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define lei_u(r0,r1,i0) _lei_u(_jit,r0,r1,i0)
|
|
static void _lei_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define eqr(r0,r1,r2) _eqr(_jit,r0,r1,r2)
|
|
static void _eqr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define eqi(r0,r1,i0) _eqi(_jit,r0,r1,i0)
|
|
static void _eqi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ger(r0,r1,r2) _ger(_jit,r0,r1,r2)
|
|
static void _ger(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define gei(r0,r1,i0) _gei(_jit,r0,r1,i0)
|
|
static void _gei(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ger_u(r0,r1,r2) _ger_u(_jit,r0,r1,r2)
|
|
static void _ger_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define gei_u(r0,r1,i0) _gei_u(_jit,r0,r1,i0)
|
|
static void _gei_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define gtr(r0,r1,r2) _gtr(_jit,r0,r1,r2)
|
|
static void _gtr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define gti(r0,r1,i0) _gti(_jit,r0,r1,i0)
|
|
static void _gti(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define gtr_u(r0,r1,r2) _gtr_u(_jit,r0,r1,r2)
|
|
static void _gtr_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define gti_u(r0,r1,i0) _gti_u(_jit,r0,r1,i0)
|
|
static void _gti_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ner(r0,r1,r2) _ner(_jit,r0,r1,r2)
|
|
static void _ner(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define nei(r0,r1,i0) _nei(_jit,r0,r1,i0)
|
|
static void _nei(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
|
|
#define bltr(i0,r0,r1) _bltr(_jit,i0,r0,r1)
|
|
static jit_word_t _bltr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define blti(i0,r0,i1) _blti(_jit,i0,r0,i1)
|
|
static jit_word_t _blti(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bltr_u(i0,r0,r1) _bltr_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bltr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define blti_u(i0,r0,i1) _blti_u(_jit,i0,r0,i1)
|
|
static jit_word_t _blti_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bler(i0,r0,r1) _bler(_jit,i0,r0,r1)
|
|
static jit_word_t _bler(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define blei(i0,r0,i1) _blei(_jit,i0,r0,i1)
|
|
static jit_word_t _blei(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bler_u(i0,r0,r1) _bler_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bler_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define blei_u(i0,r0,i1) _blei_u(_jit,i0,r0,i1)
|
|
static jit_word_t _blei_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define beqr(i0,r0,r1) _beqr(_jit,i0,r0,r1)
|
|
static jit_word_t _beqr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define beqi(i0,r0,i1) _beqi(_jit,i0,r0,i1)
|
|
static jit_word_t _beqi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bger(i0,r0,r1) _bger(_jit,i0,r0,r1)
|
|
static jit_word_t _bger(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bgei(i0,r0,i1) _bgei(_jit,i0,r0,i1)
|
|
static jit_word_t _bgei(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bger_u(i0,r0,r1) _bger_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bger_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bgei_u(i0,r0,i1) _bgei_u(_jit,i0,r0,i1)
|
|
static jit_word_t _bgei_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bgtr(i0,r0,r1) _bgtr(_jit,i0,r0,r1)
|
|
static jit_word_t _bgtr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bgti(i0,r0,i1) _bgti(_jit,i0,r0,i1)
|
|
static jit_word_t _bgti(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bgtr_u(i0,r0,r1) _bgtr_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bgtr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bgti_u(i0,r0,i1) _bgti_u(_jit,i0,r0,i1)
|
|
static jit_word_t _bgti_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bner(i0,r0,r1) _bner(_jit,i0,r0,r1)
|
|
static jit_word_t _bner(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bnei(i0,r0,i1) _bnei(_jit,i0,r0,i1)
|
|
static jit_word_t _bnei(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bmsr(i0,r0,r1) _bmsr(_jit,i0,r0,r1)
|
|
static jit_word_t _bmsr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bmsi(i0,r0,i1) _bmsi(_jit,i0,r0,i1)
|
|
static jit_word_t _bmsi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bmcr(i0,r0,r1) _bmcr(_jit,i0,r0,r1)
|
|
static jit_word_t _bmcr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bmci(i0,r0,i1) _bmci(_jit,i0,r0,i1)
|
|
static jit_word_t _bmci(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define boaddr(i0,r0,r1) _boaddr(_jit,i0,r0,r1)
|
|
static jit_word_t _boaddr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define boaddi(i0,r0,i1) _boaddi(_jit,i0,r0,i1)
|
|
static jit_word_t _boaddi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bxaddr(i0,r0,r1) _bxaddr(_jit,i0,r0,r1)
|
|
static jit_word_t _bxaddr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bxaddi(i0,r0,i1) _bxaddi(_jit,i0,r0,i1)
|
|
static jit_word_t _bxaddi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bosubr(i0,r0,r1) _bosubr(_jit,i0,r0,r1)
|
|
static jit_word_t _bosubr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bosubi(i0,r0,i1) _bosubi(_jit,i0,r0,i1)
|
|
static jit_word_t _bosubi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bxsubr(i0,r0,r1) _bxsubr(_jit,i0,r0,r1)
|
|
static jit_word_t _bxsubr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bxsubi(i0,r0,i1) _bxsubi(_jit,i0,r0,i1)
|
|
static jit_word_t _bxsubi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define boaddr_u(i0,r0,r1) _boaddr_u(_jit,i0,r0,r1)
|
|
static jit_word_t _boaddr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define boaddi_u(i0,r0,i1) _boaddi_u(_jit,i0,r0,i1)
|
|
static jit_word_t _boaddi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bxaddr_u(i0,r0,r1) _bxaddr_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bxaddr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bxaddi_u(i0,r0,i1) _bxaddi_u(_jit,i0,r0,i1)
|
|
static jit_word_t _bxaddi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bosubr_u(i0,r0,r1) _bosubr_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bosubr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bosubi_u(i0,r0,i1) _bosubi_u(_jit,i0,r0,i1)
|
|
static jit_word_t _bosubi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
#define bxsubr_u(i0,r0,r1) _bxsubr_u(_jit,i0,r0,r1)
|
|
static jit_word_t _bxsubr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
#define bxsubi_u(i0,r0,i1) _bxsubi_u(_jit,i0,r0,i1)
|
|
static jit_word_t _bxsubi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
|
|
|
|
# define ldr_c(r0,r1) _ldr_c(_jit,r0,r1)
|
|
static void _ldr_c(jit_state_t*,jit_int32_t,jit_int32_t);
|
|
# define ldi_c(r0,i0) _ldi_c(_jit,r0,i0)
|
|
static void _ldi_c(jit_state_t*,jit_int32_t,jit_word_t);
|
|
# define ldxr_c(r0,r1,i0) _ldxr_c(_jit,r0,r1,i0)
|
|
static void _ldxr_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldxi_c(r0,r1,i0) _ldxi_c(_jit,r0,r1,i0)
|
|
static void _ldxi_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldr_uc(r0,r1) LBZX(r0, _R0_REGNO, r1)
|
|
# define ldi_uc(r0,i0) _ldi_uc(_jit,r0,i0)
|
|
static void _ldi_uc(jit_state_t*,jit_int32_t,jit_word_t);
|
|
# define ldxr_uc(r0,r1,r2) _ldxr_uc(_jit,r0,r1,r2)
|
|
static void _ldxr_uc(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define ldxi_uc(r0,r1,i0) _ldxi_uc(_jit,r0,r1,i0)
|
|
static void _ldxi_uc(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldr_s(r0,r1) LHAX(r0, _R0_REGNO, r1)
|
|
# define ldi_s(r0,i0) _ldi_s(_jit,r0,i0)
|
|
static void _ldi_s(jit_state_t*,jit_int32_t,jit_word_t);
|
|
# define ldxr_s(r0,r1,i0) _ldxr_s(_jit,r0,r1,i0)
|
|
static void _ldxr_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldxi_s(r0,r1,i0) _ldxi_s(_jit,r0,r1,i0)
|
|
static void _ldxi_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldr_us(r0,r1) LHZX(r0, _R0_REGNO, r1)
|
|
# define ldi_us(r0,i0) _ldi_us(_jit,r0,i0)
|
|
static void _ldi_us(jit_state_t*,jit_int32_t,jit_word_t);
|
|
# define ldxr_us(r0,r1,i0) _ldxr_us(_jit,r0,r1,i0)
|
|
static void _ldxr_us(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldxi_us(r0,r1,i0) _ldxi_us(_jit,r0,r1,i0)
|
|
static void _ldxi_us(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldr_i(r0,r1) LWZX(r0, _R0_REGNO, r1)
|
|
# define ldi_i(r0,i0) _ldi_i(_jit,r0,i0)
|
|
static void _ldi_i(jit_state_t*,jit_int32_t,jit_word_t);
|
|
# define ldxr_i(r0,r1,i0) _ldxr_i(_jit,r0,r1,i0)
|
|
static void _ldxr_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define ldxi_i(r0,r1,i0) _ldxi_i(_jit,r0,r1,i0)
|
|
static void _ldxi_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
|
|
# define str_c(r0,r1) STBX(r1, _R0_REGNO, r0)
|
|
# define sti_c(i0,r0) _sti_c(_jit,i0,r0)
|
|
static void _sti_c(jit_state_t*,jit_word_t,jit_int32_t);
|
|
# define stxr_c(r0,r1,r2) _stxr_c(_jit,r0,r1,r2)
|
|
static void _stxr_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define stxi_c(i0,r0,r1) _stxi_c(_jit,i0,r0,r1)
|
|
static void _stxi_c(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
# define str_s(r0,r1) STHX(r1, _R0_REGNO, r0)
|
|
# define sti_s(i0,r0) _sti_s(_jit,i0,r0)
|
|
static void _sti_s(jit_state_t*,jit_word_t,jit_int32_t);
|
|
# define stxr_s(r0,r1,r2) _stxr_s(_jit,r0,r1,r2)
|
|
static void _stxr_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define stxi_s(i0,r0,r1) _stxi_s(_jit,i0,r0,r1)
|
|
static void _stxi_s(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
# define str_i(r0,r1) STWX(r1, _R0_REGNO, r0)
|
|
# define sti_i(i0,r0) _sti_i(_jit,i0,r0)
|
|
static void _sti_i(jit_state_t*,jit_word_t,jit_int32_t);
|
|
# define stxr_i(r0,r1,r2) _stxr_i(_jit,r0,r1,r2)
|
|
static void _stxr_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
|
|
# define stxi_i(i0,r0,r1) _stxi_i(_jit,i0,r0,r1)
|
|
static void _stxi_i(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
|
|
# define jmpr(r0) _jmpr(_jit,r0)
|
|
static void _jmpr(jit_state_t*,jit_int32_t);
|
|
# define jmpi(i0) _jmpi(_jit,i0)
|
|
static jit_word_t _jmpi(jit_state_t*,jit_word_t);
|
|
# define jmpi_p(i0) _jmpi_p(_jit,i0)
|
|
static jit_word_t _jmpi_p(jit_state_t*,jit_word_t) maybe_unused;
|
|
# define callr(r0) _callr(_jit,r0)
|
|
static void _callr(jit_state_t*,jit_int32_t);
|
|
# define calli(i0) _calli(_jit,i0)
|
|
static jit_word_t _calli(jit_state_t*,jit_word_t);
|
|
# define calli_p(i0) _calli_p(_jit,i0)
|
|
static jit_word_t _calli_p(jit_state_t*,jit_word_t);
|
|
# define prolog(node) _prolog(_jit, node)
|
|
static void _prolog(jit_state_t*, jit_node_t*);
|
|
# define epilog(node) _epilog(_jit, node)
|
|
static void _epilog(jit_state_t*, jit_node_t*);
|
|
# define patch_at(i,l) _patch_at(_jit,i,l)
|
|
static void _patch_at(jit_state_t*,jit_word_t,jit_word_t);
|
|
#endif
|
|
|
|
#if CODE
|
|
# define _u16(v) ((v) & 0xffff)
|
|
# define _u26(v) ((v) & 0x3ffffff)
|
|
static void
|
|
_FXO(jit_state_t *_jit, int o, int d, int a, int b, int e, int x, int r)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(d & ~((1 << 5) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
assert(!(b & ~((1 << 5) - 1)));
|
|
assert(!(e & ~((1 << 1) - 1)));
|
|
assert(!(x & ~((1 << 9) - 1)));
|
|
assert(!(r & ~((1 << 1) - 1)));
|
|
ii((o<<26)|(d<<21)|(a<<16)|(b<<11)|(e<<10)|(x<<1)|r);
|
|
}
|
|
|
|
static void
|
|
_FDs(jit_state_t *_jit, int o, int d, int a, int s)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(d & ~((1 << 5) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
assert(can_sign_extend_short_p(s));
|
|
ii((o<<26)|(d<<21)|(a<<16)|_u16(s));
|
|
}
|
|
|
|
static void
|
|
_FDu(jit_state_t *_jit, int o, int d, int a, int s)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(d & ~((1 << 5) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
assert(can_zero_extend_short_p(s));
|
|
ii((o<<26)|(d<<21)|(a<<16)|_u16(s));
|
|
}
|
|
|
|
static void
|
|
_FX(jit_state_t *_jit, int o, int s, int a, int b, int x, int r)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(s & ~((1 << 5) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
assert(!(b & ~((1 << 5) - 1)));
|
|
assert(!(x & ~((1 << 10) - 1)));
|
|
assert(!(r & ~((1 << 1) - 1)));
|
|
ii((o<<26)|(s<<21)|(a<<16)|(b<<11)|(x<<1)|r);
|
|
}
|
|
|
|
static void
|
|
_FI(jit_state_t *_jit, int o, int t, int a, int k)
|
|
{
|
|
assert(!(o & ~(( 1 << 6) - 1)));
|
|
assert(!(t & 3) && can_sign_extend_jump_p(t));
|
|
assert(!(a & ~(( 1 << 1) - 1)));
|
|
assert(!(k & ~(( 1 << 1) - 1)));
|
|
ii((o<<26)|_u26(t)|(a<<1)|k);
|
|
}
|
|
|
|
static void
|
|
_FB(jit_state_t *_jit, int o, int bo, int bi, int t, int a, int k)
|
|
{
|
|
assert(!( o & ~((1 << 6) - 1)));
|
|
assert(!(bo & ~((1 << 5) - 1)));
|
|
assert(!(bi & ~((1 << 5) - 1)));
|
|
assert(!(t & 3) && can_sign_extend_short_p(t));
|
|
assert(!(a & ~(( 1 << 1) - 1)));
|
|
assert(!(k & ~(( 1 << 1) - 1)));
|
|
ii((o<<26)|(bo<<21)|(bi<<16)|_u16(t)|(a<<1)|k);
|
|
}
|
|
|
|
static void
|
|
_FXL(jit_state_t *_jit, int o, int bo, int bi, int x, int k)
|
|
{
|
|
assert(!( o & ~((1 << 6) - 1)));
|
|
assert(!(bo & ~((1 << 5) - 1)));
|
|
assert(!(bi & ~((1 << 5) - 1)));
|
|
assert(!(x & ~(( 1 << 10) - 1)));
|
|
assert(!(k & ~(( 1 << 1) - 1)));
|
|
ii((o<<26)|(bo<<21)|(bi<<16)|(x<<1)|k);
|
|
}
|
|
|
|
static void
|
|
_FC(jit_state_t *_jit, int o, int d, int l, int a, int b, int x)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(d & ~((1 << 3) - 1)));
|
|
assert(!(l & ~((1 << 1) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
assert(!(b & ~((1 << 5) - 1)));
|
|
assert(!(x & ~((1 << 10) - 1)));
|
|
ii((o<<26)|(d<<23)|(l<<21)|(a<<16)|(b<<11)|(x<<1));
|
|
}
|
|
|
|
static void
|
|
_FCI(jit_state_t *_jit, int o, int d, int l, int a, int s)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(d & ~((1 << 3) - 1)));
|
|
assert(!(l & ~((1 << 1) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
if (o == 11) assert(can_sign_extend_short_p(s));
|
|
else if (o == 10) assert(can_zero_extend_short_p(s));
|
|
#if DEBUG
|
|
else abort();
|
|
#endif
|
|
ii((o<<26)|(d<<23)|(l<<21)|(a<<16)|_u16(s));
|
|
}
|
|
|
|
static void
|
|
_FXFX(jit_state_t *_jit, int o, int d, int x, int f)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(d & ~((1 << 5) - 1)));
|
|
assert(!(x & ~((1 << 10) - 1)));
|
|
assert(!(f & ~((1 << 10) - 1)));
|
|
ii((o<<26)|(d<<21)|(x<<11)|(f<<1));
|
|
}
|
|
|
|
static void
|
|
_FM(jit_state_t *_jit, int o, int s, int a, int h, int b, int e, int r)
|
|
{
|
|
assert(!(o & ~((1 << 6) - 1)));
|
|
assert(!(s & ~((1 << 5) - 1)));
|
|
assert(!(a & ~((1 << 5) - 1)));
|
|
assert(!(h & ~((1 << 5) - 1)));
|
|
assert(!(b & ~((1 << 5) - 1)));
|
|
assert(!(e & ~((1 << 5) - 1)));
|
|
assert(!(r & ~((1 << 1) - 1)));
|
|
ii((o<<26)|(s<<21)|(a<<16)|(h<<11)|(b<<6)|(e<<1)|r);
|
|
}
|
|
|
|
static void
|
|
_movr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
if (r0 != r1)
|
|
MR(r0,r1);
|
|
}
|
|
|
|
static void
|
|
_movi(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
if (can_sign_extend_short_p(i0))
|
|
LI(r0, i0);
|
|
else {
|
|
LIS(r0, i0 >> 16);
|
|
if ((jit_uint16_t)i0)
|
|
ORI(r0, r0, (jit_uint16_t)i0);
|
|
}
|
|
}
|
|
|
|
static jit_word_t
|
|
_movi_p(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
jit_word_t word = _jit->pc.w;
|
|
LIS(r0, i0 >> 16);
|
|
ORI(r0, r0, (jit_uint16_t)i0);
|
|
return (word);
|
|
}
|
|
|
|
static void
|
|
_addi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
ADDI(r0, r1, i0);
|
|
else if (!(i0 & 0x0000ffff))
|
|
ADDIS(r0, r1, i0 >> 16);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ADD(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_addci(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
ADDIC(r0, r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ADDC(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_addxi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ADDE(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_subi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t ni0 = -i0;
|
|
if (can_sign_extend_short_p(ni0))
|
|
ADDI(r0, r1, ni0);
|
|
else if (!(ni0 & 0x0000ffff))
|
|
ADDIS(r0, r1, ni0 >> 16);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
SUB(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_subci(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
SUBC(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_subxi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
SUBE(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_muli(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
MULLI(r0, r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
MULLW(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_iqmulr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
|
|
jit_int32_t r2, jit_int32_t r3, jit_bool_t sign)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r0 == r2 || r0 == r3) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
MULLW(rn(reg), r2, r3);
|
|
}
|
|
else
|
|
MULLW(r0, r2, r3);
|
|
if (sign)
|
|
MULHW(r1, r2, r3);
|
|
else
|
|
MULHWU(r1, r2, r3);
|
|
if (r0 == r2 || r0 == r3) {
|
|
movr(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_iqmuli(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
|
|
jit_int32_t r2, jit_word_t i0, jit_bool_t sign)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
iqmulr(r0, r1, r2, rn(reg), sign);
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_divi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
DIVW(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_divi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
DIVWU(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_iqdivr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
|
|
jit_int32_t r2, jit_int32_t r3, jit_bool_t sign)
|
|
{
|
|
jit_int32_t sv0, rg0;
|
|
jit_int32_t sv1, rg1;
|
|
|
|
if (r0 == r2 || r0 == r3) {
|
|
sv0 = jit_get_reg(jit_class_gpr);
|
|
rg0 = rn(sv0);
|
|
}
|
|
else
|
|
rg0 = r0;
|
|
if (r1 == r2 || r1 == r3) {
|
|
sv1 = jit_get_reg(jit_class_gpr);
|
|
rg1 = rn(sv1);
|
|
}
|
|
else
|
|
rg1 = r1;
|
|
|
|
if (sign)
|
|
divr(rg0, r2, r3);
|
|
else
|
|
divr_u(rg0, r2, r3);
|
|
mulr(rg1, r3, rg0);
|
|
subr(rg1, r2, rg1);
|
|
if (rg0 != r0) {
|
|
movr(r0, rg0);
|
|
jit_unget_reg(sv0);
|
|
}
|
|
if (rg1 != r1) {
|
|
movr(r1, rg1);
|
|
jit_unget_reg(sv1);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_iqdivi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
|
|
jit_int32_t r2, jit_word_t i0, jit_bool_t sign)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
iqdivr(r0, r1, r2, rn(reg), sign);
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_remr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r0 == r1 || r0 == r2) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
divr(rn(reg), r1, r2);
|
|
mulr(rn(reg), r2, rn(reg));
|
|
subr(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
else {
|
|
divr(r0, r1, r2);
|
|
mulr(r0, r2, r0);
|
|
subr(r0, r1, r0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_remi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
remr(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_remr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r0 == r1 || r0 == r2) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
divr_u(rn(reg), r1, r2);
|
|
mulr(rn(reg), r2, rn(reg));
|
|
subr(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
else {
|
|
divr_u(r0, r1, r2);
|
|
mulr(r0, r2, r0);
|
|
subr(r0, r1, r0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_remi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
remr_u(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
|
|
static void
|
|
_andi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
ANDI_(r0, r1, i0);
|
|
else if (!(i0 & 0x0000ffff))
|
|
ANDIS_(r0, r1, (jit_uword_t)i0 >> 16);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
AND(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ori(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
ORI(r0, r1, i0);
|
|
else if (!(i0 & 0x0000ffff))
|
|
ORIS(r0, r1, (jit_uword_t)i0 >> 16);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
OR(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_xori(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
XORI(r0, r1, i0);
|
|
else if (!(i0 & 0x0000ffff))
|
|
XORIS(r0, r1, (jit_uword_t)i0 >> 16);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
XOR(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_lshi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
if (i0 == 0)
|
|
movr(r0, r1);
|
|
else
|
|
SLWI(r0,r1,i0);
|
|
}
|
|
|
|
static void
|
|
_rshi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
if (i0 == 0)
|
|
movr(r0, r1);
|
|
else
|
|
SRAWI(r0,r1,i0);
|
|
}
|
|
|
|
static void
|
|
_rshi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
if (i0 == 0)
|
|
movr(r0, r1);
|
|
else
|
|
SRWI(r0,r1,i0);
|
|
}
|
|
|
|
static void
|
|
_ltr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPW(r1, r2);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_lti(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
CMPWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_ltr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPLW(r1, r2);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_lti_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
CMPLWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPLW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_ler(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPW(r1, r2);
|
|
CRNOT(CR_GT, CR_GT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_lei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
CMPWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
CRNOT(CR_GT, CR_GT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_ler_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPLW(r1, r2);
|
|
CRNOT(CR_GT, CR_GT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_lei_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
CMPLWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPLW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
CRNOT(CR_GT, CR_GT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_eqr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPW(r1, r2);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_EQ);
|
|
}
|
|
|
|
static void
|
|
_eqi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
CMPWI(r1, i0);
|
|
else if (can_zero_extend_short_p(i0))
|
|
CMPLWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_EQ);
|
|
}
|
|
|
|
static void
|
|
_ger(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPW(r1, r2);
|
|
CRNOT(CR_LT, CR_LT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_gei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
CMPWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
CRNOT(CR_LT, CR_LT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_ger_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPLW(r1, r2);
|
|
CRNOT(CR_LT, CR_LT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_gei_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
CMPLWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPLW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
CRNOT(CR_LT, CR_LT);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_LT);
|
|
}
|
|
|
|
static void
|
|
_gtr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPW(r1, r2);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_gti(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
CMPWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_gtr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPLW(r1, r2);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_gti_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_zero_extend_short_p(i0))
|
|
CMPLWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPLW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_GT);
|
|
}
|
|
|
|
static void
|
|
_ner(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
CMPW(r1, r2);
|
|
CRNOT(CR_EQ, CR_EQ);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_EQ);
|
|
}
|
|
|
|
static void
|
|
_nei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (can_sign_extend_short_p(i0))
|
|
CMPWI(r1, i0);
|
|
else if (can_zero_extend_short_p(i0))
|
|
CMPLWI(r1, i0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
CMPW(r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
CRNOT(CR_EQ, CR_EQ);
|
|
MFCR(r0);
|
|
EXTRWI(r0, r0, 1, CR_EQ);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bltr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_blti(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1))
|
|
CMPWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bltr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPLW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_blti_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_zero_extend_short_p(i1))
|
|
CMPLWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPLW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bler(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_blei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1))
|
|
CMPWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bler_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPLW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_blei_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_zero_extend_short_p(i1))
|
|
CMPLWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPLW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_beqr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BEQ(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_beqi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1))
|
|
CMPWI(r0, i1);
|
|
else if (can_zero_extend_short_p(i1))
|
|
CMPLWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BEQ(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bger(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bgei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1))
|
|
CMPWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bger_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPLW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bgei_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_zero_extend_short_p(i1))
|
|
CMPLWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPLW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bgtr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bgti(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1))
|
|
CMPWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bgtr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPLW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bgti_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_zero_extend_short_p(i1))
|
|
CMPLWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPLW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bner(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
CMPW(r0, r1);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BNE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bnei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1))
|
|
CMPWI(r0, i1);
|
|
else if (can_zero_extend_short_p(i1))
|
|
CMPLWI(r0, i1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
CMPW(r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BNE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bmsr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
andr(rn(reg), r0, r1);
|
|
w = bnei(i0, rn(reg), 0);
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bmsi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
andi(rn(reg), r0, i1);
|
|
w = bnei(i0, rn(reg), 0);
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bmcr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
andr(rn(reg), r0, r1);
|
|
w = beqi(i0, rn(reg), 0);
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bmci(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
andi(rn(reg), r0, i1);
|
|
w = beqi(i0, rn(reg), 0);
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_boaddr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
ADDO(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGT(d); /* GT = bit 1 of XER = OV */
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_boaddi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = boaddr(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxaddr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
ADDO(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxaddi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = bxaddr(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bosubr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
SUBO(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BGT(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bosubi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = bosubr(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxsubr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
SUBO(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BLE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxsubi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = bxsubr(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_boaddr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
ADDC(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BEQ(d); /* EQ = bit 2 of XER = CA */
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_boaddi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1)) {
|
|
ADDIC(r0, r0, i1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BEQ(d);
|
|
return (w);
|
|
}
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = boaddr_u(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxaddr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
ADDC(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BNE(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxaddi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t d, w;
|
|
if (can_sign_extend_short_p(i1)) {
|
|
ADDIC(r0, r0, i1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BNE(d);
|
|
return (w);
|
|
}
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = bxaddr_u(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bosubr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
SUBC(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BNE(d); /* PPC uses "carry" not "borrow" */
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bosubi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = bosubr_u(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxsubr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_word_t d, w;
|
|
SUBC(r0, r0, r1);
|
|
MCRXR(CR_0);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
BEQ(d);
|
|
return (w);
|
|
}
|
|
|
|
static jit_word_t
|
|
_bxsubi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i1);
|
|
w = bxsubr_u(i0, r0, rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static void
|
|
_ldr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
ldr_uc(r0, r1);
|
|
extr_c(r0, r0);
|
|
}
|
|
|
|
static void
|
|
_ldi_c(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
ldi_uc(r0, i0);
|
|
extr_c(r0, r0);
|
|
}
|
|
|
|
static void
|
|
_ldxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
ldxr_uc(r0, r1, r2);
|
|
extr_c(r0, r0);
|
|
}
|
|
|
|
static void
|
|
_ldxi_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
ldxi_uc(r0, r1, i0);
|
|
extr_c(r0, r0);
|
|
}
|
|
|
|
static void
|
|
_ldi_uc(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
LBZ(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
LBZ(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldxr_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r1 == _R0_REGNO) {
|
|
if (r2 != _R0_REGNO)
|
|
LBZX(r0, r2, r1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LBZX(r0, rn(reg), r2);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
LBZX(r0, r1, r2);
|
|
}
|
|
|
|
static void
|
|
_ldxi_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
ldr_uc(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r1 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LBZ(r0, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
LBZ(r0, r1, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ldxr_uc(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldi_s(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
LHA(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
LHA(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldxr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r1 == _R0_REGNO) {
|
|
if (r2 != _R0_REGNO)
|
|
LHAX(r0, r2, r1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LHAX(r0, rn(reg), r2);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
LHAX(r0, r1, r2);
|
|
}
|
|
|
|
static void
|
|
_ldxi_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
ldr_s(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r1 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LHA(r0, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
LHA(r0, r1, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ldxr_s(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldi_us(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
LHZ(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
LHZ(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldxr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r1 == _R0_REGNO) {
|
|
if (r2 != _R0_REGNO)
|
|
LHZX(r0, r2, r1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LHZX(r0, rn(reg), r2);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
LHZX(r0, r1, r2);
|
|
}
|
|
|
|
static void
|
|
_ldxi_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
ldr_us(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r1 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LHZ(r0, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
LHZ(r0, r1, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ldxr_us(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldi_i(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
LWZ(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
LWZ(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_ldxr_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r1 == _R0_REGNO) {
|
|
if (r2 != _R0_REGNO)
|
|
LWZX(r0, r2, r1);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LWZX(r0, rn(reg), r2);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
LWZX(r0, r1, r2);
|
|
}
|
|
|
|
static void
|
|
_ldxi_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
ldr_i(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r1 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r1);
|
|
LWZ(r0, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
LWZ(r0, r1, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
ldxr_i(r0, r1, rn(reg));
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_sti_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
STB(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
STB(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_stxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r0 == _R0_REGNO) {
|
|
if (r1 != _R0_REGNO)
|
|
STBX(r2, r1, r0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r0);
|
|
STBX(r2, rn(reg), r1);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
STBX(r2, r0, r1);
|
|
}
|
|
|
|
static void
|
|
_stxi_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
str_c(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r0 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), i0);
|
|
STB(r1, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
STB(r1, r0, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
stxr_c(rn(reg), r0, r1);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_sti_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
STH(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
STH(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_stxr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r0 == _R0_REGNO) {
|
|
if (r1 != _R0_REGNO)
|
|
STHX(r2, r1, r0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r0);
|
|
STHX(r2, rn(reg), r1);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
STHX(r2, r0, r1);
|
|
}
|
|
|
|
static void
|
|
_stxi_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
str_s(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r0 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), i0);
|
|
STH(r1, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
STH(r1, r0, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
stxr_s(rn(reg), r0, r1);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_sti_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
|
|
{
|
|
jit_bool_t inv;
|
|
jit_int32_t reg;
|
|
jit_word_t lo, hi;
|
|
if (can_sign_extend_short_p(i0))
|
|
STW(r0, _R0_REGNO, i0);
|
|
else {
|
|
hi = (i0 >> 16) + ((jit_uint16_t)i0 >> 15);
|
|
lo = (jit_int16_t)(i0 - (hi << 16));
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
if ((inv = reg == _R0)) reg = jit_get_reg(jit_class_gpr);
|
|
LIS(rn(reg), hi);
|
|
STW(r0, rn(reg), lo);
|
|
jit_unget_reg(reg);
|
|
if (inv) jit_unget_reg(_R0);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_stxr_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
|
|
{
|
|
jit_int32_t reg;
|
|
if (r0 == _R0_REGNO) {
|
|
if (r1 != _R0_REGNO)
|
|
STWX(r2, r1, r0);
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), r0);
|
|
STWX(r2, rn(reg), r1);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
else
|
|
STWX(r2, r0, r1);
|
|
}
|
|
|
|
static void
|
|
_stxi_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
|
|
{
|
|
jit_int32_t reg;
|
|
if (i0 == 0)
|
|
str_i(r0, r1);
|
|
else if (can_sign_extend_short_p(i0)) {
|
|
if (r0 == _R0_REGNO) {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movr(rn(reg), i0);
|
|
STW(r1, rn(reg), i0);
|
|
jit_unget_reg(reg);
|
|
}
|
|
else
|
|
STW(r1, r0, i0);
|
|
}
|
|
else {
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
movi(rn(reg), i0);
|
|
stxr_i(rn(reg), r0, r1);
|
|
jit_unget_reg(reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
_jmpr(jit_state_t *_jit, jit_int32_t r0)
|
|
{
|
|
MTLR(r0);
|
|
BLR();
|
|
}
|
|
|
|
/* pc relative jump */
|
|
static jit_word_t
|
|
_jmpi(jit_state_t *_jit, jit_word_t i0)
|
|
{
|
|
jit_int32_t reg;
|
|
jit_word_t w, d;
|
|
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
B(d);
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
/* absolute jump */
|
|
static jit_word_t
|
|
_jmpi_p(jit_state_t *_jit, jit_word_t i0)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
|
|
w = movi_p(rn(reg), i0);
|
|
jmpr(rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static void
|
|
_callr(jit_state_t *_jit, jit_int32_t r0)
|
|
{
|
|
MTCTR(r0);
|
|
BCTRL();
|
|
}
|
|
|
|
/* assume fixed address or reachable address */
|
|
static jit_word_t
|
|
_calli(jit_state_t *_jit, jit_word_t i0)
|
|
{
|
|
jit_word_t w, d;
|
|
w = _jit->pc.w;
|
|
d = (i0 - w) & ~3;
|
|
if (can_sign_extend_jump_p(d))
|
|
BL(d);
|
|
else
|
|
w = calli_p(i0);
|
|
return (w);
|
|
}
|
|
|
|
/* absolute jump */
|
|
static jit_word_t
|
|
_calli_p(jit_state_t *_jit, jit_word_t i0)
|
|
{
|
|
jit_word_t w;
|
|
jit_int32_t reg;
|
|
reg = jit_get_reg(jit_class_gpr);
|
|
w = movi_p(rn(reg), i0);
|
|
callr(rn(reg));
|
|
jit_unget_reg(reg);
|
|
return (w);
|
|
}
|
|
|
|
static void
|
|
_prolog(jit_state_t *_jit, jit_node_t *node)
|
|
{
|
|
unsigned long regno;
|
|
jit_word_t offset;
|
|
|
|
_jit->function->stack = ((_jit->function->self.alen +
|
|
_jit->function->self.size -
|
|
_jit->function->self.aoff) + 15) & -16;
|
|
|
|
/* return address */
|
|
MFLR(_R0_REGNO);
|
|
|
|
/* save any clobbered callee save gpr register */
|
|
regno = jit_regset_scan1(_jit->function->regset, _R14);
|
|
if (regno == ULONG_MAX || regno > _R31)
|
|
regno = _R31; /* aka _FP_REGNO */
|
|
STMW(rn(regno), _SP_REGNO, -fpr_save_area - (32 * 4) + rn(regno) * 4);
|
|
for (offset = 0; offset < 8; offset++) {
|
|
if (jit_regset_tstbit(_jit->function->regset, _F14 + offset))
|
|
stxi_d(-fpr_save_area + offset * 8, _SP_REGNO, rn(_F14 + offset));
|
|
}
|
|
|
|
stxi(8, _SP_REGNO, _R0_REGNO);
|
|
|
|
/* params >= %r31+56
|
|
* alloca < %r31-80 */
|
|
movr(_FP_REGNO, _SP_REGNO);
|
|
|
|
STWU(_SP_REGNO, _SP_REGNO, -_jit->function->stack);
|
|
}
|
|
|
|
static void
|
|
_epilog(jit_state_t *_jit, jit_node_t *node)
|
|
{
|
|
unsigned long regno;
|
|
jit_word_t offset;
|
|
|
|
LWZ(_SP_REGNO, _SP_REGNO, 0);
|
|
ldxi(_R0_REGNO, _SP_REGNO, 8);
|
|
|
|
MTLR(_R0_REGNO);
|
|
|
|
regno = jit_regset_scan1(_jit->function->regset, _R14);
|
|
if (regno == ULONG_MAX || regno > _R31)
|
|
regno = _R31; /* aka _FP_REGNO */
|
|
LMW(rn(regno), _SP_REGNO, -fpr_save_area - (32 * 4) + rn(regno) * 4);
|
|
for (offset = 0; offset < 8; offset++) {
|
|
if (jit_regset_tstbit(_jit->function->regset, _F14 + offset))
|
|
ldxi_d(rn(_F14 + offset), _SP_REGNO, -fpr_save_area + offset * 8);
|
|
}
|
|
BLR();
|
|
}
|
|
|
|
static void
|
|
_patch_at(jit_state_t *_jit, jit_word_t instr, jit_word_t label)
|
|
{
|
|
jit_word_t d;
|
|
union {
|
|
jit_int32_t *i;
|
|
jit_word_t w;
|
|
} u;
|
|
u.w = instr;
|
|
switch ((u.i[0] & 0xfc000000) >> 26) {
|
|
case 16: /* BCx */
|
|
d = label - instr;
|
|
assert(!(d & 3));
|
|
if (!can_sign_extend_short_p(d)) {
|
|
/* use absolute address */
|
|
assert(can_sign_extend_short_p(label));
|
|
d |= 2;
|
|
}
|
|
u.i[0] = (u.i[0] & ~0xfffd) | (d & 0xfffe);
|
|
break;
|
|
case 18: /* Bx */
|
|
d = label - instr;
|
|
assert(!(d & 3));
|
|
if (!can_sign_extend_jump_p(d)) {
|
|
/* use absolute address */
|
|
assert(can_sign_extend_jump_p(label));
|
|
d |= 2;
|
|
}
|
|
u.i[0] = (u.i[0] & ~0x3fffffd) | (d & 0x3fffffe);
|
|
break;
|
|
case 15: /* LI */
|
|
assert(!(u.i[0] & 0x1f0000));
|
|
u.i[0] = (u.i[0] & ~0xffff) | ((label >> 16) & 0xffff);
|
|
assert((u.i[1] & 0xfc000000) >> 26 == 24); /* ORI */
|
|
assert(((u.i[1] >> 16) & 0x1f) == ((u.i[1] >> 21) & 0x1f));
|
|
u.i[1] = (u.i[1] & ~0xffff) | (label & 0xffff);
|
|
break;
|
|
default:
|
|
assert(!"unhandled branch opcode");
|
|
}
|
|
}
|
|
#endif
|