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riscv: better movi

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This commit is contained in:
Ekaitz Zarraga 2024-11-15 13:09:45 +01:00
parent 746660bf08
commit cbda249dc5
1 changed files with 23 additions and 21 deletions
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44
lightening/riscv-cpu.c
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@ -1570,6 +1570,20 @@ movr(jit_state_t *_jit, int32_t r0, int32_t r1)
em_wp(_jit, _MV(r0, r1)); em_wp(_jit, _MV(r0, r1));
} }
static int
count_trailing_zeros(uint64_t x)
{
if(x == 0)
return 64;
int count = 0;
while((x & 0x1) == 0){
x >>= 1;
count++;
}
return count;
}
static void static void
movi(jit_state_t *_jit, int32_t r0, jit_word_t i0) movi(jit_state_t *_jit, int32_t r0, jit_word_t i0)
{ {
@ -1594,27 +1608,15 @@ movi(jit_state_t *_jit, int32_t r0, jit_word_t i0)
} else { } else {
// 64 bits: load in various steps // 64 bits: load in various steps
// lui, addi, slli, addi, slli, addi, slli, addi int64_t lo12 = i0 << 52 >> 52;
int64_t hh = (i0>>44); int64_t hi52 = (i0 + 0x800) >> 12;
int64_t hl = (i0>>33) - (hh<<11); int shift_amount = 12 + count_trailing_zeros((uint64_t) hi52);
int64_t lh = (i0>>22) - ((hh<<22) + (hl<<11)); hi52 = (hi52 >> (shift_amount - 12)) << shift_amount >> shift_amount;
int64_t lm = (i0>>11) - ((hh<<33) + (hl<<22) + (lh<<11)); movi(_jit, r0, hi52); // Recurse
int64_t ll = i0 - ((hh<<44) + (hl<<33) + (lh<<22) + (lm<<11)); em_wp(_jit, _SLLI(r0, r0, shift_amount));
if (lo12) {
em_wp(_jit, _ADDI(r0, r0, lo12));
em_wp(_jit, _LUI(r0, hh)); }
em_wp(_jit, _SLLI(r0, r0, 32));
em_wp(_jit, _SRLI(r0, r0, 33));
em_wp(_jit, _ADDI(r0, r0, hl));
em_wp(_jit, _SLLI(r0, r0, 11));
em_wp(_jit, _ADDI(r0, r0, lh));
em_wp(_jit, _SLLI(r0, r0, 11));
em_wp(_jit, _ADDI(r0, r0, lm));
em_wp(_jit, _SLLI(r0, r0, 11));
em_wp(_jit, _ADDI(r0, r0, ll));
} }
} }