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Correct branches and several ALU operations with 64 immediates

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jit_bra_l had the logic reversed, and correcting that also corrected
jit_b{lt,le,eq,ge,gt,ne}i_l.
  TESTQir and _ALUQir were not properly working with 64 bit immediates,
that require using a temporary register (JIT_REXTMP) as there are no
related opcodes for 64 bit immediates. This corrected jit_bm{s,c}i_l and
jit_bo{add,sub}i_l.
  Now, the tests in
http://code.google.com/p/exl/source/browse/trunk/check/lightning/branch.tst
pass.
This commit is contained in:
Paulo Cesar Pereira de Andrade 2010-08-26 20:01:11 -03:00 • committed by Paolo Bonzini
parent 67e1051827
commit d4a2a1ba07
3 changed files with 21 additions and 9 deletions
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12
lightning/i386/asm.h
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@ -337,9 +337,15 @@ enum {
#define _ALUQrr(OP, RS, RD) (_REXQrr(RS, RD), _O_Mrm (((OP) << 3) + 1,_b11,_r8(RS),_r8(RD) ))
#define _ALUQmr(OP, MD, MB, MI, MS, RD) (_REXQmr(MB, MI, RD), _O_r_X (((OP) << 3) + 3 ,_r8(RD) ,MD,MB,MI,MS ))
#define _ALUQrm(OP, RS, MD, MB, MI, MS) (_REXQrm(RS, MB, MI), _O_r_X (((OP) << 3) + 1 ,_r8(RS) ,MD,MB,MI,MS ))
#define _ALUQir(OP, IM, RD) (!_s8P(IM) && (RD) == _RAX ? \
(_REXQrr(0, RD), _O_L (((OP) << 3) + 5 ,IM )) : \
(_REXQrr(0, RD), _Os_Mrm_sL (0x81 ,_b11,OP ,_r8(RD) ,IM )) )
#define _ALUQir(OP, IM, RD) \
/* Immediate fits in 32 bits? */ \
(_s32P((long)(IM)) \
/* Yes. Immediate does not fit in 8 bits and reg is %rax? */ \
? (!_s8P(IM) && (RD) == _RAX \
? (_REXQrr(0, RD), _O_L(((OP) << 3) + 5, IM)) \
: (_REXQrr(0, RD), _Os_Mrm_sL(0x81, _b11, OP, _r8(RD), IM))) \
/* No. Need immediate in a register */ \
: (MOVQir(IM, JIT_REXTMP), _ALUQrr(OP, JIT_REXTMP, RD)))
#define _ALUQim(OP, IM, MD, MB, MI, MS) (_REXQrm(0, MB, MI), _Os_r_X_sL (0x81 ,OP ,MD,MB,MI,MS ,IM ))
#define ADCBrr(RS, RD) _ALUBrr(X86_ADC, RS, RD)