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Correct testcases in the mips backend.

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* lib/jit_mips-fpu.c: Correct wrong register order in stxr_{f,d}
	in the mips backend.
This commit is contained in:
pcpa 2012-12-06 07:47:42 -02:00
parent 66cb4452d7
commit ee0fab1dae
2 changed files with 9 additions and 4 deletions
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5
ChangeLog
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@ -1,3 +1,8 @@
2012-12-05 Paulo Andrade <pcpa@gnu.org>
* lib/jit_mips-fpu.c: Correct wrong register order in stxr_{f,d}
in the mips backend.
2012-12-05 Paulo Andrade <pcpa@gnu.org> 2012-12-05 Paulo Andrade <pcpa@gnu.org>
* lib/jit_arm-vfp.c: Correct regression found in armv7l with * lib/jit_arm-vfp.c: Correct regression found in armv7l with

8
lib/jit_mips-fpu.c
View file

@ -686,8 +686,8 @@ _stxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
{ {
jit_int32_t reg; jit_int32_t reg;
reg = jit_get_reg(jit_class_gpr); reg = jit_get_reg(jit_class_gpr);
addr(rn(reg), r1, r2); addr(rn(reg), r0, r1);
str_f(rn(reg), r0); str_f(rn(reg), r2);
jit_unget_reg(reg); jit_unget_reg(reg);
} }
@ -916,8 +916,8 @@ _stxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
{ {
jit_int32_t reg; jit_int32_t reg;
reg = jit_get_reg(jit_class_gpr); reg = jit_get_reg(jit_class_gpr);
addr(rn(reg), r1, r2); addr(rn(reg), r0, r1);
str_d(rn(reg), r0); str_d(rn(reg), r2);
jit_unget_reg(reg); jit_unget_reg(reg);
} }