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Author SHA1 Message Date
Andy Wingo
2db2b12e85 Fix mips32r6 bug 
See also:

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=925129
http://hades.mech.northwestern.edu/images/1/16/MIPS32_Architecture_Volume_II-A_Instruction_Set.pdf
https://lists.gnu.org/archive/html/lightning/2019-08/msg00010.html
https://lists.gnu.org/archive/html/guile-devel/2019-08/msg00030.html

* lightening/mips-cpu.c: Fix encoding of LR.  Thanks to Bruno Haible.
 2020-01-06 21:58:04 +01:00
Andy Wingo
1c36f036f6 push/pop of link register does not affect stack size on x86 
* lightening/x86-cpu.c (pop_link_register, push_link_register): Don't
  record stack size changes here.
 2019-06-20 10:53:12 +02:00
Andy Wingo
62183fb098 Add jmpi_with_link instruction 
The existing calli / callr interface is for ABI calls.  Sometimes though
you want to call some of your own code, just to get the current return
address.  ARM's branch-and-link instructions are ideal for this but they
don't exist on x86; there we emulate them by adding corresponding
pop_link_register / push_link_register instructions that are no-ops on
ARM.

* lightening.h (FOR_EACH_INSTRUCTION): Add jit_jmpi_with_link,
  pop_link_register, push_link_register.
* lightening/arm-cpu.c:
* lightening/x86-cpu.c:
* lightening/aarch64-cpu.c (jmpi_with_link, push_link_register)
  (pop_link_register): Add implementations.
* lightening/arm.h:
* lightening/aarch64.h:
* lightening/x86.h (JIT_LR): New definition.
* tests/link-register.c: New test.
 2019-06-20 10:13:37 +02:00
Andy Wingo
84b9ef087b Add breakpoint instruction 2019-05-27 18:29:26 +02:00
Andy Wingo
23bfbbaac1 Fix accidental change to ARMv7 ldr 2019-05-27 13:52:36 +02:00
Andy Wingo
bcdde6656b Add atomic operations 
These operations emit the same code that GCC does for corresponding
operations under the sequential consistency memory model.  It would be
possible to relax to acquire/release or something in the future.
 2019-05-27 11:34:13 +02:00
Andy Wingo
909c0077cc Correctly handle overflow when emitting literal pools 2019-05-27 11:34:13 +02:00
Andy Wingo
7c73f5f949 Add includable automake file 2019-05-23 10:02:00 +02:00
Andy Wingo
ff6ab1d2b1 Silence "unused" warnings 2019-05-22 23:04:30 +02:00
Andy Wingo
0b3393415e Allow add_pending_literal to return false 
This avoids invalidating offsets for the reloc.
 2019-05-22 17:29:10 +02:00
Andy Wingo
b67c4ed1e1 Avoid recursive pool emit for aarch64; add another overflow check 2019-05-21 16:05:03 +02:00
Andy Wingo
33754ba8c7 AArch64 fix 2019-05-21 15:34:40 +02:00
Andy Wingo
b7f367165f Various fixes for as-needed emission of literal pool 2019-05-21 15:25:08 +02:00
Andy Wingo
568fdecc86 Fix literal pool emission on armv7 2019-05-21 14:19:48 +02:00
Andy Wingo
0518651bfd Expose API to bless function pointers 
On ARMv7, we need to set the low bit to indicate that we're in
thumb-land.
 2019-05-21 14:00:04 +02:00
Andy Wingo
ef7abb568a Fix typo in previous commit, doh 2019-05-21 12:44:00 +02:00
Andy Wingo
d2c15dd6cd Clear literal pool more thoroughly 2019-05-21 12:38:53 +02:00
Andy Wingo
723f70ee11 Clear missing bit from literal pool 2019-05-21 12:24:20 +02:00
Andy Wingo
f49752eac0 Avoid using x18 on AArch64 2019-05-21 12:02:40 +02:00
Andy Wingo
58fc136722 Fix bounds checking on negative ldr offsets for aarch64 2019-05-20 21:35:42 +02:00
Andy Wingo
2e53911c22 Update README 2019-05-20 15:45:51 +02:00
Andy Wingo
c671c0868e Fix CI on ARMv7 2019-05-20 15:38:37 +02:00
Andy Wingo
0b5f05a8a5 Attempt to get CI working on ARMv7 2019-05-20 15:30:06 +02:00
Andy Wingo
0b7c0367d4 Add ARMv7 testing to CI 2019-05-20 15:25:03 +02:00
Andy Wingo
0b723c0401 ARMv7 backend passing all tests! 2019-05-20 15:20:33 +02:00
Andy Wingo
7dd18bddd7 ARMv7 backend compiling without warnings 2019-05-20 11:02:21 +02:00
Andy Wingo
8ce07131f1 Beginnings of VFP port to lightening 2019-05-19 23:29:10 +02:00
Andy Wingo
1ea34693cb Port of arm-cpu.c to current lightening 2019-05-19 22:21:50 +02:00
Andy Wingo
b71ddba1f7 Beginnings of ARMv7 backend 2019-05-17 10:59:59 +02:00
Andy Wingo
0da87968d1 Remove unused jit_{gpr,fpr}_is_callee_save 2019-05-17 10:59:05 +02:00
Andy Wingo
eaf702765d Remove software floating-point ARMv7 support; ARMv7 test env 2019-05-17 09:39:01 +02:00
Andy Wingo
c0e9302e9f Update README and guix invocations in test suite 2019-05-16 13:56:56 +02:00
Andy Wingo
43ea9aee2c Attempt to fix CI on Debian for AArch64 2019-05-16 12:43:35 +02:00
Andy Wingo
77c4b56a6d Attempt to fix CI on Debian 2019-05-16 12:37:54 +02:00
Andy Wingo
da98f48ce7 Attempt to fix CI on Debian 2019-05-16 12:28:07 +02:00
Andy Wingo
2badf61add Attempt to fix CI on Debian 2019-05-16 12:26:35 +02:00
Andy Wingo
d6e23795d1 Attempt to fix CI on Debian 2019-05-16 12:24:00 +02:00
Andy Wingo
f679e9e8af Attempt to fix CI on Debian 2019-05-16 12:22:18 +02:00
Andy Wingo
8977016a89 Fix YAML for CI 2019-05-16 12:11:12 +02:00
Andy Wingo
826d5a95c3 Fix dpkg --add-architecture invocation 2019-05-16 12:08:22 +02:00
Andy Wingo
926275e123 Add support for aarch64 in CI 2019-05-16 12:03:38 +02:00
Andy Wingo
9d4185af2b Remove jit_nop 
Instead, jit_align will call nop() internally.  You can't nop 3 bytes on
most architectures.
 2019-05-16 11:40:24 +02:00
Andy Wingo
f2d7321504 Aarch64 backend avoids needless temporary register allocation 2019-05-16 11:31:50 +02:00
Andy Wingo
9638e4f169 Fix a couple bugs related to aarch64 literal pools 2019-05-16 11:03:49 +02:00
Andy Wingo
9c9389ad2b Fix enter/leave JIT ABI 2019-05-16 10:45:44 +02:00
Andy Wingo
a643f99d68 Fix compilation on aarch64 2019-05-16 10:19:02 +02:00
Andy Wingo
7e0b0be1ba Fix GPR temporary selection 2019-05-15 16:26:18 +02:00
Andy Wingo
09e71475f4 Allow a backend to have multiple temporary registers 2019-05-15 16:19:33 +02:00
Andy Wingo
5b8262e804 Rework register saving to avoid push/pop 
Push and pop are not well supported on AArch64, so we might as well just
bump the stack pointer once and fill in by offset.
 2019-05-15 15:41:02 +02:00
Andy Wingo
0bfdcc7016 Refactor to add support for constant tables, shifted relocs 2019-05-14 15:53:25 +02:00